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Commit 5c59b24c authored by Jan David Mol's avatar Jan David Mol
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Move LOFAR2-specific overrides for COBALT to COBALT

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SAS/TMSS/backend/services/lobster/lib/config.py
+ 1
− 87
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...@@ -36,96 +36,10 @@ COBALT_PARSET_DIR = "/opt/lofar/var/run" ...@@ -36,96 +36,10 @@ COBALT_PARSET_DIR = "/opt/lofar/var/run"
COBALT_PARSET_OVERRIDES = """ COBALT_PARSET_OVERRIDES = """
# use test system # use test system
Cobalt.Nodes=[ cbt206_0, cbt206_1 ] Cobalt.Nodes=[ cbt206_0, cbt206_1 ]
# disable eth binding to avoid needing elevated priviledges in test setup # disable eth binding to avoid needing elevated priviledges in test setup
PIC.Core.Cobalt.cbt206_0.out_nic=[] PIC.Core.Cobalt.cbt206_0.out_nic=[]
PIC.Core.Cobalt.cbt206_1.out_nic=[] PIC.Core.Cobalt.cbt206_1.out_nic=[]
# LOFAR2 configuration
PIC.Core.CS001HBA0.RSP.receiver = cbt206_0
PIC.Core.CS001HBA0.RSP.sources = [udp+sdp:cbt206-10GB01.online.lofar:10011]
PIC.Core.CS001HBA0.RSP.nrBeamletsPerBoard = 488
PIC.Core.CS001HBA1.RSP.receiver = cbt206_0
PIC.Core.CS001HBA1.RSP.sources = [udp+sdp:cbt206-10GB01.online.lofar:10012]
PIC.Core.CS001HBA1.RSP.nrBeamletsPerBoard = 488
PIC.Core.CS001LBA.RSP.receiver = cbt206_0
PIC.Core.CS001LBA.RSP.sources = [udp+sdp:cbt206-10GB01.online.lofar:10010]
PIC.Core.CS001LBA.RSP.nrBeamletsPerBoard = 488
Observation.Dataslots.CS001HBA0.RSPBoardList=[488*0]
Observation.Dataslots.CS001HBA0.DataslotList=[0..487]
Observation.Dataslots.CS001HBA1.RSPBoardList=[488*0]
Observation.Dataslots.CS001HBA1.DataslotList=[0..487]
Observation.Dataslots.CS001LBA.RSPBoardList=[488*0]
Observation.Dataslots.CS001LBA.DataslotList=[0..487]
# Undo corrections for LOFAR1 clock offsets
PIC.Core.CS001HBA0.HBA_DUAL.HBA_110_190.delay.X = 0.0
PIC.Core.CS001HBA0.HBA_DUAL.HBA_110_190.delay.Y = 0.0
PIC.Core.CS001HBA0.HBA_DUAL.HBA_170_230.delay.X = 0.0
PIC.Core.CS001HBA0.HBA_DUAL.HBA_170_230.delay.Y = 0.0
PIC.Core.CS001HBA0.HBA_DUAL.HBA_210_250.delay.X = 0.0
PIC.Core.CS001HBA0.HBA_DUAL.HBA_210_250.delay.Y = 0.0
PIC.Core.CS001HBA0.HBA_DUAL_INNER.HBA_110_190.delay.X = 0.0
PIC.Core.CS001HBA0.HBA_DUAL_INNER.HBA_110_190.delay.Y = 0.0
PIC.Core.CS001HBA0.HBA_DUAL_INNER.HBA_170_230.delay.X = 0.0
PIC.Core.CS001HBA0.HBA_DUAL_INNER.HBA_170_230.delay.Y = 0.0
PIC.Core.CS001HBA0.HBA_DUAL_INNER.HBA_210_250.delay.X = 0.0
PIC.Core.CS001HBA0.HBA_DUAL_INNER.HBA_210_250.delay.Y = 0.0
PIC.Core.CS001HBA0.HBA_ZERO.HBA_110_190.delay.X = 0.0
PIC.Core.CS001HBA0.HBA_ZERO.HBA_110_190.delay.Y = 0.0
PIC.Core.CS001HBA0.HBA_ZERO.HBA_170_230.delay.X = 0.0
PIC.Core.CS001HBA0.HBA_ZERO.HBA_170_230.delay.Y = 0.0
PIC.Core.CS001HBA0.HBA_ZERO.HBA_210_250.delay.X = 0.0
PIC.Core.CS001HBA0.HBA_ZERO.HBA_210_250.delay.Y = 0.0
PIC.Core.CS001HBA1.HBA_DUAL.HBA_110_190.delay.X = 0.0
PIC.Core.CS001HBA1.HBA_DUAL.HBA_110_190.delay.Y = 0.0
PIC.Core.CS001HBA1.HBA_DUAL.HBA_170_230.delay.X = 0.0
PIC.Core.CS001HBA1.HBA_DUAL.HBA_170_230.delay.Y = 0.0
PIC.Core.CS001HBA1.HBA_DUAL.HBA_210_250.delay.X = 0.0
PIC.Core.CS001HBA1.HBA_DUAL.HBA_210_250.delay.Y = 0.0
PIC.Core.CS001HBA1.HBA_DUAL_INNER.HBA_110_190.delay.X = 0.0
PIC.Core.CS001HBA1.HBA_DUAL_INNER.HBA_110_190.delay.Y = 0.0
PIC.Core.CS001HBA1.HBA_DUAL_INNER.HBA_170_230.delay.X = 0.0
PIC.Core.CS001HBA1.HBA_DUAL_INNER.HBA_170_230.delay.Y = 0.0
PIC.Core.CS001HBA1.HBA_DUAL_INNER.HBA_210_250.delay.X = 0.0
PIC.Core.CS001HBA1.HBA_DUAL_INNER.HBA_210_250.delay.Y = 0.0
PIC.Core.CS001HBA1.HBA_ONE.HBA_110_190.delay.X = 0.0
PIC.Core.CS001HBA1.HBA_ONE.HBA_110_190.delay.Y = 0.0
PIC.Core.CS001HBA1.HBA_ONE.HBA_170_230.delay.X = 0.0
PIC.Core.CS001HBA1.HBA_ONE.HBA_170_230.delay.Y = 0.0
PIC.Core.CS001HBA1.HBA_ONE.HBA_210_250.delay.X = 0.0
PIC.Core.CS001HBA1.HBA_ONE.HBA_210_250.delay.Y = 0.0
PIC.Core.CS001LBA.LBA_INNER.LBA_10_70.delay.X = 0.0
PIC.Core.CS001LBA.LBA_INNER.LBA_10_70.delay.Y = 0.0
PIC.Core.CS001LBA.LBA_INNER.LBA_10_90.delay.X = 0.0
PIC.Core.CS001LBA.LBA_INNER.LBA_10_90.delay.Y = 0.0
PIC.Core.CS001LBA.LBA_INNER.LBA_30_70.delay.X = 0.0
PIC.Core.CS001LBA.LBA_INNER.LBA_30_70.delay.Y = 0.0
PIC.Core.CS001LBA.LBA_INNER.LBA_30_90.delay.X = 0.0
PIC.Core.CS001LBA.LBA_INNER.LBA_30_90.delay.Y = 0.0
PIC.Core.CS001LBA.LBA_OUTER.LBA_10_70.delay.X = 0.0
PIC.Core.CS001LBA.LBA_OUTER.LBA_10_70.delay.Y = 0.0
PIC.Core.CS001LBA.LBA_OUTER.LBA_10_90.delay.X = 0.0
PIC.Core.CS001LBA.LBA_OUTER.LBA_10_90.delay.Y = 0.0
PIC.Core.CS001LBA.LBA_OUTER.LBA_30_70.delay.X = 0.0
PIC.Core.CS001LBA.LBA_OUTER.LBA_30_70.delay.Y = 0.0
PIC.Core.CS001LBA.LBA_OUTER.LBA_30_90.delay.X = 0.0
PIC.Core.CS001LBA.LBA_OUTER.LBA_30_90.delay.Y = 0.0
PIC.Core.CS001LBA.LBA_SPARSE_EVEN.LBA_10_70.delay.X = 0.0
PIC.Core.CS001LBA.LBA_SPARSE_EVEN.LBA_10_70.delay.Y = 0.0
PIC.Core.CS001LBA.LBA_SPARSE_EVEN.LBA_10_90.delay.X = 0.0
PIC.Core.CS001LBA.LBA_SPARSE_EVEN.LBA_10_90.delay.Y = 0.0
PIC.Core.CS001LBA.LBA_SPARSE_EVEN.LBA_30_70.delay.X = 0.0
PIC.Core.CS001LBA.LBA_SPARSE_EVEN.LBA_30_70.delay.Y = 0.0
PIC.Core.CS001LBA.LBA_SPARSE_EVEN.LBA_30_90.delay.X = 0.0
PIC.Core.CS001LBA.LBA_SPARSE_EVEN.LBA_30_90.delay.Y = 0.0
PIC.Core.CS001LBA.LBA_SPARSE_ODD.LBA_10_70.delay.X = 0.0
PIC.Core.CS001LBA.LBA_SPARSE_ODD.LBA_10_70.delay.Y = 0.0
PIC.Core.CS001LBA.LBA_SPARSE_ODD.LBA_10_90.delay.X = 0.0
PIC.Core.CS001LBA.LBA_SPARSE_ODD.LBA_10_90.delay.Y = 0.0
PIC.Core.CS001LBA.LBA_SPARSE_ODD.LBA_30_70.delay.X = 0.0
PIC.Core.CS001LBA.LBA_SPARSE_ODD.LBA_30_70.delay.Y = 0.0
PIC.Core.CS001LBA.LBA_SPARSE_ODD.LBA_30_90.delay.X = 0.0
PIC.Core.CS001LBA.LBA_SPARSE_ODD.LBA_30_90.delay.Y = 0.0
""" """
# Name pattern for parsets stored on COBALT_HEADNODE # Name pattern for parsets stored on COBALT_HEADNODE
......
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