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compile_ip.tcl 16.33 KiB
#------------------------------------------------------------------------------
#
# Copyright (C) 2014
# ASTRON (Netherlands Institute for Radio Astronomy) <http://www.astron.nl/>
# JIVE (Joint Institute for VLBI in Europe) <http://www.jive.nl/>
# P.O.Box 2, 7990 AA Dwingeloo, The Netherlands
#
# This program is free software: you can redistribute it and/or modify
# it under the terms of the GNU General Public License as published by
# the Free Software Foundation, either version 3 of the License, or
# (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program. If not, see <http://www.gnu.org/licenses/>.
#
#------------------------------------------------------------------------------
# This file is based on generated file mentor/msim_setup.tcl.
# - the values for modelsim_search_libraries key in the hdllib.cfg follow from altera libraries vmap section in the msim_setup.tcl
# - vmap for the IP specific libraries and compile all IP source files into those libraries similar as in the msim_setup.tcl
# - replace QSYS_SIMDIR by IP_DIR
# - if the testbench is also generated with QSYS then only the IP_TBDIR files are needed, because these also contain the source files.
set IP_DIR "$env(RADIOHDL)/libraries/technology/ip_arria10/mac_10g/generated/sim"
set IP_TBDIR "$env(RADIOHDL)/libraries/technology/ip_arria10/mac_10g/generated_tb/generated/sim"
#vlib ./work/ ;# Assume library work already exists
vmap ip_arria10_mac_10g_alt_em10g32_141 ./work/
vlog "$IP_DIR/../alt_em10g32_141/sim/mentor/alt_em10g32.v" -work ip_arria10_mac_10g_alt_em10g32_141
vlog "$IP_DIR/../alt_em10g32_141/sim/mentor/alt_em10g32unit.v" -work ip_arria10_mac_10g_alt_em10g32_141
vlog "$IP_DIR/../alt_em10g32_141/sim/mentor/rtl/alt_em10g32_clk_rst.v" -work ip_arria10_mac_10g_alt_em10g32_141
vlog "$IP_DIR/../alt_em10g32_141/sim/mentor/rtl/alt_em10g32_clock_crosser.v" -work ip_arria10_mac_10g_alt_em10g32_141
vlog "$IP_DIR/../alt_em10g32_141/sim/mentor/rtl/alt_em10g32_crc32.v" -work ip_arria10_mac_10g_alt_em10g32_141
vlog "$IP_DIR/../alt_em10g32_141/sim/mentor/rtl/alt_em10g32_crc32_gf_mult32_kc.v" -work ip_arria10_mac_10g_alt_em10g32_141
vlog "$IP_DIR/../alt_em10g32_141/sim/mentor/rtl/alt_em10g32_creg_map.v" -work ip_arria10_mac_10g_alt_em10g32_141
vlog "$IP_DIR/../alt_em10g32_141/sim/mentor/rtl/alt_em10g32_creg_top.v" -work ip_arria10_mac_10g_alt_em10g32_141
vlog "$IP_DIR/../alt_em10g32_141/sim/mentor/rtl/alt_em10g32_frm_decoder.v" -work ip_arria10_mac_10g_alt_em10g32_141
vlog "$IP_DIR/../alt_em10g32_141/sim/mentor/rtl/alt_em10g32_tx_rs_gmii_mii_layer.v" -work ip_arria10_mac_10g_alt_em10g32_141
vlog "$IP_DIR/../alt_em10g32_141/sim/mentor/rtl/alt_em10g32_pipeline_base.v" -work ip_arria10_mac_10g_alt_em10g32_141
vlog "$IP_DIR/../alt_em10g32_141/sim/mentor/rtl/alt_em10g32_reset_synchronizer.v" -work ip_arria10_mac_10g_alt_em10g32_141
vlog "$IP_DIR/../alt_em10g32_141/sim/mentor/rtl/alt_em10g32_rr_clock_crosser.v" -work ip_arria10_mac_10g_alt_em10g32_141
vlog "$IP_DIR/../alt_em10g32_141/sim/mentor/rtl/alt_em10g32_rst_cnt.v" -work ip_arria10_mac_10g_alt_em10g32_141
vlog "$IP_DIR/../alt_em10g32_141/sim/mentor/rtl/alt_em10g32_rx_fctl_filter_crcpad_rem.v" -work ip_arria10_mac_10g_alt_em10g32_141
vlog "$IP_DIR/../alt_em10g32_141/sim/mentor/rtl/alt_em10g32_rx_fctl_overflow.v" -work ip_arria10_mac_10g_alt_em10g32_141
vlog "$IP_DIR/../alt_em10g32_141/sim/mentor/rtl/alt_em10g32_rx_fctl_preamble.v" -work ip_arria10_mac_10g_alt_em10g32_141
vlog "$IP_DIR/../alt_em10g32_141/sim/mentor/rtl/alt_em10g32_rx_frm_control.v" -work ip_arria10_mac_10g_alt_em10g32_141
vlog "$IP_DIR/../alt_em10g32_141/sim/mentor/rtl/alt_em10g32_rx_pfc_flow_control.v" -work ip_arria10_mac_10g_alt_em10g32_141
vlog "$IP_DIR/../alt_em10g32_141/sim/mentor/rtl/alt_em10g32_rx_pfc_pause_conversion.v" -work ip_arria10_mac_10g_alt_em10g32_141
vlog "$IP_DIR/../alt_em10g32_141/sim/mentor/rtl/alt_em10g32_rx_pkt_backpressure_control.v" -work ip_arria10_mac_10g_alt_em10g32_141
vlog "$IP_DIR/../alt_em10g32_141/sim/mentor/rtl/alt_em10g32_rx_rs_gmii_mii.v" -work ip_arria10_mac_10g_alt_em10g32_141
vlog "$IP_DIR/../alt_em10g32_141/sim/mentor/rtl/alt_em10g32_rx_rs_layer.v" -work ip_arria10_mac_10g_alt_em10g32_141
vlog "$IP_DIR/../alt_em10g32_141/sim/mentor/rtl/alt_em10g32_rx_rs_xgmii.v" -work ip_arria10_mac_10g_alt_em10g32_141
vlog "$IP_DIR/../alt_em10g32_141/sim/mentor/rtl/alt_em10g32_rx_status_aligner.v" -work ip_arria10_mac_10g_alt_em10g32_141
vlog "$IP_DIR/../alt_em10g32_141/sim/mentor/rtl/alt_em10g32_rx_top.v" -work ip_arria10_mac_10g_alt_em10g32_141
vlog "$IP_DIR/../alt_em10g32_141/sim/mentor/rtl/alt_em10g32_stat_mem.v" -work ip_arria10_mac_10g_alt_em10g32_141
vlog "$IP_DIR/../alt_em10g32_141/sim/mentor/rtl/alt_em10g32_stat_reg.v" -work ip_arria10_mac_10g_alt_em10g32_141
vlog "$IP_DIR/../alt_em10g32_141/sim/mentor/rtl/alt_em10g32_tx_data_frm_gen.v" -work ip_arria10_mac_10g_alt_em10g32_141
vlog "$IP_DIR/../alt_em10g32_141/sim/mentor/rtl/alt_em10g32_tx_srcaddr_inserter.v" -work ip_arria10_mac_10g_alt_em10g32_141
vlog "$IP_DIR/../alt_em10g32_141/sim/mentor/rtl/alt_em10g32_tx_err_aligner.v" -work ip_arria10_mac_10g_alt_em10g32_141
vlog "$IP_DIR/../alt_em10g32_141/sim/mentor/rtl/alt_em10g32_tx_flow_control.v" -work ip_arria10_mac_10g_alt_em10g32_141
vlog "$IP_DIR/../alt_em10g32_141/sim/mentor/rtl/alt_em10g32_tx_frm_arbiter.v" -work ip_arria10_mac_10g_alt_em10g32_141
vlog "$IP_DIR/../alt_em10g32_141/sim/mentor/rtl/alt_em10g32_tx_frm_muxer.v" -work ip_arria10_mac_10g_alt_em10g32_141
vlog "$IP_DIR/../alt_em10g32_141/sim/mentor/rtl/alt_em10g32_tx_pause_beat_conversion.v" -work ip_arria10_mac_10g_alt_em10g32_141