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L2 sdp 365

Merged Pieter Donker requested to merge L2SDP-365 into master
4 files
+ 152
14
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@@ -46,7 +46,6 @@
#include <arpa/inet.h> // htons, inet_pton
#include "fpga.h"
#include "../constants.h"
#include "../tools/mmap.h"
#include "../tools/util.h"
@@ -69,9 +68,13 @@ Periph_fpga::Periph_fpga(string ipaddr, string expected_design_name, uint expect
my_current_fw_version("-.-"),
my_bsn_input_sync_timeout(false),
my_bsn_input_bsn(0),
my_bsn_input_nof_blocks(0),
my_bsn_input_nof_packets(0),
my_bsn_input_nof_valid(0),
my_bsn_input_nof_err(0)
my_bsn_input_nof_err(0),
my_jesd_csr_rbd_count {0},
my_jesd_csr_dev_syncn {0},
my_jesd_rx_err0 {0},
my_jesd_rx_err1 {0}
{
ucp = new UCP(ipaddr);
@@ -132,6 +135,11 @@ Periph_fpga::Periph_fpga(string ipaddr, string expected_design_name, uint expect
registerMap->add_register("fpga/bsn_monitor_input_nof_packets", "-", 1, 1, "RO", REG_FORMAT_INT32);
registerMap->add_register("fpga/bsn_monitor_input_nof_valid", "-", 1, 1, "RO", REG_FORMAT_INT32);
registerMap->add_register("fpga/bsn_monitor_input_nof_err", "-", 1, 1, "RO", REG_FORMAT_INT32);
registerMap->add_register("fpga/jesd204b_csr_rbd_count", "-", 1, 12, "RO", REG_FORMAT_UINT32);
registerMap->add_register("fpga/jesd204b_csr_dev_syncn", "-", 1, 12, "RO", REG_FORMAT_UINT32);
registerMap->add_register("fpga/jesd204b_csr_rx_err0", "-", 1, 12, "RO", REG_FORMAT_UINT32);
registerMap->add_register("fpga/jesd204b_csr_rx_err1", "-", 1, 12, "RO", REG_FORMAT_UINT32);
registerMap->print_screen();
@@ -455,6 +463,18 @@ bool Periph_fpga::read(TermOutput& termout, const string addr,
else if (addr == "fpga/bsn_monitor_input_nof_err") {
retval = read_bsn_monitor_input_nof_err(termout, format, R_MEM);
}
else if (addr == "fpga/jesd204b_csr_rbd_count") {
retval = read_jesd204b_csr_rbd_count(termout, format, R_MEM);
}
else if (addr == "fpga/jesd204b_csr_dev_syncn") {
retval = read_jesd204b_csr_dev_syncn(termout, format, R_MEM);
}
else if (addr == "fpga/jesd204b_csr_rx_err0") {
retval = read_jesd204b_csr_rx_err0(termout, format, R_MEM);
}
else if (addr == "fpga/jesd204b_csr_rx_err0") {
retval = read_jesd204b_csr_rx_err1(termout, format, R_MEM);
}
else {
throw runtime_error("address " + addr + " not found!");
}
@@ -565,14 +585,22 @@ bool Periph_fpga::write(TermOutput& termout, const string addr, const string typ
bool Periph_fpga::monitor(TermOutput& termout, uint seconds)
{
if (!Enabled) { return false; }
// use tictoc, tic(start) toc(stop) to see how long this function takes
// first 9 read functions on 4 nodes will take 6 msec.
tictoc.tic("periph.fpga.monitor");
read_system_info(termout);
read_bsn_monitor_input_sync_timeout(termout, REG_FORMAT_INT64, R_UCP);
read_bsn_monitor_input_bsn(termout, REG_FORMAT_INT64, R_UCP);
read_bsn_monitor_input_nof_packets(termout, REG_FORMAT_INT32, R_UCP);
read_bsn_monitor_input_nof_valid(termout, REG_FORMAT_INT32, R_UCP);
read_bsn_monitor_input_nof_err(termout, REG_FORMAT_INT32, R_UCP);
read_jesd204b_csr_rbd_count(termout, REG_FORMAT_INT32, R_UCP);
read_jesd204b_csr_dev_syncn(termout, REG_FORMAT_INT32, R_UCP);
read_jesd204b_csr_rx_err0(termout, REG_FORMAT_INT32, R_UCP);
read_jesd204b_csr_rx_err1(termout, REG_FORMAT_INT32, R_UCP);
termout.clear();
tictoc.toc();
return true;
}
@@ -1535,24 +1563,24 @@ bool Periph_fpga::read_bsn_monitor_input_bsn(TermOutput& termout, int format, in
bool Periph_fpga::read_bsn_monitor_input_nof_packets(TermOutput& termout, int format, int mode) {
bool retval = true;
int32_t nof_blocks = my_bsn_input_nof_blocks;
int32_t nof_packets = my_bsn_input_nof_packets;
if (mode == R_UCP) {
if (my_bsn_input_sync_timeout == true) {
nof_blocks = -1;
nof_packets = -1;
} else {
uint32_t data[20];
memset((void *)data, 0, sizeof(data));
string regname;
regname = "mm/0/REG_BSN_MONITOR_INPUT/0/nof_sop";
retval = Read(regname, data);
nof_blocks = (int32_t)data[0];
nof_packets = (int32_t)data[0];
}
}
int32_t *_ptr = (int32_t *)termout.val;
*_ptr = nof_blocks;
*_ptr = nof_packets;
termout.nof_vals = 1;
termout.datatype = format;
my_bsn_input_nof_blocks = nof_blocks;
my_bsn_input_nof_packets = nof_packets;
return retval;
}
@@ -1602,6 +1630,99 @@ bool Periph_fpga::read_bsn_monitor_input_nof_err(TermOutput& termout, int format
return retval;
}
bool Periph_fpga::read_jesd204b_csr_rbd_count(TermOutput& termout, int format, int mode) {
bool retval = true;
if (mode == R_UCP) {
uint32_t data[20];
memset((void *)data, 0, sizeof(data));
string regname;
for (uint i=0; i< C_S_pn; i++) {
regname = "mm/0/JESD204B/" + to_string(i) + "/csr_rbd_count";
retval = Read(regname, data);
my_jesd_csr_rbd_count[i] = (uint32_t)data[0];
}
}
uint32_t *_ptr = (uint32_t *)termout.val;
for (uint i=0; i< C_S_pn; i++) {
*_ptr = my_jesd_csr_rbd_count[i];
_ptr++;
}
termout.nof_vals = C_S_pn;
termout.datatype = format;
return retval;
}
bool Periph_fpga::read_jesd204b_csr_dev_syncn(TermOutput& termout, int format, int mode) {
bool retval = true;
if (mode == R_UCP) {
uint32_t data[20];
memset((void *)data, 0, sizeof(data));
string regname;
for (uint i=0; i< C_S_pn; i++) {
regname = "mm/0/JESD204B/" + to_string(i) + "/csr_dev_syncn";
retval = Read(regname, data);
my_jesd_csr_dev_syncn[i] = (uint32_t)data[0];
}
}
uint32_t *_ptr = (uint32_t *)termout.val;
for (uint i=0; i< C_S_pn; i++) {
*_ptr = my_jesd_csr_dev_syncn[i];
_ptr++;
}
termout.nof_vals = C_S_pn;
termout.datatype = format;
return retval;
}
bool Periph_fpga::read_jesd204b_csr_rx_err0(TermOutput& termout, int format, int mode) {
bool retval = true;
if (mode == R_UCP) {
uint32_t data[20];
memset((void *)data, 0, sizeof(data));
string regname;
for (uint i=0; i< C_S_pn; i++) {
regname = "mm/0/JESD204B/" + to_string(i) + "/rx_err0";
retval = Read(regname, data);
my_jesd_rx_err0[i] = (uint32_t)data[0];
}
}
uint32_t *_ptr = (uint32_t *)termout.val;
for (uint i=0; i< C_S_pn; i++) {
*_ptr = my_jesd_rx_err0[i];
_ptr++;
}
termout.nof_vals = C_S_pn;
termout.datatype = format;
return retval;
}
bool Periph_fpga::read_jesd204b_csr_rx_err1(TermOutput& termout, int format, int mode) {
bool retval = true;
if (mode == R_UCP) {
uint32_t data[20];
memset((void *)data, 0, sizeof(data));
string regname;
for (uint i=0; i< C_S_pn; i++) {
regname = "mm/0/JESD204B/" + to_string(i) + "/rx_err1";
retval = Read(regname, data);
my_jesd_rx_err1[i] = (uint32_t)data[0];
}
}
uint32_t *_ptr = (uint32_t *)termout.val;
for (uint i=0; i< C_S_pn; i++) {
*_ptr = my_jesd_rx_err1[i];
_ptr++;
}
termout.nof_vals = C_S_pn;
termout.datatype = format;
return retval;
}
bool Periph_fpga::write_wdi_override(TermOutput& termout)
{
uint32_t data = 0xB007FAC7;
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