small change

src/periph/fpga.cpp

@@ -1113,12 +1113,9 @@ bool Periph_fpga::write_fpga_weights(const char *data)
 
 bool Periph_fpga::write_sst_offload_weighted_subbands(const char *data)
 {
-    bool *_ptr = (bool *)data;
-    uint32_t *reg = new uint32_t[1];
-    reg[0] = 0;
-    if (_ptr[0] == true) reg[0] = 1;
+    uint32_t _data[1];
+    _data[0] = (uint32_t)data[0];
     bool retval = Write("mm/0/REG_DP_SELECTOR/0/input_select", reg);
-    delete[] reg;
     return retval;
 }
 
@@ -1130,8 +1127,6 @@ bool Periph_fpga::write_sst_offload_enable(const char *data)
 }
 
 
-
-
 bool Periph_fpga::write_bst_offload_enable(const char *data)
 {
     bool *_ptr = (bool *)data;
@@ -1147,8 +1142,6 @@ bool Periph_fpga::write_bst_offload_enable(const char *data)
 }
 
 
-
-
 bool Periph_fpga::write_beamlet_output_enable(const char *data)
 {
     bool *_ptr = (bool *)data;
@@ -1163,7 +1156,6 @@ bool Periph_fpga::write_beamlet_output_enable(const char *data)
     return retval;
 }
 
-// TODO
 bool Periph_fpga::read_beamlet_output_scale(TermOutput& termout, int format)
 {
     bool retval = true;
@@ -1185,7 +1177,6 @@ bool Periph_fpga::read_beamlet_output_scale(TermOutput& termout, int format)
     return retval;
 }
 
-// TODO
 bool Periph_fpga::write_beamlet_output_scale(const char *data)
 {
     double *_ptr = (double *)data;
@@ -1202,7 +1193,6 @@ bool Periph_fpga::write_beamlet_output_scale(const char *data)
     return retval;
 }
 
-// TODO: REG_DP_BLOCK_RESIZE is not yet supported in the SDPFW.
 bool Periph_fpga::read_beamlet_output_nof_beamlets(TermOutput& termout, int format)
 {
     bool retval = true;
@@ -1222,7 +1212,6 @@ bool Periph_fpga::read_beamlet_output_nof_beamlets(TermOutput& termout, int form
     return retval;
 }
 
-// TODO: REG_DP_BLOCK_RESIZE is not yet supported in the SDPFW.
 bool Periph_fpga::write_beamlet_output_nof_beamlets(const char *data)
 {
     uint32_t *_ptr = (uint32_t *)data;
@@ -1256,7 +1245,7 @@ bool Periph_fpga::write_beamlet_output_nof_beamlets(const char *data)
 bool Periph_fpga::write_xst_offload_enable(const char *data)
 {
     uint32_t _data[1];
-    _data[0] = (bool)data[0];
+    _data[0] = (uint32_t)data[0];
     return Write("mm/0/REG_STAT_ENABLE_XST/0/enable", _data);
 }
 
@@ -1267,7 +1256,6 @@ bool Periph_fpga::write_xst_offload_nof_crosslets(const char *data)
 }
 
 
-//TODO, add beamsets (n_instances)
 bool Periph_fpga::read_eth_destination_mac(TermOutput& termout, const string& port_name, const int n_instances, const int format)
 {
      bool retval = true;