LB added ADC_test_signal, DTH reset on start

pypcc/config/RECVTR_LB.yaml

@@ -141,6 +141,7 @@ device_registers:
     - name: JESD_control1
       description: JESD link control
       address: 0x5F
+      store: True
     - name: JESD_control3
       description: JESD link control
       address: 0x61
@@ -544,6 +545,17 @@ variables:
      debug: true
      mask: ANT_mask
 
+   - name: RCU_ADC_testsignal
+     driver: I2C_RCU
+     devreg:  [ADC1.JESD_control1,ADC2.JESD_control1,ADC3.JESD_control1]
+     width: 1
+     bitoffset: 5
+     rw:  rw
+     dtype: boolean
+     dim: 96
+     dim2: [3,32]
+     mask: ANT_mask
+
    - name: RCU_ADC_JESD3
      driver: I2C_RCU
      devreg:  [ADC1.JESD_control3,ADC2.JESD_control3,ADC3.JESD_control3]
@@ -662,6 +674,7 @@ methods:
     - RCU_update: 0
     - RCU_ADC_locked: Update #check if not also in RCU_update
     - RCU_ADC_sync: Update #disabled for testing
+    - RCU_ADC_testsignal: Update #disabled for testing
     - RCU_DTH_on: Update #check if not also in RCU_update
 
   - name: RCU_on
@@ -686,7 +699,7 @@ methods:
      #Set registers to default values
      - IO2.GPIO1: 0x4A #0x40 Dig on, 0x0a =10dB att
      - IO2.GPIO2: 0x55 #0x15 #Band0 (or 0x2a band 1)  #LED green=on=low
-     - IO3.GPIO1: 0x15 #0001 0101 ADC_SDIO=high, clk=low, DTH_EN=low
+     - IO3.GPIO1: 0x95 #0001 0101 ADC_SDIO=high, clk=low, DTH_shutdown=HIGH (made low which ADC SPI bus reset)
      - IO3.GPIO2: 0x47 #ADC SC=high, DTH_SDA=high, DTH_EN=low
      - IO1.GPIO1: 0x0A #0x0a = 10dB att
 #     - IO1.POL1: 0
@@ -738,6 +751,7 @@ methods:
      - RCU_PWR_2V5: Update
      - RCU_ADC_locked: Update #disabled for testing
      - RCU_ADC_sync: Update #disabled for testing
+     - RCU_ADC_testsignal: Update #disabled for testing
 
   - name: RCU_update
     driver: I2C_RCU