Corrected wrong merge from master

clk/Vars.py

@@ -50,22 +50,5 @@ CLK_PLL_setup=Instrs("CLK_PLL_setup",15,[
    Instr(DevType.VarUpdate,CLK_lock1,1,[0])
 ])
 
-def SPIinst(reg,value):
-  return Instr(DevType.SPIbb,DevReg(SPIBB_PLL,0,reg,0),1,[value]),
-CLK_PLL_setup=Instrs("CLK_PLL_setup",2,[
-   SPIinst(0x03,0x08),
-   SPIinst(0x05,0x97),
-   SPIinst(0x06,0x10),
-   SPIinst(0x07,0x04),
-   SPIinst(0x08,0x01),
-   SPIinst(0x07,0x00),
-   SPIinst(0x09,0x10),
-   SPIinst(0x0A,0x14),
-   SPIinst(0x09,0x00),
-   SPIinst(0x0D,0x01),#was 2
-   SPIinst(0x0F,0x01),
-   SPIinst(0x11,0x01),
-   SPIinst(0x13,0x01)
-])
 
 OPC_methods=[CLK_on,CLK_off,CLK_PLL_setup]