ddrctrl_pack.vhd

-------------------------------------------------------------------------------
--
-- Copyright 2022
-- ASTRON (Netherlands Institute for Radio Astronomy) <http://www.astron.nl/>
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--
-- Licensed under the Apache License, Version 2.0 (the "License");
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-- You may obtain a copy of the License at
--
--     http://www.apache.org/licenses/LICENSE-2.0
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-- Unless required by applicable law or agreed to in writing, software
-- distributed under the License is distributed on an "AS IS" BASIS,
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-- See the License for the specific language governing permissions and
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--
-------------------------------------------------------------------------------
-- Author: Job van Wee
-- Purpose: Make one data vector out of all the data from the t_dp_sosi_arr.
--
-- Description:
--  The data from the t_dp_sosi_arr gets put into one data vector.
--
-- Remark:
--  Use VHDL coding template from:
--  https://support.astron.nl/confluence/display/SBe/VHDL+design+patterns+for+RTL+coding

LIBRARY IEEE, dp_lib;
USE IEEE.std_logic_1164.ALL;
USE dp_lib.dp_stream_pkg.ALL;

ENTITY ddrctrl_pack IS
  GENERIC (

    g_nof_streams : POSITIVE := 12;                                           -- number of input streams
    g_data_w      : NATURAL  := 14                                            -- data with of input data vectors

  );
  PORT (

    in_sosi_arr   : IN t_dp_sosi_arr(g_nof_streams-1 DOWNTO 0);               -- input data
    out_data      : OUT STD_LOGIC_VECTOR((g_nof_streams*g_data_w)-1 DOWNTO 0) -- output data

  );
END ddrctrl_pack;

ARCHITECTURE rtl OF ddrctrl_pack IS

BEGIN

  -- Putting all the data from the different streams into one data vector.
  gen_extract_and_pack_data : FOR I IN 0 TO g_nof_streams-1 GENERATE
    out_data(g_data_w*(I+1)-1 DOWNTO g_data_w*I) <= in_sosi_arr(I).data(g_data_w-1 DOWNTO 0);
  END GENERATE;

END rtl;