Reinier van der Walle
--- a/libraries/base/dp/src/vhdl/dp_bsn_source_reg_v2.vhd
+++ b/libraries/base/dp/src/vhdl/dp_bsn_source_reg_v2.vhd
+            sla_out.rddata(c_word_w - 1 DOWNTO 0) <= mm_nof_clk_per_sync;
            
          -- Read current BSN
          WHEN 2 =>
-            sla_out.rddata(31 DOWNTO 0) <= mm_current_bsn(31 DOWNTO  0);
-            mm_current_bsn_hi           <= mm_current_bsn(63 DOWNTO 32);  -- first read low part and preserve high part
+            sla_out.rddata(c_word_w - 1 DOWNTO 0) <= mm_current_bsn(31 DOWNTO  0);
+            mm_current_bsn_hi                     <= mm_current_bsn(63 DOWNTO 32);  -- first read low part and preserve high part
          WHEN 3 =>
-            sla_out.rddata(31 DOWNTO 0) <= mm_current_bsn_hi;  -- then read preserved high part
+            sla_out.rddata(c_word_w - 1 DOWNTO 0) <= mm_current_bsn_hi;  -- then read preserved high part
          
          -- Read current bsn_time_offset
          WHEN 4 =>
-            sla_out.rddata <= RESIZE_UVEC(mm_bsn_time_offset, c_word_w);
+            sla_out.rddata(c_word_w - 1 DOWNTO 0) <= RESIZE_UVEC(mm_bsn_time_offset, c_word_w);
--- a/libraries/io/nw_10GbE/src/vhdl/nw_10GbE.vhd
+++ b/libraries/io/nw_10GbE/src/vhdl/nw_10GbE.vhd
    g_tx_fifo_size           : NATURAL := 256;   -- 2 * 32b * 256 = 2 M9K (DP interface has 64b data, so at least 2 M9K needed)
    g_rx_fifo_size           : NATURAL := 256;   -- 2 * 32b * 256 = 2 M9K (DP interface has 64b data, so at least 2 M9K needed)
    g_word_alignment_padding : BOOLEAN := FALSE;
+    g_xon_backpressure       : BOOLEAN := FALSE;
--- a/libraries/io/tr_10GbE/src/vhdl/tr_10GbE.vhd
+++ b/libraries/io/tr_10GbE/src/vhdl/tr_10GbE.vhd
+        g_use_empty   => TRUE,
+        g_fifo_size   => g_tx_fifo_size
+      )
+      PORT MAP (
+        rst         => dp_rst,
+        clk         => dp_clk,
+    
+        snk_out     => snk_out_arr(i),
+        snk_in      => snk_in_arr(i),
+    
+        src_in      => dp_fifo_sc_tx_src_in_arr(i), 
+        src_out     => dp_fifo_sc_tx_src_out_arr(i)
+      );   
+    END GENERATE;
+
+    -- When MAC receives pause frames, it's ready signal is low for a long time