add ip files and changed code to get minimal wroking design

...arts_unb2b_sc3_timer_0/qsys_arts_unb2b_sc3_timer_0.regmap

...ts_unb2b_sc3_timer_0/qsys_arts_unb2b_sc3_timer_0.sopcinfo

...ys_arts_unb2b_sc3_timer_0/qsys_arts_unb2b_sc3_timer_0.xml

...s_arts_unb2b_sc3_timer_0/qsys_arts_unb2b_sc3_timer_0_bb.v

...2b_sc3_timer_0/qsys_arts_unb2b_sc3_timer_0_generation.rpt

...arts_unb2b_sc3_timer_0/qsys_arts_unb2b_sc3_timer_0_inst.v

...ts_unb2b_sc3_timer_0/qsys_arts_unb2b_sc3_timer_0_inst.vhd

...s_unb2b_sc3_timer_0/synth/qsys_arts_unb2b_sc3_timer_0.vhd

...s/arts/designs/arts_unb2b_sc3/src/vhdl/arts_unb2b_sc3.vhd

...igns/arts_unb2b_sc3/src/vhdl/arts_unb2b_sc3_mm_master.vhd