Skip to content
Snippets Groups Projects
Commit 4517e733 authored by Jonathan Hargreaves's avatar Jonathan Hargreaves
Browse files

sip and qip files for unb2_pinning ip

parent 095d2afa
No related branches found
No related tags found
No related merge requests found
Hide whitespace changes
Inline Side-by-side
Showing
with 817 additions and 13 deletions
boards/uniboard2/designs/unb2_pinning/build/quartus/unb2_pinning.qsf
+ 13
− 13
View file @ 4517e733
......@@ -1280,26 +1280,26 @@ set_location_assignment PIN_L13 -to BCK_ERR[1]
set_location_assignment PIN_M13 -to BCK_ERR[2]
set_global_assignment -name SIP_FILE ../../../src/ip/transceiver_reset_controller.sip
set_global_assignment -name QIP_FILE ../../../src/ip/transceiver_reset_controller.qip
set_global_assignment -name SIP_FILE ../../../src/ip/transceiver_pll.sip
set_global_assignment -name QIP_FILE ../../../src/ip/transceiver_pll.qip
set_global_assignment -name SIP_FILE ../../../src/ip/tranceiver_phy.sip
set_global_assignment -name QIP_FILE ../../../src/ip/tranceiver_phy.qip
set_global_assignment -name SIP_FILE ../../../src/ip/system_pll.sip
set_global_assignment -name QIP_FILE ../../../src/ip/system_pll.qip
set_global_assignment -name SIP_FILE ../../src/ip/transceiver_reset_controller.sip
set_global_assignment -name QIP_FILE ../../src/ip/transceiver_reset_controller.qip
set_global_assignment -name SIP_FILE ../../src/ip/transceiver_pll.sip
set_global_assignment -name QIP_FILE ../../src/ip/transceiver_pll.qip
set_global_assignment -name SIP_FILE ../../src/ip/transceiver_phy.sip
set_global_assignment -name QIP_FILE ../../src/ip/transceiver_phy.qip
set_global_assignment -name SIP_FILE ../../src/ip/system_pll.sip
set_global_assignment -name QIP_FILE ../../src/ip/system_pll.qip
set_global_assignment -name QIP_FILE ../../../../../mountedfiles/UniBoard_FP7/UniBoard/trunk/Firmware/modules/common/build/synth/quartus/common_jh_unb2.qip
set_global_assignment -name VHDL_FILE ../../../../../mountedfiles/UniBoard_FP7/UniBoard/trunk/Firmware/designs/unb_common/src/vhdl/unb_common_pkg.vhd
set_global_assignment -name QSYS_FILE unb_pinning_qsys.qsys
set_global_assignment -name QSYS_FILE unb2_pinning_qsys.qsys
set_global_assignment -name VHDL_FILE ../../../../../mountedfiles/UniBoard_FP7/UniBoard/trunk/Firmware/modules/dp/src/vhdl/dp_stream_pkg.vhd
set_global_assignment -name VHDL_FILE ../../../../../mountedfiles/UniBoard_FP7/UniBoard/trunk/Firmware/designs/unb_common/src/vhdl/unb_node_ctrl.vhd
set_global_assignment -name VHDL_FILE ../../../../../mountedfiles/UniBoard_FP7/UniBoard/trunk/Firmware/designs/unb_common/src/vhdl/unb_clk_rst.vhd
set_global_assignment -name VHDL_FILE ../../../../../mountedfiles/UniBoard_FP7/UniBoard/trunk/Firmware/designs/unb_common/src/vhdl/unb_pulser.vhd
set_global_assignment -name VHDL_FILE ../../../../../mountedfiles/UniBoard_FP7/UniBoard/trunk/Firmware/designs/unb_common/src/vhdl/unb_system_info.vhd
set_global_assignment -name VHDL_FILE ../../../../../mountedfiles/UniBoard_FP7/UniBoard/trunk/Firmware/designs/unb_common/src/vhdl/unb_wdi_extend.vhd
set_global_assignment -name QIP_FILE ../../../src/ip/ddr4.qip
set_global_assignment -name SIP_FILE ../../../src/ip/ddr4.sip
set_global_assignment -name VHDL_FILE ../../../src/vhdl/unb_pinning.vhd
set_global_assignment -name QIP_FILE ../../src/ip/ddr4.qip
set_global_assignment -name SIP_FILE ../../src/ip/ddr4.sip
set_global_assignment -name VHDL_FILE ../../src/vhdl/unb2_pinning.vhd
......@@ -1333,4 +1333,4 @@ set_instance_assignment -name IO_STANDARD "1.2-V POD" -to MB_II_PARITY
set_global_assignment -name DEVICE 10AX115U3F45I2SGES
set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top
\ No newline at end of file
set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top
boards/uniboard2/designs/unb2_pinning/src/ip/ddr4.qip 0 → 100644
+ 525
− 0
View file @ 4517e733
set_global_assignment -entity "ddr4" -library "ddr4" -name IP_TOOL_NAME "altera_emif"
set_global_assignment -entity "ddr4" -library "ddr4" -name IP_TOOL_VERSION "13.1"
set_global_assignment -entity "ddr4" -library "ddr4" -name IP_TOOL_ENV "mwpim"
set_global_assignment -library "ddr4" -name MISC_FILE [file join $::quartus(qip_path) "ddr4.cmp"]
set_global_assignment -entity "ddr4" -library "ddr4" -name IP_GENERATED_DEVICE_FAMILY "{Arria 10}"
set_global_assignment -name SYNTHESIS_ONLY_QIP ON
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name IO_STANDARD "1.2-V" -to "pll_ref_clk"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name IO_STANDARD "Differential 1.2-V SSTL" -to "mem_ck[0]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name OUTPUT_TERMINATION "SERIES 60 OHM WITH CALIBRATION" -to "mem_ck[0]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name IO_STANDARD "Differential 1.2-V SSTL" -to "mem_ck[1]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name OUTPUT_TERMINATION "SERIES 60 OHM WITH CALIBRATION" -to "mem_ck[1]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name IO_STANDARD "Differential 1.2-V SSTL" -to "mem_ck_n[0]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name OUTPUT_TERMINATION "SERIES 60 OHM WITH CALIBRATION" -to "mem_ck_n[0]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name IO_STANDARD "Differential 1.2-V SSTL" -to "mem_ck_n[1]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name OUTPUT_TERMINATION "SERIES 60 OHM WITH CALIBRATION" -to "mem_ck_n[1]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name IO_STANDARD "SSTL-12" -to "mem_a[0]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name OUTPUT_TERMINATION "SERIES 60 OHM WITH CALIBRATION" -to "mem_a[0]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name SLEW_RATE "1" -to "mem_a[0]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name IO_STANDARD "SSTL-12" -to "mem_a[1]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name OUTPUT_TERMINATION "SERIES 60 OHM WITH CALIBRATION" -to "mem_a[1]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name SLEW_RATE "1" -to "mem_a[1]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name IO_STANDARD "SSTL-12" -to "mem_a[2]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name OUTPUT_TERMINATION "SERIES 60 OHM WITH CALIBRATION" -to "mem_a[2]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name SLEW_RATE "1" -to "mem_a[2]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name IO_STANDARD "SSTL-12" -to "mem_a[3]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name OUTPUT_TERMINATION "SERIES 60 OHM WITH CALIBRATION" -to "mem_a[3]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name SLEW_RATE "1" -to "mem_a[3]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name IO_STANDARD "SSTL-12" -to "mem_a[4]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name OUTPUT_TERMINATION "SERIES 60 OHM WITH CALIBRATION" -to "mem_a[4]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name SLEW_RATE "1" -to "mem_a[4]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name IO_STANDARD "SSTL-12" -to "mem_a[5]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name OUTPUT_TERMINATION "SERIES 60 OHM WITH CALIBRATION" -to "mem_a[5]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name SLEW_RATE "1" -to "mem_a[5]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name IO_STANDARD "SSTL-12" -to "mem_a[6]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name OUTPUT_TERMINATION "SERIES 60 OHM WITH CALIBRATION" -to "mem_a[6]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name SLEW_RATE "1" -to "mem_a[6]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name IO_STANDARD "SSTL-12" -to "mem_a[7]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name OUTPUT_TERMINATION "SERIES 60 OHM WITH CALIBRATION" -to "mem_a[7]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name SLEW_RATE "1" -to "mem_a[7]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name IO_STANDARD "SSTL-12" -to "mem_a[8]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name OUTPUT_TERMINATION "SERIES 60 OHM WITH CALIBRATION" -to "mem_a[8]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name SLEW_RATE "1" -to "mem_a[8]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name IO_STANDARD "SSTL-12" -to "mem_a[9]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name OUTPUT_TERMINATION "SERIES 60 OHM WITH CALIBRATION" -to "mem_a[9]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name SLEW_RATE "1" -to "mem_a[9]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name IO_STANDARD "SSTL-12" -to "mem_a[10]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name OUTPUT_TERMINATION "SERIES 60 OHM WITH CALIBRATION" -to "mem_a[10]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name SLEW_RATE "1" -to "mem_a[10]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name IO_STANDARD "SSTL-12" -to "mem_a[11]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name OUTPUT_TERMINATION "SERIES 60 OHM WITH CALIBRATION" -to "mem_a[11]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name SLEW_RATE "1" -to "mem_a[11]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name IO_STANDARD "SSTL-12" -to "mem_a[12]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name OUTPUT_TERMINATION "SERIES 60 OHM WITH CALIBRATION" -to "mem_a[12]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name SLEW_RATE "1" -to "mem_a[12]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name IO_STANDARD "SSTL-12" -to "mem_a[13]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name OUTPUT_TERMINATION "SERIES 60 OHM WITH CALIBRATION" -to "mem_a[13]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name SLEW_RATE "1" -to "mem_a[13]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name IO_STANDARD "SSTL-12" -to "mem_a[14]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name OUTPUT_TERMINATION "SERIES 60 OHM WITH CALIBRATION" -to "mem_a[14]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name SLEW_RATE "1" -to "mem_a[14]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name IO_STANDARD "SSTL-12" -to "mem_a[15]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name OUTPUT_TERMINATION "SERIES 60 OHM WITH CALIBRATION" -to "mem_a[15]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name SLEW_RATE "1" -to "mem_a[15]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name IO_STANDARD "SSTL-12" -to "mem_a[16]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name OUTPUT_TERMINATION "SERIES 60 OHM WITH CALIBRATION" -to "mem_a[16]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name SLEW_RATE "1" -to "mem_a[16]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name IO_STANDARD "SSTL-12" -to "mem_act_n[0]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name OUTPUT_TERMINATION "SERIES 60 OHM WITH CALIBRATION" -to "mem_act_n[0]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name SLEW_RATE "1" -to "mem_act_n[0]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name IO_STANDARD "SSTL-12" -to "mem_ba[0]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name OUTPUT_TERMINATION "SERIES 60 OHM WITH CALIBRATION" -to "mem_ba[0]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name SLEW_RATE "1" -to "mem_ba[0]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name IO_STANDARD "SSTL-12" -to "mem_ba[1]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name OUTPUT_TERMINATION "SERIES 60 OHM WITH CALIBRATION" -to "mem_ba[1]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name SLEW_RATE "1" -to "mem_ba[1]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name IO_STANDARD "SSTL-12" -to "mem_bg[0]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name OUTPUT_TERMINATION "SERIES 60 OHM WITH CALIBRATION" -to "mem_bg[0]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name SLEW_RATE "1" -to "mem_bg[0]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name IO_STANDARD "SSTL-12" -to "mem_bg[1]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name OUTPUT_TERMINATION "SERIES 60 OHM WITH CALIBRATION" -to "mem_bg[1]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name SLEW_RATE "1" -to "mem_bg[1]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name IO_STANDARD "SSTL-12" -to "mem_cke[0]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name OUTPUT_TERMINATION "SERIES 60 OHM WITH CALIBRATION" -to "mem_cke[0]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name SLEW_RATE "1" -to "mem_cke[0]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name IO_STANDARD "SSTL-12" -to "mem_cke[1]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name OUTPUT_TERMINATION "SERIES 60 OHM WITH CALIBRATION" -to "mem_cke[1]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name SLEW_RATE "1" -to "mem_cke[1]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name IO_STANDARD "SSTL-12" -to "mem_cs_n[0]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name OUTPUT_TERMINATION "SERIES 60 OHM WITH CALIBRATION" -to "mem_cs_n[0]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name SLEW_RATE "1" -to "mem_cs_n[0]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name IO_STANDARD "SSTL-12" -to "mem_cs_n[1]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name OUTPUT_TERMINATION "SERIES 60 OHM WITH CALIBRATION" -to "mem_cs_n[1]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name SLEW_RATE "1" -to "mem_cs_n[1]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name IO_STANDARD "SSTL-12" -to "mem_odt[0]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name OUTPUT_TERMINATION "SERIES 60 OHM WITH CALIBRATION" -to "mem_odt[0]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name SLEW_RATE "1" -to "mem_odt[0]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name IO_STANDARD "SSTL-12" -to "mem_odt[1]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name OUTPUT_TERMINATION "SERIES 60 OHM WITH CALIBRATION" -to "mem_odt[1]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name SLEW_RATE "1" -to "mem_odt[1]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name IO_STANDARD "1.2-V" -to "mem_reset_n[0]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name SLEW_RATE "1" -to "mem_reset_n[0]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name IO_STANDARD "Differential 1.2-V SSTL" -to "mem_dqs[0]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name OUTPUT_TERMINATION "SERIES 60 OHM WITH CALIBRATION" -to "mem_dqs[0]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name INPUT_TERMINATION "PARALLEL 60 OHM WITH CALIBRATION" -to "mem_dqs[0]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name IO_STANDARD "Differential 1.2-V SSTL" -to "mem_dqs[1]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name OUTPUT_TERMINATION "SERIES 60 OHM WITH CALIBRATION" -to "mem_dqs[1]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name INPUT_TERMINATION "PARALLEL 60 OHM WITH CALIBRATION" -to "mem_dqs[1]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name IO_STANDARD "Differential 1.2-V SSTL" -to "mem_dqs[2]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name OUTPUT_TERMINATION "SERIES 60 OHM WITH CALIBRATION" -to "mem_dqs[2]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name INPUT_TERMINATION "PARALLEL 60 OHM WITH CALIBRATION" -to "mem_dqs[2]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name IO_STANDARD "Differential 1.2-V SSTL" -to "mem_dqs[3]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name OUTPUT_TERMINATION "SERIES 60 OHM WITH CALIBRATION" -to "mem_dqs[3]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name INPUT_TERMINATION "PARALLEL 60 OHM WITH CALIBRATION" -to "mem_dqs[3]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name IO_STANDARD "Differential 1.2-V SSTL" -to "mem_dqs[4]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name OUTPUT_TERMINATION "SERIES 60 OHM WITH CALIBRATION" -to "mem_dqs[4]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name INPUT_TERMINATION "PARALLEL 60 OHM WITH CALIBRATION" -to "mem_dqs[4]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name IO_STANDARD "Differential 1.2-V SSTL" -to "mem_dqs[5]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name OUTPUT_TERMINATION "SERIES 60 OHM WITH CALIBRATION" -to "mem_dqs[5]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name INPUT_TERMINATION "PARALLEL 60 OHM WITH CALIBRATION" -to "mem_dqs[5]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name IO_STANDARD "Differential 1.2-V SSTL" -to "mem_dqs[6]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name OUTPUT_TERMINATION "SERIES 60 OHM WITH CALIBRATION" -to "mem_dqs[6]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name INPUT_TERMINATION "PARALLEL 60 OHM WITH CALIBRATION" -to "mem_dqs[6]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name IO_STANDARD "Differential 1.2-V SSTL" -to "mem_dqs[7]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name OUTPUT_TERMINATION "SERIES 60 OHM WITH CALIBRATION" -to "mem_dqs[7]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name INPUT_TERMINATION "PARALLEL 60 OHM WITH CALIBRATION" -to "mem_dqs[7]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name IO_STANDARD "Differential 1.2-V SSTL" -to "mem_dqs[8]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name OUTPUT_TERMINATION "SERIES 60 OHM WITH CALIBRATION" -to "mem_dqs[8]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name INPUT_TERMINATION "PARALLEL 60 OHM WITH CALIBRATION" -to "mem_dqs[8]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name IO_STANDARD "Differential 1.2-V SSTL" -to "mem_dqs_n[0]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name OUTPUT_TERMINATION "SERIES 60 OHM WITH CALIBRATION" -to "mem_dqs_n[0]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name INPUT_TERMINATION "PARALLEL 60 OHM WITH CALIBRATION" -to "mem_dqs_n[0]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name IO_STANDARD "Differential 1.2-V SSTL" -to "mem_dqs_n[1]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name OUTPUT_TERMINATION "SERIES 60 OHM WITH CALIBRATION" -to "mem_dqs_n[1]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name INPUT_TERMINATION "PARALLEL 60 OHM WITH CALIBRATION" -to "mem_dqs_n[1]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name IO_STANDARD "Differential 1.2-V SSTL" -to "mem_dqs_n[2]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name OUTPUT_TERMINATION "SERIES 60 OHM WITH CALIBRATION" -to "mem_dqs_n[2]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name INPUT_TERMINATION "PARALLEL 60 OHM WITH CALIBRATION" -to "mem_dqs_n[2]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name IO_STANDARD "Differential 1.2-V SSTL" -to "mem_dqs_n[3]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name OUTPUT_TERMINATION "SERIES 60 OHM WITH CALIBRATION" -to "mem_dqs_n[3]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name INPUT_TERMINATION "PARALLEL 60 OHM WITH CALIBRATION" -to "mem_dqs_n[3]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name IO_STANDARD "Differential 1.2-V SSTL" -to "mem_dqs_n[4]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name OUTPUT_TERMINATION "SERIES 60 OHM WITH CALIBRATION" -to "mem_dqs_n[4]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name INPUT_TERMINATION "PARALLEL 60 OHM WITH CALIBRATION" -to "mem_dqs_n[4]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name IO_STANDARD "Differential 1.2-V SSTL" -to "mem_dqs_n[5]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name OUTPUT_TERMINATION "SERIES 60 OHM WITH CALIBRATION" -to "mem_dqs_n[5]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name INPUT_TERMINATION "PARALLEL 60 OHM WITH CALIBRATION" -to "mem_dqs_n[5]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name IO_STANDARD "Differential 1.2-V SSTL" -to "mem_dqs_n[6]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name OUTPUT_TERMINATION "SERIES 60 OHM WITH CALIBRATION" -to "mem_dqs_n[6]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name INPUT_TERMINATION "PARALLEL 60 OHM WITH CALIBRATION" -to "mem_dqs_n[6]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name IO_STANDARD "Differential 1.2-V SSTL" -to "mem_dqs_n[7]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name OUTPUT_TERMINATION "SERIES 60 OHM WITH CALIBRATION" -to "mem_dqs_n[7]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name INPUT_TERMINATION "PARALLEL 60 OHM WITH CALIBRATION" -to "mem_dqs_n[7]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name IO_STANDARD "Differential 1.2-V SSTL" -to "mem_dqs_n[8]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name OUTPUT_TERMINATION "SERIES 60 OHM WITH CALIBRATION" -to "mem_dqs_n[8]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name INPUT_TERMINATION "PARALLEL 60 OHM WITH CALIBRATION" -to "mem_dqs_n[8]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name IO_STANDARD "1.2-V POD" -to "mem_dq[0]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name OUTPUT_TERMINATION "SERIES 60 OHM WITH CALIBRATION" -to "mem_dq[0]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name INPUT_TERMINATION "PARALLEL 60 OHM WITH CALIBRATION" -to "mem_dq[0]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name VREF_MODE "CALIBRATED" -to "mem_dq[0]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name IO_STANDARD "1.2-V POD" -to "mem_dq[1]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name OUTPUT_TERMINATION "SERIES 60 OHM WITH CALIBRATION" -to "mem_dq[1]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name INPUT_TERMINATION "PARALLEL 60 OHM WITH CALIBRATION" -to "mem_dq[1]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name VREF_MODE "CALIBRATED" -to "mem_dq[1]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name IO_STANDARD "1.2-V POD" -to "mem_dq[2]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name OUTPUT_TERMINATION "SERIES 60 OHM WITH CALIBRATION" -to "mem_dq[2]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name INPUT_TERMINATION "PARALLEL 60 OHM WITH CALIBRATION" -to "mem_dq[2]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name VREF_MODE "CALIBRATED" -to "mem_dq[2]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name IO_STANDARD "1.2-V POD" -to "mem_dq[3]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name OUTPUT_TERMINATION "SERIES 60 OHM WITH CALIBRATION" -to "mem_dq[3]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name INPUT_TERMINATION "PARALLEL 60 OHM WITH CALIBRATION" -to "mem_dq[3]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name VREF_MODE "CALIBRATED" -to "mem_dq[3]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name IO_STANDARD "1.2-V POD" -to "mem_dq[4]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name OUTPUT_TERMINATION "SERIES 60 OHM WITH CALIBRATION" -to "mem_dq[4]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name INPUT_TERMINATION "PARALLEL 60 OHM WITH CALIBRATION" -to "mem_dq[4]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name VREF_MODE "CALIBRATED" -to "mem_dq[4]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name IO_STANDARD "1.2-V POD" -to "mem_dq[5]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name OUTPUT_TERMINATION "SERIES 60 OHM WITH CALIBRATION" -to "mem_dq[5]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name INPUT_TERMINATION "PARALLEL 60 OHM WITH CALIBRATION" -to "mem_dq[5]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name VREF_MODE "CALIBRATED" -to "mem_dq[5]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name IO_STANDARD "1.2-V POD" -to "mem_dq[6]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name OUTPUT_TERMINATION "SERIES 60 OHM WITH CALIBRATION" -to "mem_dq[6]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name INPUT_TERMINATION "PARALLEL 60 OHM WITH CALIBRATION" -to "mem_dq[6]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name VREF_MODE "CALIBRATED" -to "mem_dq[6]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name IO_STANDARD "1.2-V POD" -to "mem_dq[7]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name OUTPUT_TERMINATION "SERIES 60 OHM WITH CALIBRATION" -to "mem_dq[7]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name INPUT_TERMINATION "PARALLEL 60 OHM WITH CALIBRATION" -to "mem_dq[7]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name VREF_MODE "CALIBRATED" -to "mem_dq[7]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name IO_STANDARD "1.2-V POD" -to "mem_dq[8]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name OUTPUT_TERMINATION "SERIES 60 OHM WITH CALIBRATION" -to "mem_dq[8]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name INPUT_TERMINATION "PARALLEL 60 OHM WITH CALIBRATION" -to "mem_dq[8]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name VREF_MODE "CALIBRATED" -to "mem_dq[8]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name IO_STANDARD "1.2-V POD" -to "mem_dq[9]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name OUTPUT_TERMINATION "SERIES 60 OHM WITH CALIBRATION" -to "mem_dq[9]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name INPUT_TERMINATION "PARALLEL 60 OHM WITH CALIBRATION" -to "mem_dq[9]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name VREF_MODE "CALIBRATED" -to "mem_dq[9]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name IO_STANDARD "1.2-V POD" -to "mem_dq[10]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name OUTPUT_TERMINATION "SERIES 60 OHM WITH CALIBRATION" -to "mem_dq[10]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name INPUT_TERMINATION "PARALLEL 60 OHM WITH CALIBRATION" -to "mem_dq[10]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name VREF_MODE "CALIBRATED" -to "mem_dq[10]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name IO_STANDARD "1.2-V POD" -to "mem_dq[11]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name OUTPUT_TERMINATION "SERIES 60 OHM WITH CALIBRATION" -to "mem_dq[11]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name INPUT_TERMINATION "PARALLEL 60 OHM WITH CALIBRATION" -to "mem_dq[11]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name VREF_MODE "CALIBRATED" -to "mem_dq[11]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name IO_STANDARD "1.2-V POD" -to "mem_dq[12]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name OUTPUT_TERMINATION "SERIES 60 OHM WITH CALIBRATION" -to "mem_dq[12]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name INPUT_TERMINATION "PARALLEL 60 OHM WITH CALIBRATION" -to "mem_dq[12]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name VREF_MODE "CALIBRATED" -to "mem_dq[12]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name IO_STANDARD "1.2-V POD" -to "mem_dq[13]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name OUTPUT_TERMINATION "SERIES 60 OHM WITH CALIBRATION" -to "mem_dq[13]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name INPUT_TERMINATION "PARALLEL 60 OHM WITH CALIBRATION" -to "mem_dq[13]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name VREF_MODE "CALIBRATED" -to "mem_dq[13]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name IO_STANDARD "1.2-V POD" -to "mem_dq[14]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name OUTPUT_TERMINATION "SERIES 60 OHM WITH CALIBRATION" -to "mem_dq[14]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name INPUT_TERMINATION "PARALLEL 60 OHM WITH CALIBRATION" -to "mem_dq[14]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name VREF_MODE "CALIBRATED" -to "mem_dq[14]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name IO_STANDARD "1.2-V POD" -to "mem_dq[15]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name OUTPUT_TERMINATION "SERIES 60 OHM WITH CALIBRATION" -to "mem_dq[15]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name INPUT_TERMINATION "PARALLEL 60 OHM WITH CALIBRATION" -to "mem_dq[15]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name VREF_MODE "CALIBRATED" -to "mem_dq[15]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name IO_STANDARD "1.2-V POD" -to "mem_dq[16]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name OUTPUT_TERMINATION "SERIES 60 OHM WITH CALIBRATION" -to "mem_dq[16]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name INPUT_TERMINATION "PARALLEL 60 OHM WITH CALIBRATION" -to "mem_dq[16]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name VREF_MODE "CALIBRATED" -to "mem_dq[16]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name IO_STANDARD "1.2-V POD" -to "mem_dq[17]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name OUTPUT_TERMINATION "SERIES 60 OHM WITH CALIBRATION" -to "mem_dq[17]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name INPUT_TERMINATION "PARALLEL 60 OHM WITH CALIBRATION" -to "mem_dq[17]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name VREF_MODE "CALIBRATED" -to "mem_dq[17]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name IO_STANDARD "1.2-V POD" -to "mem_dq[18]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name OUTPUT_TERMINATION "SERIES 60 OHM WITH CALIBRATION" -to "mem_dq[18]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name INPUT_TERMINATION "PARALLEL 60 OHM WITH CALIBRATION" -to "mem_dq[18]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name VREF_MODE "CALIBRATED" -to "mem_dq[18]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name IO_STANDARD "1.2-V POD" -to "mem_dq[19]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name OUTPUT_TERMINATION "SERIES 60 OHM WITH CALIBRATION" -to "mem_dq[19]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name INPUT_TERMINATION "PARALLEL 60 OHM WITH CALIBRATION" -to "mem_dq[19]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name VREF_MODE "CALIBRATED" -to "mem_dq[19]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name IO_STANDARD "1.2-V POD" -to "mem_dq[20]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name OUTPUT_TERMINATION "SERIES 60 OHM WITH CALIBRATION" -to "mem_dq[20]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name INPUT_TERMINATION "PARALLEL 60 OHM WITH CALIBRATION" -to "mem_dq[20]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name VREF_MODE "CALIBRATED" -to "mem_dq[20]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name IO_STANDARD "1.2-V POD" -to "mem_dq[21]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name OUTPUT_TERMINATION "SERIES 60 OHM WITH CALIBRATION" -to "mem_dq[21]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name INPUT_TERMINATION "PARALLEL 60 OHM WITH CALIBRATION" -to "mem_dq[21]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name VREF_MODE "CALIBRATED" -to "mem_dq[21]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name IO_STANDARD "1.2-V POD" -to "mem_dq[22]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name OUTPUT_TERMINATION "SERIES 60 OHM WITH CALIBRATION" -to "mem_dq[22]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name INPUT_TERMINATION "PARALLEL 60 OHM WITH CALIBRATION" -to "mem_dq[22]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name VREF_MODE "CALIBRATED" -to "mem_dq[22]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name IO_STANDARD "1.2-V POD" -to "mem_dq[23]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name OUTPUT_TERMINATION "SERIES 60 OHM WITH CALIBRATION" -to "mem_dq[23]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name INPUT_TERMINATION "PARALLEL 60 OHM WITH CALIBRATION" -to "mem_dq[23]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name VREF_MODE "CALIBRATED" -to "mem_dq[23]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name IO_STANDARD "1.2-V POD" -to "mem_dq[24]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name OUTPUT_TERMINATION "SERIES 60 OHM WITH CALIBRATION" -to "mem_dq[24]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name INPUT_TERMINATION "PARALLEL 60 OHM WITH CALIBRATION" -to "mem_dq[24]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name VREF_MODE "CALIBRATED" -to "mem_dq[24]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name IO_STANDARD "1.2-V POD" -to "mem_dq[25]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name OUTPUT_TERMINATION "SERIES 60 OHM WITH CALIBRATION" -to "mem_dq[25]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name INPUT_TERMINATION "PARALLEL 60 OHM WITH CALIBRATION" -to "mem_dq[25]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name VREF_MODE "CALIBRATED" -to "mem_dq[25]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name IO_STANDARD "1.2-V POD" -to "mem_dq[26]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name OUTPUT_TERMINATION "SERIES 60 OHM WITH CALIBRATION" -to "mem_dq[26]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name INPUT_TERMINATION "PARALLEL 60 OHM WITH CALIBRATION" -to "mem_dq[26]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name VREF_MODE "CALIBRATED" -to "mem_dq[26]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name IO_STANDARD "1.2-V POD" -to "mem_dq[27]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name OUTPUT_TERMINATION "SERIES 60 OHM WITH CALIBRATION" -to "mem_dq[27]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name INPUT_TERMINATION "PARALLEL 60 OHM WITH CALIBRATION" -to "mem_dq[27]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name VREF_MODE "CALIBRATED" -to "mem_dq[27]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name IO_STANDARD "1.2-V POD" -to "mem_dq[28]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name OUTPUT_TERMINATION "SERIES 60 OHM WITH CALIBRATION" -to "mem_dq[28]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name INPUT_TERMINATION "PARALLEL 60 OHM WITH CALIBRATION" -to "mem_dq[28]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name VREF_MODE "CALIBRATED" -to "mem_dq[28]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name IO_STANDARD "1.2-V POD" -to "mem_dq[29]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name OUTPUT_TERMINATION "SERIES 60 OHM WITH CALIBRATION" -to "mem_dq[29]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name INPUT_TERMINATION "PARALLEL 60 OHM WITH CALIBRATION" -to "mem_dq[29]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name VREF_MODE "CALIBRATED" -to "mem_dq[29]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name IO_STANDARD "1.2-V POD" -to "mem_dq[30]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name OUTPUT_TERMINATION "SERIES 60 OHM WITH CALIBRATION" -to "mem_dq[30]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name INPUT_TERMINATION "PARALLEL 60 OHM WITH CALIBRATION" -to "mem_dq[30]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name VREF_MODE "CALIBRATED" -to "mem_dq[30]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name IO_STANDARD "1.2-V POD" -to "mem_dq[31]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name OUTPUT_TERMINATION "SERIES 60 OHM WITH CALIBRATION" -to "mem_dq[31]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name INPUT_TERMINATION "PARALLEL 60 OHM WITH CALIBRATION" -to "mem_dq[31]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name VREF_MODE "CALIBRATED" -to "mem_dq[31]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name IO_STANDARD "1.2-V POD" -to "mem_dq[32]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name OUTPUT_TERMINATION "SERIES 60 OHM WITH CALIBRATION" -to "mem_dq[32]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name INPUT_TERMINATION "PARALLEL 60 OHM WITH CALIBRATION" -to "mem_dq[32]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name VREF_MODE "CALIBRATED" -to "mem_dq[32]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name IO_STANDARD "1.2-V POD" -to "mem_dq[33]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name OUTPUT_TERMINATION "SERIES 60 OHM WITH CALIBRATION" -to "mem_dq[33]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name INPUT_TERMINATION "PARALLEL 60 OHM WITH CALIBRATION" -to "mem_dq[33]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name VREF_MODE "CALIBRATED" -to "mem_dq[33]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name IO_STANDARD "1.2-V POD" -to "mem_dq[34]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name OUTPUT_TERMINATION "SERIES 60 OHM WITH CALIBRATION" -to "mem_dq[34]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name INPUT_TERMINATION "PARALLEL 60 OHM WITH CALIBRATION" -to "mem_dq[34]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name VREF_MODE "CALIBRATED" -to "mem_dq[34]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name IO_STANDARD "1.2-V POD" -to "mem_dq[35]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name OUTPUT_TERMINATION "SERIES 60 OHM WITH CALIBRATION" -to "mem_dq[35]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name INPUT_TERMINATION "PARALLEL 60 OHM WITH CALIBRATION" -to "mem_dq[35]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name VREF_MODE "CALIBRATED" -to "mem_dq[35]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name IO_STANDARD "1.2-V POD" -to "mem_dq[36]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name OUTPUT_TERMINATION "SERIES 60 OHM WITH CALIBRATION" -to "mem_dq[36]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name INPUT_TERMINATION "PARALLEL 60 OHM WITH CALIBRATION" -to "mem_dq[36]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name VREF_MODE "CALIBRATED" -to "mem_dq[36]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name IO_STANDARD "1.2-V POD" -to "mem_dq[37]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name OUTPUT_TERMINATION "SERIES 60 OHM WITH CALIBRATION" -to "mem_dq[37]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name INPUT_TERMINATION "PARALLEL 60 OHM WITH CALIBRATION" -to "mem_dq[37]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name VREF_MODE "CALIBRATED" -to "mem_dq[37]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name IO_STANDARD "1.2-V POD" -to "mem_dq[38]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name OUTPUT_TERMINATION "SERIES 60 OHM WITH CALIBRATION" -to "mem_dq[38]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name INPUT_TERMINATION "PARALLEL 60 OHM WITH CALIBRATION" -to "mem_dq[38]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name VREF_MODE "CALIBRATED" -to "mem_dq[38]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name IO_STANDARD "1.2-V POD" -to "mem_dq[39]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name OUTPUT_TERMINATION "SERIES 60 OHM WITH CALIBRATION" -to "mem_dq[39]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name INPUT_TERMINATION "PARALLEL 60 OHM WITH CALIBRATION" -to "mem_dq[39]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name VREF_MODE "CALIBRATED" -to "mem_dq[39]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name IO_STANDARD "1.2-V POD" -to "mem_dq[40]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name OUTPUT_TERMINATION "SERIES 60 OHM WITH CALIBRATION" -to "mem_dq[40]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name INPUT_TERMINATION "PARALLEL 60 OHM WITH CALIBRATION" -to "mem_dq[40]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name VREF_MODE "CALIBRATED" -to "mem_dq[40]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name IO_STANDARD "1.2-V POD" -to "mem_dq[41]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name OUTPUT_TERMINATION "SERIES 60 OHM WITH CALIBRATION" -to "mem_dq[41]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name INPUT_TERMINATION "PARALLEL 60 OHM WITH CALIBRATION" -to "mem_dq[41]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name VREF_MODE "CALIBRATED" -to "mem_dq[41]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name IO_STANDARD "1.2-V POD" -to "mem_dq[42]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name OUTPUT_TERMINATION "SERIES 60 OHM WITH CALIBRATION" -to "mem_dq[42]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name INPUT_TERMINATION "PARALLEL 60 OHM WITH CALIBRATION" -to "mem_dq[42]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name VREF_MODE "CALIBRATED" -to "mem_dq[42]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name IO_STANDARD "1.2-V POD" -to "mem_dq[43]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name OUTPUT_TERMINATION "SERIES 60 OHM WITH CALIBRATION" -to "mem_dq[43]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name INPUT_TERMINATION "PARALLEL 60 OHM WITH CALIBRATION" -to "mem_dq[43]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name VREF_MODE "CALIBRATED" -to "mem_dq[43]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name IO_STANDARD "1.2-V POD" -to "mem_dq[44]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name OUTPUT_TERMINATION "SERIES 60 OHM WITH CALIBRATION" -to "mem_dq[44]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name INPUT_TERMINATION "PARALLEL 60 OHM WITH CALIBRATION" -to "mem_dq[44]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name VREF_MODE "CALIBRATED" -to "mem_dq[44]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name IO_STANDARD "1.2-V POD" -to "mem_dq[45]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name OUTPUT_TERMINATION "SERIES 60 OHM WITH CALIBRATION" -to "mem_dq[45]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name INPUT_TERMINATION "PARALLEL 60 OHM WITH CALIBRATION" -to "mem_dq[45]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name VREF_MODE "CALIBRATED" -to "mem_dq[45]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name IO_STANDARD "1.2-V POD" -to "mem_dq[46]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name OUTPUT_TERMINATION "SERIES 60 OHM WITH CALIBRATION" -to "mem_dq[46]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name INPUT_TERMINATION "PARALLEL 60 OHM WITH CALIBRATION" -to "mem_dq[46]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name VREF_MODE "CALIBRATED" -to "mem_dq[46]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name IO_STANDARD "1.2-V POD" -to "mem_dq[47]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name OUTPUT_TERMINATION "SERIES 60 OHM WITH CALIBRATION" -to "mem_dq[47]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name INPUT_TERMINATION "PARALLEL 60 OHM WITH CALIBRATION" -to "mem_dq[47]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name VREF_MODE "CALIBRATED" -to "mem_dq[47]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name IO_STANDARD "1.2-V POD" -to "mem_dq[48]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name OUTPUT_TERMINATION "SERIES 60 OHM WITH CALIBRATION" -to "mem_dq[48]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name INPUT_TERMINATION "PARALLEL 60 OHM WITH CALIBRATION" -to "mem_dq[48]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name VREF_MODE "CALIBRATED" -to "mem_dq[48]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name IO_STANDARD "1.2-V POD" -to "mem_dq[49]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name OUTPUT_TERMINATION "SERIES 60 OHM WITH CALIBRATION" -to "mem_dq[49]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name INPUT_TERMINATION "PARALLEL 60 OHM WITH CALIBRATION" -to "mem_dq[49]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name VREF_MODE "CALIBRATED" -to "mem_dq[49]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name IO_STANDARD "1.2-V POD" -to "mem_dq[50]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name OUTPUT_TERMINATION "SERIES 60 OHM WITH CALIBRATION" -to "mem_dq[50]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name INPUT_TERMINATION "PARALLEL 60 OHM WITH CALIBRATION" -to "mem_dq[50]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name VREF_MODE "CALIBRATED" -to "mem_dq[50]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name IO_STANDARD "1.2-V POD" -to "mem_dq[51]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name OUTPUT_TERMINATION "SERIES 60 OHM WITH CALIBRATION" -to "mem_dq[51]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name INPUT_TERMINATION "PARALLEL 60 OHM WITH CALIBRATION" -to "mem_dq[51]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name VREF_MODE "CALIBRATED" -to "mem_dq[51]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name IO_STANDARD "1.2-V POD" -to "mem_dq[52]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name OUTPUT_TERMINATION "SERIES 60 OHM WITH CALIBRATION" -to "mem_dq[52]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name INPUT_TERMINATION "PARALLEL 60 OHM WITH CALIBRATION" -to "mem_dq[52]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name VREF_MODE "CALIBRATED" -to "mem_dq[52]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name IO_STANDARD "1.2-V POD" -to "mem_dq[53]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name OUTPUT_TERMINATION "SERIES 60 OHM WITH CALIBRATION" -to "mem_dq[53]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name INPUT_TERMINATION "PARALLEL 60 OHM WITH CALIBRATION" -to "mem_dq[53]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name VREF_MODE "CALIBRATED" -to "mem_dq[53]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name IO_STANDARD "1.2-V POD" -to "mem_dq[54]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name OUTPUT_TERMINATION "SERIES 60 OHM WITH CALIBRATION" -to "mem_dq[54]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name INPUT_TERMINATION "PARALLEL 60 OHM WITH CALIBRATION" -to "mem_dq[54]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name VREF_MODE "CALIBRATED" -to "mem_dq[54]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name IO_STANDARD "1.2-V POD" -to "mem_dq[55]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name OUTPUT_TERMINATION "SERIES 60 OHM WITH CALIBRATION" -to "mem_dq[55]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name INPUT_TERMINATION "PARALLEL 60 OHM WITH CALIBRATION" -to "mem_dq[55]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name VREF_MODE "CALIBRATED" -to "mem_dq[55]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name IO_STANDARD "1.2-V POD" -to "mem_dq[56]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name OUTPUT_TERMINATION "SERIES 60 OHM WITH CALIBRATION" -to "mem_dq[56]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name INPUT_TERMINATION "PARALLEL 60 OHM WITH CALIBRATION" -to "mem_dq[56]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name VREF_MODE "CALIBRATED" -to "mem_dq[56]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name IO_STANDARD "1.2-V POD" -to "mem_dq[57]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name OUTPUT_TERMINATION "SERIES 60 OHM WITH CALIBRATION" -to "mem_dq[57]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name INPUT_TERMINATION "PARALLEL 60 OHM WITH CALIBRATION" -to "mem_dq[57]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name VREF_MODE "CALIBRATED" -to "mem_dq[57]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name IO_STANDARD "1.2-V POD" -to "mem_dq[58]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name OUTPUT_TERMINATION "SERIES 60 OHM WITH CALIBRATION" -to "mem_dq[58]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name INPUT_TERMINATION "PARALLEL 60 OHM WITH CALIBRATION" -to "mem_dq[58]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name VREF_MODE "CALIBRATED" -to "mem_dq[58]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name IO_STANDARD "1.2-V POD" -to "mem_dq[59]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name OUTPUT_TERMINATION "SERIES 60 OHM WITH CALIBRATION" -to "mem_dq[59]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name INPUT_TERMINATION "PARALLEL 60 OHM WITH CALIBRATION" -to "mem_dq[59]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name VREF_MODE "CALIBRATED" -to "mem_dq[59]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name IO_STANDARD "1.2-V POD" -to "mem_dq[60]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name OUTPUT_TERMINATION "SERIES 60 OHM WITH CALIBRATION" -to "mem_dq[60]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name INPUT_TERMINATION "PARALLEL 60 OHM WITH CALIBRATION" -to "mem_dq[60]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name VREF_MODE "CALIBRATED" -to "mem_dq[60]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name IO_STANDARD "1.2-V POD" -to "mem_dq[61]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name OUTPUT_TERMINATION "SERIES 60 OHM WITH CALIBRATION" -to "mem_dq[61]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name INPUT_TERMINATION "PARALLEL 60 OHM WITH CALIBRATION" -to "mem_dq[61]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name VREF_MODE "CALIBRATED" -to "mem_dq[61]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name IO_STANDARD "1.2-V POD" -to "mem_dq[62]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name OUTPUT_TERMINATION "SERIES 60 OHM WITH CALIBRATION" -to "mem_dq[62]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name INPUT_TERMINATION "PARALLEL 60 OHM WITH CALIBRATION" -to "mem_dq[62]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name VREF_MODE "CALIBRATED" -to "mem_dq[62]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name IO_STANDARD "1.2-V POD" -to "mem_dq[63]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name OUTPUT_TERMINATION "SERIES 60 OHM WITH CALIBRATION" -to "mem_dq[63]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name INPUT_TERMINATION "PARALLEL 60 OHM WITH CALIBRATION" -to "mem_dq[63]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name VREF_MODE "CALIBRATED" -to "mem_dq[63]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name IO_STANDARD "1.2-V POD" -to "mem_dq[64]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name OUTPUT_TERMINATION "SERIES 60 OHM WITH CALIBRATION" -to "mem_dq[64]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name INPUT_TERMINATION "PARALLEL 60 OHM WITH CALIBRATION" -to "mem_dq[64]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name VREF_MODE "CALIBRATED" -to "mem_dq[64]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name IO_STANDARD "1.2-V POD" -to "mem_dq[65]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name OUTPUT_TERMINATION "SERIES 60 OHM WITH CALIBRATION" -to "mem_dq[65]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name INPUT_TERMINATION "PARALLEL 60 OHM WITH CALIBRATION" -to "mem_dq[65]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name VREF_MODE "CALIBRATED" -to "mem_dq[65]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name IO_STANDARD "1.2-V POD" -to "mem_dq[66]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name OUTPUT_TERMINATION "SERIES 60 OHM WITH CALIBRATION" -to "mem_dq[66]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name INPUT_TERMINATION "PARALLEL 60 OHM WITH CALIBRATION" -to "mem_dq[66]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name VREF_MODE "CALIBRATED" -to "mem_dq[66]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name IO_STANDARD "1.2-V POD" -to "mem_dq[67]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name OUTPUT_TERMINATION "SERIES 60 OHM WITH CALIBRATION" -to "mem_dq[67]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name INPUT_TERMINATION "PARALLEL 60 OHM WITH CALIBRATION" -to "mem_dq[67]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name VREF_MODE "CALIBRATED" -to "mem_dq[67]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name IO_STANDARD "1.2-V POD" -to "mem_dq[68]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name OUTPUT_TERMINATION "SERIES 60 OHM WITH CALIBRATION" -to "mem_dq[68]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name INPUT_TERMINATION "PARALLEL 60 OHM WITH CALIBRATION" -to "mem_dq[68]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name VREF_MODE "CALIBRATED" -to "mem_dq[68]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name IO_STANDARD "1.2-V POD" -to "mem_dq[69]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name OUTPUT_TERMINATION "SERIES 60 OHM WITH CALIBRATION" -to "mem_dq[69]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name INPUT_TERMINATION "PARALLEL 60 OHM WITH CALIBRATION" -to "mem_dq[69]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name VREF_MODE "CALIBRATED" -to "mem_dq[69]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name IO_STANDARD "1.2-V POD" -to "mem_dq[70]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name OUTPUT_TERMINATION "SERIES 60 OHM WITH CALIBRATION" -to "mem_dq[70]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name INPUT_TERMINATION "PARALLEL 60 OHM WITH CALIBRATION" -to "mem_dq[70]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name VREF_MODE "CALIBRATED" -to "mem_dq[70]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name IO_STANDARD "1.2-V POD" -to "mem_dq[71]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name OUTPUT_TERMINATION "SERIES 60 OHM WITH CALIBRATION" -to "mem_dq[71]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name INPUT_TERMINATION "PARALLEL 60 OHM WITH CALIBRATION" -to "mem_dq[71]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name VREF_MODE "CALIBRATED" -to "mem_dq[71]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name IO_STANDARD "1.2-V POD" -to "mem_dbi_n[0]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name OUTPUT_TERMINATION "SERIES 60 OHM WITH CALIBRATION" -to "mem_dbi_n[0]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name INPUT_TERMINATION "PARALLEL 60 OHM WITH CALIBRATION" -to "mem_dbi_n[0]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name VREF_MODE "CALIBRATED" -to "mem_dbi_n[0]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name IO_STANDARD "1.2-V POD" -to "mem_dbi_n[1]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name OUTPUT_TERMINATION "SERIES 60 OHM WITH CALIBRATION" -to "mem_dbi_n[1]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name INPUT_TERMINATION "PARALLEL 60 OHM WITH CALIBRATION" -to "mem_dbi_n[1]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name VREF_MODE "CALIBRATED" -to "mem_dbi_n[1]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name IO_STANDARD "1.2-V POD" -to "mem_dbi_n[2]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name OUTPUT_TERMINATION "SERIES 60 OHM WITH CALIBRATION" -to "mem_dbi_n[2]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name INPUT_TERMINATION "PARALLEL 60 OHM WITH CALIBRATION" -to "mem_dbi_n[2]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name VREF_MODE "CALIBRATED" -to "mem_dbi_n[2]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name IO_STANDARD "1.2-V POD" -to "mem_dbi_n[3]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name OUTPUT_TERMINATION "SERIES 60 OHM WITH CALIBRATION" -to "mem_dbi_n[3]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name INPUT_TERMINATION "PARALLEL 60 OHM WITH CALIBRATION" -to "mem_dbi_n[3]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name VREF_MODE "CALIBRATED" -to "mem_dbi_n[3]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name IO_STANDARD "1.2-V POD" -to "mem_dbi_n[4]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name OUTPUT_TERMINATION "SERIES 60 OHM WITH CALIBRATION" -to "mem_dbi_n[4]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name INPUT_TERMINATION "PARALLEL 60 OHM WITH CALIBRATION" -to "mem_dbi_n[4]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name VREF_MODE "CALIBRATED" -to "mem_dbi_n[4]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name IO_STANDARD "1.2-V POD" -to "mem_dbi_n[5]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name OUTPUT_TERMINATION "SERIES 60 OHM WITH CALIBRATION" -to "mem_dbi_n[5]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name INPUT_TERMINATION "PARALLEL 60 OHM WITH CALIBRATION" -to "mem_dbi_n[5]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name VREF_MODE "CALIBRATED" -to "mem_dbi_n[5]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name IO_STANDARD "1.2-V POD" -to "mem_dbi_n[6]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name OUTPUT_TERMINATION "SERIES 60 OHM WITH CALIBRATION" -to "mem_dbi_n[6]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name INPUT_TERMINATION "PARALLEL 60 OHM WITH CALIBRATION" -to "mem_dbi_n[6]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name VREF_MODE "CALIBRATED" -to "mem_dbi_n[6]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name IO_STANDARD "1.2-V POD" -to "mem_dbi_n[7]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name OUTPUT_TERMINATION "SERIES 60 OHM WITH CALIBRATION" -to "mem_dbi_n[7]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name INPUT_TERMINATION "PARALLEL 60 OHM WITH CALIBRATION" -to "mem_dbi_n[7]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name VREF_MODE "CALIBRATED" -to "mem_dbi_n[7]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name IO_STANDARD "1.2-V POD" -to "mem_dbi_n[8]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name OUTPUT_TERMINATION "SERIES 60 OHM WITH CALIBRATION" -to "mem_dbi_n[8]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name INPUT_TERMINATION "PARALLEL 60 OHM WITH CALIBRATION" -to "mem_dbi_n[8]"
set_instance_assignment -entity "ddr4_arch" -library "ddr4" -name VREF_MODE "CALIBRATED" -to "mem_dbi_n[8]"
set_global_assignment -library "ddr4" -name VHDL_FILE [file join $::quartus(qip_path) "ddr4.vhd"]
set_global_assignment -library "ddr4" -name VERILOG_FILE [file join $::quartus(qip_path) "ddr4/ddr4_0002.v"]
set_global_assignment -library "ddr4" -name SYSTEMVERILOG_FILE [file join $::quartus(qip_path) "ddr4/ddr4_arch.sv"]
set_global_assignment -library "ddr4" -name SYSTEMVERILOG_FILE [file join $::quartus(qip_path) "ddr4/altera_emif_arch_nf_top.sv"]
set_global_assignment -library "ddr4" -name SYSTEMVERILOG_FILE [file join $::quartus(qip_path) "ddr4/altera_emif_arch_nf_bufs.sv"]
set_global_assignment -library "ddr4" -name SYSTEMVERILOG_FILE [file join $::quartus(qip_path) "ddr4/altera_emif_arch_nf_buf_udir_se_i.sv"]
set_global_assignment -library "ddr4" -name SYSTEMVERILOG_FILE [file join $::quartus(qip_path) "ddr4/altera_emif_arch_nf_buf_udir_se_o.sv"]
set_global_assignment -library "ddr4" -name SYSTEMVERILOG_FILE [file join $::quartus(qip_path) "ddr4/altera_emif_arch_nf_buf_udir_df_i.sv"]
set_global_assignment -library "ddr4" -name SYSTEMVERILOG_FILE [file join $::quartus(qip_path) "ddr4/altera_emif_arch_nf_buf_udir_df_o.sv"]
set_global_assignment -library "ddr4" -name SYSTEMVERILOG_FILE [file join $::quartus(qip_path) "ddr4/altera_emif_arch_nf_buf_udir_cp_i.sv"]
set_global_assignment -library "ddr4" -name SYSTEMVERILOG_FILE [file join $::quartus(qip_path) "ddr4/altera_emif_arch_nf_buf_bdir_df.sv"]
set_global_assignment -library "ddr4" -name SYSTEMVERILOG_FILE [file join $::quartus(qip_path) "ddr4/altera_emif_arch_nf_buf_bdir_se.sv"]
set_global_assignment -library "ddr4" -name SYSTEMVERILOG_FILE [file join $::quartus(qip_path) "ddr4/altera_emif_arch_nf_buf_unused.sv"]
set_global_assignment -library "ddr4" -name SYSTEMVERILOG_FILE [file join $::quartus(qip_path) "ddr4/altera_emif_arch_nf_pll.sv"]
set_global_assignment -library "ddr4" -name SYSTEMVERILOG_FILE [file join $::quartus(qip_path) "ddr4/altera_emif_arch_nf_oct.sv"]
set_global_assignment -library "ddr4" -name SYSTEMVERILOG_FILE [file join $::quartus(qip_path) "ddr4/altera_emif_arch_nf_core_clks_rsts.sv"]
set_global_assignment -library "ddr4" -name SYSTEMVERILOG_FILE [file join $::quartus(qip_path) "ddr4/altera_emif_arch_nf_io_aux.sv"]
set_global_assignment -library "ddr4" -name SYSTEMVERILOG_FILE [file join $::quartus(qip_path) "ddr4/altera_emif_arch_nf_io_tiles.sv"]
set_global_assignment -library "ddr4" -name SYSTEMVERILOG_FILE [file join $::quartus(qip_path) "ddr4/altera_emif_arch_nf_data_if.sv"]
set_global_assignment -library "ddr4" -name SYSTEMVERILOG_FILE [file join $::quartus(qip_path) "ddr4/altera_emif_arch_nf_hmc_avl_if.sv"]
set_global_assignment -library "ddr4" -name SYSTEMVERILOG_FILE [file join $::quartus(qip_path) "ddr4/altera_emif_arch_nf_hmc_sideband_if.sv"]
set_global_assignment -library "ddr4" -name SYSTEMVERILOG_FILE [file join $::quartus(qip_path) "ddr4/altera_emif_arch_nf_hmc_mmr_if.sv"]
set_global_assignment -library "ddr4" -name SYSTEMVERILOG_FILE [file join $::quartus(qip_path) "ddr4/altera_emif_arch_nf_afi_if.sv"]
set_global_assignment -library "ddr4" -name TCL_FILE [file join $::quartus(qip_path) "ddr4/ddr4_ip_parameters.tcl"]
set_global_assignment -library "ddr4" -name TCL_FILE [file join $::quartus(qip_path) "ddr4/ddr4_parameters.tcl"]
set_global_assignment -library "ddr4" -name TCL_FILE [file join $::quartus(qip_path) "ddr4/ddr4_pin_assignments.tcl"]
set_global_assignment -library "ddr4" -name TCL_FILE [file join $::quartus(qip_path) "ddr4/ddr4_pin_map.tcl"]
set_global_assignment -library "ddr4" -name TCL_FILE [file join $::quartus(qip_path) "ddr4/ddr4_report_io_timing.tcl"]
set_global_assignment -library "ddr4" -name TCL_FILE [file join $::quartus(qip_path) "ddr4/ddr4_report_timing.tcl"]
set_global_assignment -library "ddr4" -name TCL_FILE [file join $::quartus(qip_path) "ddr4/ddr4_report_timing_core.tcl"]
set_global_assignment -library "ddr4" -name SDC_FILE [file join $::quartus(qip_path) "ddr4/ddr4.sdc"]
set_global_assignment -library "ddr4" -name SOURCE_FILE [file join $::quartus(qip_path) "ddr4/ddr4_seq_params_sim.hex"]
set_global_assignment -library "ddr4" -name SOURCE_FILE [file join $::quartus(qip_path) "ddr4/ddr4_seq_params_sim.txt"]
set_global_assignment -library "ddr4" -name SOURCE_FILE [file join $::quartus(qip_path) "ddr4/ddr4_seq_params_synth.hex"]
set_global_assignment -library "ddr4" -name SOURCE_FILE [file join $::quartus(qip_path) "ddr4/ddr4_seq_params_synth.txt"]
set_global_assignment -library "ddr4" -name SOURCE_FILE [file join $::quartus(qip_path) "ddr4/ddr4_seq_cal_sim.hex"]
set_global_assignment -library "ddr4" -name SOURCE_FILE [file join $::quartus(qip_path) "ddr4/ddr4_seq_cal_synth.hex"]
set_global_assignment -library "ddr4" -name SOURCE_FILE [file join $::quartus(qip_path) "ddr4/ddr4_readme.txt"]
set_global_assignment -entity "ddr4_0002" -library "ddr4" -name IP_TOOL_NAME "altera_emif"
set_global_assignment -entity "ddr4_0002" -library "ddr4" -name IP_TOOL_VERSION "13.1"
set_global_assignment -entity "ddr4_0002" -library "ddr4" -name IP_TOOL_ENV "mwpim"
set_global_assignment -entity "ddr4_arch" -library "ddr4" -name IP_TOOL_NAME "altera_emif_arch_nf"
set_global_assignment -entity "ddr4_arch" -library "ddr4" -name IP_TOOL_VERSION "13.1"
set_global_assignment -entity "ddr4_arch" -library "ddr4" -name IP_TOOL_ENV "mwpim"
boards/uniboard2/designs/unb2_pinning/src/ip/ddr4.sip 0 → 100644
+ 55
− 0
View file @ 4517e733
set_global_assignment -entity "ddr4" -library "lib_ddr4" -name IP_TOOL_NAME "altera_emif"
set_global_assignment -entity "ddr4" -library "lib_ddr4" -name IP_TOOL_VERSION "13.1"
set_global_assignment -entity "ddr4" -library "lib_ddr4" -name IP_TOOL_ENV "mwpim"
set_global_assignment -library "lib_ddr4" -name SPD_FILE [file join $::quartus(sip_path) "ddr4.spd"]
set_global_assignment -library "lib_ddr4" -name MISC_FILE [file join $::quartus(sip_path) "ddr4_sim/ddr4.vhd"]
set_global_assignment -library "lib_ddr4" -name MISC_FILE [file join $::quartus(sip_path) "ddr4_sim/altera_emif_arch_nf/altera_emif_arch_nf_top.sv"]
set_global_assignment -library "lib_ddr4" -name MISC_FILE [file join $::quartus(sip_path) "ddr4_sim/altera_emif_arch_nf/mentor/altera_emif_arch_nf_top.sv"]
set_global_assignment -library "lib_ddr4" -name MISC_FILE [file join $::quartus(sip_path) "ddr4_sim/altera_emif_arch_nf/altera_emif_arch_nf_bufs.sv"]
set_global_assignment -library "lib_ddr4" -name MISC_FILE [file join $::quartus(sip_path) "ddr4_sim/altera_emif_arch_nf/mentor/altera_emif_arch_nf_bufs.sv"]
set_global_assignment -library "lib_ddr4" -name MISC_FILE [file join $::quartus(sip_path) "ddr4_sim/altera_emif_arch_nf/altera_emif_arch_nf_buf_udir_se_i.sv"]
set_global_assignment -library "lib_ddr4" -name MISC_FILE [file join $::quartus(sip_path) "ddr4_sim/altera_emif_arch_nf/mentor/altera_emif_arch_nf_buf_udir_se_i.sv"]
set_global_assignment -library "lib_ddr4" -name MISC_FILE [file join $::quartus(sip_path) "ddr4_sim/altera_emif_arch_nf/altera_emif_arch_nf_buf_udir_se_o.sv"]
set_global_assignment -library "lib_ddr4" -name MISC_FILE [file join $::quartus(sip_path) "ddr4_sim/altera_emif_arch_nf/mentor/altera_emif_arch_nf_buf_udir_se_o.sv"]
set_global_assignment -library "lib_ddr4" -name MISC_FILE [file join $::quartus(sip_path) "ddr4_sim/altera_emif_arch_nf/altera_emif_arch_nf_buf_udir_df_i.sv"]
set_global_assignment -library "lib_ddr4" -name MISC_FILE [file join $::quartus(sip_path) "ddr4_sim/altera_emif_arch_nf/mentor/altera_emif_arch_nf_buf_udir_df_i.sv"]
set_global_assignment -library "lib_ddr4" -name MISC_FILE [file join $::quartus(sip_path) "ddr4_sim/altera_emif_arch_nf/altera_emif_arch_nf_buf_udir_df_o.sv"]
set_global_assignment -library "lib_ddr4" -name MISC_FILE [file join $::quartus(sip_path) "ddr4_sim/altera_emif_arch_nf/mentor/altera_emif_arch_nf_buf_udir_df_o.sv"]
set_global_assignment -library "lib_ddr4" -name MISC_FILE [file join $::quartus(sip_path) "ddr4_sim/altera_emif_arch_nf/altera_emif_arch_nf_buf_udir_cp_i.sv"]
set_global_assignment -library "lib_ddr4" -name MISC_FILE [file join $::quartus(sip_path) "ddr4_sim/altera_emif_arch_nf/mentor/altera_emif_arch_nf_buf_udir_cp_i.sv"]
set_global_assignment -library "lib_ddr4" -name MISC_FILE [file join $::quartus(sip_path) "ddr4_sim/altera_emif_arch_nf/altera_emif_arch_nf_buf_bdir_df.sv"]
set_global_assignment -library "lib_ddr4" -name MISC_FILE [file join $::quartus(sip_path) "ddr4_sim/altera_emif_arch_nf/mentor/altera_emif_arch_nf_buf_bdir_df.sv"]
set_global_assignment -library "lib_ddr4" -name MISC_FILE [file join $::quartus(sip_path) "ddr4_sim/altera_emif_arch_nf/altera_emif_arch_nf_buf_bdir_se.sv"]
set_global_assignment -library "lib_ddr4" -name MISC_FILE [file join $::quartus(sip_path) "ddr4_sim/altera_emif_arch_nf/mentor/altera_emif_arch_nf_buf_bdir_se.sv"]
set_global_assignment -library "lib_ddr4" -name MISC_FILE [file join $::quartus(sip_path) "ddr4_sim/altera_emif_arch_nf/altera_emif_arch_nf_buf_unused.sv"]
set_global_assignment -library "lib_ddr4" -name MISC_FILE [file join $::quartus(sip_path) "ddr4_sim/altera_emif_arch_nf/mentor/altera_emif_arch_nf_buf_unused.sv"]
set_global_assignment -library "lib_ddr4" -name MISC_FILE [file join $::quartus(sip_path) "ddr4_sim/altera_emif_arch_nf/altera_emif_arch_nf_pll.sv"]
set_global_assignment -library "lib_ddr4" -name MISC_FILE [file join $::quartus(sip_path) "ddr4_sim/altera_emif_arch_nf/mentor/altera_emif_arch_nf_pll.sv"]
set_global_assignment -library "lib_ddr4" -name MISC_FILE [file join $::quartus(sip_path) "ddr4_sim/altera_emif_arch_nf/altera_emif_arch_nf_oct.sv"]
set_global_assignment -library "lib_ddr4" -name MISC_FILE [file join $::quartus(sip_path) "ddr4_sim/altera_emif_arch_nf/mentor/altera_emif_arch_nf_oct.sv"]
set_global_assignment -library "lib_ddr4" -name MISC_FILE [file join $::quartus(sip_path) "ddr4_sim/altera_emif_arch_nf/altera_emif_arch_nf_core_clks_rsts.sv"]
set_global_assignment -library "lib_ddr4" -name MISC_FILE [file join $::quartus(sip_path) "ddr4_sim/altera_emif_arch_nf/mentor/altera_emif_arch_nf_core_clks_rsts.sv"]
set_global_assignment -library "lib_ddr4" -name MISC_FILE [file join $::quartus(sip_path) "ddr4_sim/altera_emif_arch_nf/altera_emif_arch_nf_io_aux.sv"]
set_global_assignment -library "lib_ddr4" -name MISC_FILE [file join $::quartus(sip_path) "ddr4_sim/altera_emif_arch_nf/mentor/altera_emif_arch_nf_io_aux.sv"]
set_global_assignment -library "lib_ddr4" -name MISC_FILE [file join $::quartus(sip_path) "ddr4_sim/altera_emif_arch_nf/altera_emif_arch_nf_io_tiles.sv"]
set_global_assignment -library "lib_ddr4" -name MISC_FILE [file join $::quartus(sip_path) "ddr4_sim/altera_emif_arch_nf/mentor/altera_emif_arch_nf_io_tiles.sv"]
set_global_assignment -library "lib_ddr4" -name MISC_FILE [file join $::quartus(sip_path) "ddr4_sim/altera_emif_arch_nf/altera_emif_arch_nf_data_if.sv"]
set_global_assignment -library "lib_ddr4" -name MISC_FILE [file join $::quartus(sip_path) "ddr4_sim/altera_emif_arch_nf/mentor/altera_emif_arch_nf_data_if.sv"]
set_global_assignment -library "lib_ddr4" -name MISC_FILE [file join $::quartus(sip_path) "ddr4_sim/altera_emif_arch_nf/altera_emif_arch_nf_hmc_avl_if.sv"]
set_global_assignment -library "lib_ddr4" -name MISC_FILE [file join $::quartus(sip_path) "ddr4_sim/altera_emif_arch_nf/mentor/altera_emif_arch_nf_hmc_avl_if.sv"]
set_global_assignment -library "lib_ddr4" -name MISC_FILE [file join $::quartus(sip_path) "ddr4_sim/altera_emif_arch_nf/altera_emif_arch_nf_hmc_sideband_if.sv"]
set_global_assignment -library "lib_ddr4" -name MISC_FILE [file join $::quartus(sip_path) "ddr4_sim/altera_emif_arch_nf/mentor/altera_emif_arch_nf_hmc_sideband_if.sv"]
set_global_assignment -library "lib_ddr4" -name MISC_FILE [file join $::quartus(sip_path) "ddr4_sim/altera_emif_arch_nf/altera_emif_arch_nf_hmc_mmr_if.sv"]
set_global_assignment -library "lib_ddr4" -name MISC_FILE [file join $::quartus(sip_path) "ddr4_sim/altera_emif_arch_nf/mentor/altera_emif_arch_nf_hmc_mmr_if.sv"]
set_global_assignment -library "lib_ddr4" -name MISC_FILE [file join $::quartus(sip_path) "ddr4_sim/altera_emif_arch_nf/altera_emif_arch_nf_afi_if.sv"]
set_global_assignment -library "lib_ddr4" -name MISC_FILE [file join $::quartus(sip_path) "ddr4_sim/altera_emif_arch_nf/mentor/altera_emif_arch_nf_afi_if.sv"]
set_global_assignment -library "lib_ddr4" -name MISC_FILE [file join $::quartus(sip_path) "ddr4_sim/altera_emif_arch_nf/altera_emif_arch_nf_0001.vhd"]
set_global_assignment -library "lib_ddr4" -name MISC_FILE [file join $::quartus(sip_path) "ddr4_sim/altera_emif_arch_nf/mentor/altera_emif_arch_nf_0001.vhd"]
set_global_assignment -library "lib_ddr4" -name MISC_FILE [file join $::quartus(sip_path) "ddr4_sim/altera_emif_arch_nf/ddr4_seq_params_sim.hex"]
set_global_assignment -library "lib_ddr4" -name MISC_FILE [file join $::quartus(sip_path) "ddr4_sim/altera_emif_arch_nf/ddr4_seq_params_sim.txt"]
set_global_assignment -library "lib_ddr4" -name MISC_FILE [file join $::quartus(sip_path) "ddr4_sim/altera_emif_arch_nf/ddr4_seq_params_synth.hex"]
set_global_assignment -library "lib_ddr4" -name MISC_FILE [file join $::quartus(sip_path) "ddr4_sim/altera_emif_arch_nf/ddr4_seq_params_synth.txt"]
set_global_assignment -library "lib_ddr4" -name MISC_FILE [file join $::quartus(sip_path) "ddr4_sim/altera_emif_arch_nf/ddr4_seq_cal_sim.hex"]
set_global_assignment -library "lib_ddr4" -name MISC_FILE [file join $::quartus(sip_path) "ddr4_sim/altera_emif_arch_nf/ddr4_seq_cal_synth.hex"]
set_global_assignment -library "lib_ddr4" -name MISC_FILE [file join $::quartus(sip_path) "ddr4_sim/altera_emif_arch_nf/ddr4_readme.txt"]
boards/uniboard2/designs/unb2_pinning/src/ip/system_pll.qip 0 → 100644
+ 14
− 0
View file @ 4517e733
set_global_assignment -entity "system_pll" -library "system_pll" -name IP_TOOL_NAME "altera_pll"
set_global_assignment -entity "system_pll" -library "system_pll" -name IP_TOOL_VERSION "13.1"
set_global_assignment -entity "system_pll" -library "system_pll" -name IP_TOOL_ENV "mwpim"
set_global_assignment -library "system_pll" -name MISC_FILE [file join $::quartus(qip_path) "system_pll.cmp"]
set_global_assignment -entity "system_pll" -library "system_pll" -name IP_GENERATED_DEVICE_FAMILY "{Arria 10}"
set_global_assignment -name SYNTHESIS_ONLY_QIP ON
set_global_assignment -library "system_pll" -name VHDL_FILE [file join $::quartus(qip_path) "system_pll.vhd"]
set_global_assignment -library "system_pll" -name VERILOG_FILE [file join $::quartus(qip_path) "system_pll/system_pll_0002.v"]
set_global_assignment -library "system_pll" -name QIP_FILE [file join $::quartus(qip_path) "system_pll/system_pll_0002.qip"]
set_global_assignment -entity "system_pll_0002" -library "system_pll" -name IP_TOOL_NAME "altera_pll"
set_global_assignment -entity "system_pll_0002" -library "system_pll" -name IP_TOOL_VERSION "13.1"
set_global_assignment -entity "system_pll_0002" -library "system_pll" -name IP_TOOL_ENV "mwpim"
boards/uniboard2/designs/unb2_pinning/src/ip/system_pll.sip 0 → 100644
+ 6
− 0
View file @ 4517e733
set_global_assignment -entity "system_pll" -library "lib_system_pll" -name IP_TOOL_NAME "altera_pll"
set_global_assignment -entity "system_pll" -library "lib_system_pll" -name IP_TOOL_VERSION "13.1"
set_global_assignment -entity "system_pll" -library "lib_system_pll" -name IP_TOOL_ENV "mwpim"
set_global_assignment -library "lib_system_pll" -name SPD_FILE [file join $::quartus(sip_path) "system_pll.spd"]
set_global_assignment -library "lib_system_pll" -name MISC_FILE [file join $::quartus(sip_path) "system_pll_sim/system_pll.vho"]
boards/uniboard2/designs/unb2_pinning/src/ip/transceiver_phy.qip 0 → 100644
+ 50
− 0
View file @ 4517e733
set_global_assignment -entity "transceiver_phy" -library "transceiver_phy" -name IP_TOOL_NAME "altera_xcvr_native_a10"
set_global_assignment -entity "transceiver_phy" -library "transceiver_phy" -name IP_TOOL_VERSION "13.1"
set_global_assignment -entity "transceiver_phy" -library "transceiver_phy" -name IP_TOOL_ENV "mwpim"
set_global_assignment -library "transceiver_phy" -name MISC_FILE [file join $::quartus(qip_path) "transceiver_phy.cmp"]
set_global_assignment -entity "transceiver_phy" -library "transceiver_phy" -name IP_GENERATED_DEVICE_FAMILY "{Arria 10}"
set_global_assignment -name SYNTHESIS_ONLY_QIP ON
set_global_assignment -library "transceiver_phy" -name VHDL_FILE [file join $::quartus(qip_path) "transceiver_phy.vhd"]
set_global_assignment -library "transceiver_phy" -name SYSTEMVERILOG_FILE [file join $::quartus(qip_path) "transceiver_phy/altera_xcvr_functions.sv"]
set_global_assignment -library "transceiver_phy" -name SYSTEMVERILOG_FILE [file join $::quartus(qip_path) "transceiver_phy/alt_xcvr_resync.sv"]
set_global_assignment -library "transceiver_phy" -name SYSTEMVERILOG_FILE [file join $::quartus(qip_path) "transceiver_phy/twentynm_pcs.sv"]
set_global_assignment -library "transceiver_phy" -name SYSTEMVERILOG_FILE [file join $::quartus(qip_path) "transceiver_phy/twentynm_pcs_ch.sv"]
set_global_assignment -library "transceiver_phy" -name SYSTEMVERILOG_FILE [file join $::quartus(qip_path) "transceiver_phy/twentynm_pma.sv"]
set_global_assignment -library "transceiver_phy" -name SYSTEMVERILOG_FILE [file join $::quartus(qip_path) "transceiver_phy/twentynm_pma_ch.sv"]
set_global_assignment -library "transceiver_phy" -name SYSTEMVERILOG_FILE [file join $::quartus(qip_path) "transceiver_phy/twentynm_xcvr_avmm.sv"]
set_global_assignment -library "transceiver_phy" -name SYSTEMVERILOG_FILE [file join $::quartus(qip_path) "transceiver_phy/twentynm_xcvr_native.sv"]
set_global_assignment -library "transceiver_phy" -name SYSTEMVERILOG_FILE [file join $::quartus(qip_path) "transceiver_phy/twentynm_hssi_10g_rx_pcs_rbc.sv"]
set_global_assignment -library "transceiver_phy" -name SYSTEMVERILOG_FILE [file join $::quartus(qip_path) "transceiver_phy/twentynm_hssi_10g_tx_pcs_rbc.sv"]
set_global_assignment -library "transceiver_phy" -name SYSTEMVERILOG_FILE [file join $::quartus(qip_path) "transceiver_phy/twentynm_hssi_8g_rx_pcs_rbc.sv"]
set_global_assignment -library "transceiver_phy" -name SYSTEMVERILOG_FILE [file join $::quartus(qip_path) "transceiver_phy/twentynm_hssi_8g_tx_pcs_rbc.sv"]
set_global_assignment -library "transceiver_phy" -name SYSTEMVERILOG_FILE [file join $::quartus(qip_path) "transceiver_phy/twentynm_hssi_common_pcs_pma_interface_rbc.sv"]
set_global_assignment -library "transceiver_phy" -name SYSTEMVERILOG_FILE [file join $::quartus(qip_path) "transceiver_phy/twentynm_hssi_common_pld_pcs_interface_rbc.sv"]
set_global_assignment -library "transceiver_phy" -name SYSTEMVERILOG_FILE [file join $::quartus(qip_path) "transceiver_phy/twentynm_hssi_fifo_rx_pcs_rbc.sv"]
set_global_assignment -library "transceiver_phy" -name SYSTEMVERILOG_FILE [file join $::quartus(qip_path) "transceiver_phy/twentynm_hssi_fifo_tx_pcs_rbc.sv"]
set_global_assignment -library "transceiver_phy" -name SYSTEMVERILOG_FILE [file join $::quartus(qip_path) "transceiver_phy/twentynm_hssi_gen3_rx_pcs_rbc.sv"]
set_global_assignment -library "transceiver_phy" -name SYSTEMVERILOG_FILE [file join $::quartus(qip_path) "transceiver_phy/twentynm_hssi_gen3_tx_pcs_rbc.sv"]
set_global_assignment -library "transceiver_phy" -name SYSTEMVERILOG_FILE [file join $::quartus(qip_path) "transceiver_phy/twentynm_hssi_krfec_rx_pcs_rbc.sv"]
set_global_assignment -library "transceiver_phy" -name SYSTEMVERILOG_FILE [file join $::quartus(qip_path) "transceiver_phy/twentynm_hssi_krfec_tx_pcs_rbc.sv"]
set_global_assignment -library "transceiver_phy" -name SYSTEMVERILOG_FILE [file join $::quartus(qip_path) "transceiver_phy/twentynm_hssi_pipe_gen1_2_rbc.sv"]
set_global_assignment -library "transceiver_phy" -name SYSTEMVERILOG_FILE [file join $::quartus(qip_path) "transceiver_phy/twentynm_hssi_pipe_gen3_rbc.sv"]
set_global_assignment -library "transceiver_phy" -name SYSTEMVERILOG_FILE [file join $::quartus(qip_path) "transceiver_phy/twentynm_hssi_pma_rx_dfe_rbc.sv"]
set_global_assignment -library "transceiver_phy" -name SYSTEMVERILOG_FILE [file join $::quartus(qip_path) "transceiver_phy/twentynm_hssi_pma_rx_odi_rbc.sv"]
set_global_assignment -library "transceiver_phy" -name SYSTEMVERILOG_FILE [file join $::quartus(qip_path) "transceiver_phy/twentynm_hssi_pma_rx_sd_rbc.sv"]
set_global_assignment -library "transceiver_phy" -name SYSTEMVERILOG_FILE [file join $::quartus(qip_path) "transceiver_phy/twentynm_hssi_pma_tx_buf_rbc.sv"]
set_global_assignment -library "transceiver_phy" -name SYSTEMVERILOG_FILE [file join $::quartus(qip_path) "transceiver_phy/twentynm_hssi_pma_tx_cgb_rbc.sv"]
set_global_assignment -library "transceiver_phy" -name SYSTEMVERILOG_FILE [file join $::quartus(qip_path) "transceiver_phy/twentynm_hssi_pma_tx_ser_rbc.sv"]
set_global_assignment -library "transceiver_phy" -name SYSTEMVERILOG_FILE [file join $::quartus(qip_path) "transceiver_phy/twentynm_hssi_rx_pcs_pma_interface_rbc.sv"]
set_global_assignment -library "transceiver_phy" -name SYSTEMVERILOG_FILE [file join $::quartus(qip_path) "transceiver_phy/twentynm_hssi_rx_pld_pcs_interface_rbc.sv"]
set_global_assignment -library "transceiver_phy" -name SYSTEMVERILOG_FILE [file join $::quartus(qip_path) "transceiver_phy/twentynm_hssi_tx_pcs_pma_interface_rbc.sv"]
set_global_assignment -library "transceiver_phy" -name SYSTEMVERILOG_FILE [file join $::quartus(qip_path) "transceiver_phy/twentynm_hssi_tx_pld_pcs_interface_rbc.sv"]
set_global_assignment -library "transceiver_phy" -name SYSTEMVERILOG_FILE [file join $::quartus(qip_path) "transceiver_phy/altera_xcvr_native_a10.sv"]
set_global_assignment -library "transceiver_phy" -name SYSTEMVERILOG_FILE [file join $::quartus(qip_path) "transceiver_phy/alt_xcvr_native_avmm_nf.sv"]
set_global_assignment -library "transceiver_phy" -name SDC_FILE [file join $::quartus(qip_path) "transceiver_phy/altera_xcvr_native_a10_b2.sdc"]
set_global_assignment -library "transceiver_phy" -name SDC_FILE [file join $::quartus(qip_path) "transceiver_phy/altera_xcvr_native_a10_false_paths.sdc"]
set_global_assignment -library "transceiver_phy" -name SOURCE_FILE [file join $::quartus(qip_path) "transceiver_phy/plain_files.txt"]
set_global_assignment -library "transceiver_phy" -name SOURCE_FILE [file join $::quartus(qip_path) "transceiver_phy/docs/altera_xcvr_native_a10_parameters.csv"]
set_global_assignment -entity "altera_xcvr_native_a10" -library "transceiver_phy" -name IP_TOOL_NAME "altera_xcvr_native_a10"
set_global_assignment -entity "altera_xcvr_native_a10" -library "transceiver_phy" -name IP_TOOL_VERSION "13.1.1"
set_global_assignment -entity "altera_xcvr_native_a10" -library "transceiver_phy" -name IP_TOOL_ENV "mwpim"
boards/uniboard2/designs/unb2_pinning/src/ip/transceiver_phy.sip 0 → 100644
+ 80
− 0
View file @ 4517e733
set_global_assignment -entity "transceiver_phy" -library "lib_transceiver_phy" -name IP_TOOL_NAME "altera_xcvr_native_a10"
set_global_assignment -entity "transceiver_phy" -library "lib_transceiver_phy" -name IP_TOOL_VERSION "13.1"
set_global_assignment -entity "transceiver_phy" -library "lib_transceiver_phy" -name IP_TOOL_ENV "mwpim"
set_global_assignment -library "lib_transceiver_phy" -name SPD_FILE [file join $::quartus(sip_path) "transceiver_phy.spd"]
set_global_assignment -library "lib_transceiver_phy" -name MISC_FILE [file join $::quartus(sip_path) "transceiver_phy_sim/transceiver_phy.vhd"]
set_global_assignment -library "lib_transceiver_phy" -name MISC_FILE [file join $::quartus(sip_path) "transceiver_phy_sim/altera_xcvr_native_a10/altera_xcvr_functions.sv"]
set_global_assignment -library "lib_transceiver_phy" -name MISC_FILE [file join $::quartus(sip_path) "transceiver_phy_sim/altera_xcvr_native_a10/mentor/altera_xcvr_functions.sv"]
set_global_assignment -library "lib_transceiver_phy" -name MISC_FILE [file join $::quartus(sip_path) "transceiver_phy_sim/altera_xcvr_native_a10/alt_xcvr_resync.sv"]
set_global_assignment -library "lib_transceiver_phy" -name MISC_FILE [file join $::quartus(sip_path) "transceiver_phy_sim/altera_xcvr_native_a10/mentor/alt_xcvr_resync.sv"]
set_global_assignment -library "lib_transceiver_phy" -name MISC_FILE [file join $::quartus(sip_path) "transceiver_phy_sim/altera_xcvr_native_a10/twentynm_pcs.sv"]
set_global_assignment -library "lib_transceiver_phy" -name MISC_FILE [file join $::quartus(sip_path) "transceiver_phy_sim/altera_xcvr_native_a10/twentynm_pcs_ch.sv"]
set_global_assignment -library "lib_transceiver_phy" -name MISC_FILE [file join $::quartus(sip_path) "transceiver_phy_sim/altera_xcvr_native_a10/twentynm_pma.sv"]
set_global_assignment -library "lib_transceiver_phy" -name MISC_FILE [file join $::quartus(sip_path) "transceiver_phy_sim/altera_xcvr_native_a10/twentynm_pma_ch.sv"]
set_global_assignment -library "lib_transceiver_phy" -name MISC_FILE [file join $::quartus(sip_path) "transceiver_phy_sim/altera_xcvr_native_a10/twentynm_xcvr_avmm.sv"]
set_global_assignment -library "lib_transceiver_phy" -name MISC_FILE [file join $::quartus(sip_path) "transceiver_phy_sim/altera_xcvr_native_a10/twentynm_xcvr_native.sv"]
set_global_assignment -library "lib_transceiver_phy" -name MISC_FILE [file join $::quartus(sip_path) "transceiver_phy_sim/altera_xcvr_native_a10/mentor/twentynm_pcs.sv"]
set_global_assignment -library "lib_transceiver_phy" -name MISC_FILE [file join $::quartus(sip_path) "transceiver_phy_sim/altera_xcvr_native_a10/mentor/twentynm_pcs_ch.sv"]
set_global_assignment -library "lib_transceiver_phy" -name MISC_FILE [file join $::quartus(sip_path) "transceiver_phy_sim/altera_xcvr_native_a10/mentor/twentynm_pma.sv"]
set_global_assignment -library "lib_transceiver_phy" -name MISC_FILE [file join $::quartus(sip_path) "transceiver_phy_sim/altera_xcvr_native_a10/mentor/twentynm_pma_ch.sv"]
set_global_assignment -library "lib_transceiver_phy" -name MISC_FILE [file join $::quartus(sip_path) "transceiver_phy_sim/altera_xcvr_native_a10/mentor/twentynm_xcvr_avmm.sv"]
set_global_assignment -library "lib_transceiver_phy" -name MISC_FILE [file join $::quartus(sip_path) "transceiver_phy_sim/altera_xcvr_native_a10/mentor/twentynm_xcvr_native.sv"]
set_global_assignment -library "lib_transceiver_phy" -name MISC_FILE [file join $::quartus(sip_path) "transceiver_phy_sim/altera_xcvr_native_a10/twentynm_hssi_10g_rx_pcs_rbc.sv"]
set_global_assignment -library "lib_transceiver_phy" -name MISC_FILE [file join $::quartus(sip_path) "transceiver_phy_sim/altera_xcvr_native_a10/twentynm_hssi_10g_tx_pcs_rbc.sv"]
set_global_assignment -library "lib_transceiver_phy" -name MISC_FILE [file join $::quartus(sip_path) "transceiver_phy_sim/altera_xcvr_native_a10/twentynm_hssi_8g_rx_pcs_rbc.sv"]
set_global_assignment -library "lib_transceiver_phy" -name MISC_FILE [file join $::quartus(sip_path) "transceiver_phy_sim/altera_xcvr_native_a10/twentynm_hssi_8g_tx_pcs_rbc.sv"]
set_global_assignment -library "lib_transceiver_phy" -name MISC_FILE [file join $::quartus(sip_path) "transceiver_phy_sim/altera_xcvr_native_a10/twentynm_hssi_common_pcs_pma_interface_rbc.sv"]
set_global_assignment -library "lib_transceiver_phy" -name MISC_FILE [file join $::quartus(sip_path) "transceiver_phy_sim/altera_xcvr_native_a10/twentynm_hssi_common_pld_pcs_interface_rbc.sv"]
set_global_assignment -library "lib_transceiver_phy" -name MISC_FILE [file join $::quartus(sip_path) "transceiver_phy_sim/altera_xcvr_native_a10/twentynm_hssi_fifo_rx_pcs_rbc.sv"]
set_global_assignment -library "lib_transceiver_phy" -name MISC_FILE [file join $::quartus(sip_path) "transceiver_phy_sim/altera_xcvr_native_a10/twentynm_hssi_fifo_tx_pcs_rbc.sv"]
set_global_assignment -library "lib_transceiver_phy" -name MISC_FILE [file join $::quartus(sip_path) "transceiver_phy_sim/altera_xcvr_native_a10/twentynm_hssi_gen3_rx_pcs_rbc.sv"]
set_global_assignment -library "lib_transceiver_phy" -name MISC_FILE [file join $::quartus(sip_path) "transceiver_phy_sim/altera_xcvr_native_a10/twentynm_hssi_gen3_tx_pcs_rbc.sv"]
set_global_assignment -library "lib_transceiver_phy" -name MISC_FILE [file join $::quartus(sip_path) "transceiver_phy_sim/altera_xcvr_native_a10/twentynm_hssi_krfec_rx_pcs_rbc.sv"]
set_global_assignment -library "lib_transceiver_phy" -name MISC_FILE [file join $::quartus(sip_path) "transceiver_phy_sim/altera_xcvr_native_a10/twentynm_hssi_krfec_tx_pcs_rbc.sv"]
set_global_assignment -library "lib_transceiver_phy" -name MISC_FILE [file join $::quartus(sip_path) "transceiver_phy_sim/altera_xcvr_native_a10/twentynm_hssi_pipe_gen1_2_rbc.sv"]
set_global_assignment -library "lib_transceiver_phy" -name MISC_FILE [file join $::quartus(sip_path) "transceiver_phy_sim/altera_xcvr_native_a10/twentynm_hssi_pipe_gen3_rbc.sv"]
set_global_assignment -library "lib_transceiver_phy" -name MISC_FILE [file join $::quartus(sip_path) "transceiver_phy_sim/altera_xcvr_native_a10/twentynm_hssi_pma_rx_dfe_rbc.sv"]
set_global_assignment -library "lib_transceiver_phy" -name MISC_FILE [file join $::quartus(sip_path) "transceiver_phy_sim/altera_xcvr_native_a10/twentynm_hssi_pma_rx_odi_rbc.sv"]
set_global_assignment -library "lib_transceiver_phy" -name MISC_FILE [file join $::quartus(sip_path) "transceiver_phy_sim/altera_xcvr_native_a10/twentynm_hssi_pma_rx_sd_rbc.sv"]
set_global_assignment -library "lib_transceiver_phy" -name MISC_FILE [file join $::quartus(sip_path) "transceiver_phy_sim/altera_xcvr_native_a10/twentynm_hssi_pma_tx_buf_rbc.sv"]
set_global_assignment -library "lib_transceiver_phy" -name MISC_FILE [file join $::quartus(sip_path) "transceiver_phy_sim/altera_xcvr_native_a10/twentynm_hssi_pma_tx_cgb_rbc.sv"]
set_global_assignment -library "lib_transceiver_phy" -name MISC_FILE [file join $::quartus(sip_path) "transceiver_phy_sim/altera_xcvr_native_a10/twentynm_hssi_pma_tx_ser_rbc.sv"]
set_global_assignment -library "lib_transceiver_phy" -name MISC_FILE [file join $::quartus(sip_path) "transceiver_phy_sim/altera_xcvr_native_a10/twentynm_hssi_rx_pcs_pma_interface_rbc.sv"]
set_global_assignment -library "lib_transceiver_phy" -name MISC_FILE [file join $::quartus(sip_path) "transceiver_phy_sim/altera_xcvr_native_a10/twentynm_hssi_rx_pld_pcs_interface_rbc.sv"]
set_global_assignment -library "lib_transceiver_phy" -name MISC_FILE [file join $::quartus(sip_path) "transceiver_phy_sim/altera_xcvr_native_a10/twentynm_hssi_tx_pcs_pma_interface_rbc.sv"]
set_global_assignment -library "lib_transceiver_phy" -name MISC_FILE [file join $::quartus(sip_path) "transceiver_phy_sim/altera_xcvr_native_a10/twentynm_hssi_tx_pld_pcs_interface_rbc.sv"]
set_global_assignment -library "lib_transceiver_phy" -name MISC_FILE [file join $::quartus(sip_path) "transceiver_phy_sim/altera_xcvr_native_a10/mentor/twentynm_hssi_10g_rx_pcs_rbc.sv"]
set_global_assignment -library "lib_transceiver_phy" -name MISC_FILE [file join $::quartus(sip_path) "transceiver_phy_sim/altera_xcvr_native_a10/mentor/twentynm_hssi_10g_tx_pcs_rbc.sv"]
set_global_assignment -library "lib_transceiver_phy" -name MISC_FILE [file join $::quartus(sip_path) "transceiver_phy_sim/altera_xcvr_native_a10/mentor/twentynm_hssi_8g_rx_pcs_rbc.sv"]
set_global_assignment -library "lib_transceiver_phy" -name MISC_FILE [file join $::quartus(sip_path) "transceiver_phy_sim/altera_xcvr_native_a10/mentor/twentynm_hssi_8g_tx_pcs_rbc.sv"]
set_global_assignment -library "lib_transceiver_phy" -name MISC_FILE [file join $::quartus(sip_path) "transceiver_phy_sim/altera_xcvr_native_a10/mentor/twentynm_hssi_common_pcs_pma_interface_rbc.sv"]
set_global_assignment -library "lib_transceiver_phy" -name MISC_FILE [file join $::quartus(sip_path) "transceiver_phy_sim/altera_xcvr_native_a10/mentor/twentynm_hssi_common_pld_pcs_interface_rbc.sv"]
set_global_assignment -library "lib_transceiver_phy" -name MISC_FILE [file join $::quartus(sip_path) "transceiver_phy_sim/altera_xcvr_native_a10/mentor/twentynm_hssi_fifo_rx_pcs_rbc.sv"]
set_global_assignment -library "lib_transceiver_phy" -name MISC_FILE [file join $::quartus(sip_path) "transceiver_phy_sim/altera_xcvr_native_a10/mentor/twentynm_hssi_fifo_tx_pcs_rbc.sv"]
set_global_assignment -library "lib_transceiver_phy" -name MISC_FILE [file join $::quartus(sip_path) "transceiver_phy_sim/altera_xcvr_native_a10/mentor/twentynm_hssi_gen3_rx_pcs_rbc.sv"]
set_global_assignment -library "lib_transceiver_phy" -name MISC_FILE [file join $::quartus(sip_path) "transceiver_phy_sim/altera_xcvr_native_a10/mentor/twentynm_hssi_gen3_tx_pcs_rbc.sv"]
set_global_assignment -library "lib_transceiver_phy" -name MISC_FILE [file join $::quartus(sip_path) "transceiver_phy_sim/altera_xcvr_native_a10/mentor/twentynm_hssi_krfec_rx_pcs_rbc.sv"]
set_global_assignment -library "lib_transceiver_phy" -name MISC_FILE [file join $::quartus(sip_path) "transceiver_phy_sim/altera_xcvr_native_a10/mentor/twentynm_hssi_krfec_tx_pcs_rbc.sv"]
set_global_assignment -library "lib_transceiver_phy" -name MISC_FILE [file join $::quartus(sip_path) "transceiver_phy_sim/altera_xcvr_native_a10/mentor/twentynm_hssi_pipe_gen1_2_rbc.sv"]
set_global_assignment -library "lib_transceiver_phy" -name MISC_FILE [file join $::quartus(sip_path) "transceiver_phy_sim/altera_xcvr_native_a10/mentor/twentynm_hssi_pipe_gen3_rbc.sv"]
set_global_assignment -library "lib_transceiver_phy" -name MISC_FILE [file join $::quartus(sip_path) "transceiver_phy_sim/altera_xcvr_native_a10/mentor/twentynm_hssi_pma_rx_dfe_rbc.sv"]
set_global_assignment -library "lib_transceiver_phy" -name MISC_FILE [file join $::quartus(sip_path) "transceiver_phy_sim/altera_xcvr_native_a10/mentor/twentynm_hssi_pma_rx_odi_rbc.sv"]
set_global_assignment -library "lib_transceiver_phy" -name MISC_FILE [file join $::quartus(sip_path) "transceiver_phy_sim/altera_xcvr_native_a10/mentor/twentynm_hssi_pma_rx_sd_rbc.sv"]
set_global_assignment -library "lib_transceiver_phy" -name MISC_FILE [file join $::quartus(sip_path) "transceiver_phy_sim/altera_xcvr_native_a10/mentor/twentynm_hssi_pma_tx_buf_rbc.sv"]
set_global_assignment -library "lib_transceiver_phy" -name MISC_FILE [file join $::quartus(sip_path) "transceiver_phy_sim/altera_xcvr_native_a10/mentor/twentynm_hssi_pma_tx_cgb_rbc.sv"]
set_global_assignment -library "lib_transceiver_phy" -name MISC_FILE [file join $::quartus(sip_path) "transceiver_phy_sim/altera_xcvr_native_a10/mentor/twentynm_hssi_pma_tx_ser_rbc.sv"]
set_global_assignment -library "lib_transceiver_phy" -name MISC_FILE [file join $::quartus(sip_path) "transceiver_phy_sim/altera_xcvr_native_a10/mentor/twentynm_hssi_rx_pcs_pma_interface_rbc.sv"]
set_global_assignment -library "lib_transceiver_phy" -name MISC_FILE [file join $::quartus(sip_path) "transceiver_phy_sim/altera_xcvr_native_a10/mentor/twentynm_hssi_rx_pld_pcs_interface_rbc.sv"]
set_global_assignment -library "lib_transceiver_phy" -name MISC_FILE [file join $::quartus(sip_path) "transceiver_phy_sim/altera_xcvr_native_a10/mentor/twentynm_hssi_tx_pcs_pma_interface_rbc.sv"]
set_global_assignment -library "lib_transceiver_phy" -name MISC_FILE [file join $::quartus(sip_path) "transceiver_phy_sim/altera_xcvr_native_a10/mentor/twentynm_hssi_tx_pld_pcs_interface_rbc.sv"]
set_global_assignment -library "lib_transceiver_phy" -name MISC_FILE [file join $::quartus(sip_path) "transceiver_phy_sim/altera_xcvr_native_a10/altera_xcvr_native_a10.sv"]
set_global_assignment -library "lib_transceiver_phy" -name MISC_FILE [file join $::quartus(sip_path) "transceiver_phy_sim/altera_xcvr_native_a10/alt_xcvr_native_avmm_nf.sv"]
set_global_assignment -library "lib_transceiver_phy" -name MISC_FILE [file join $::quartus(sip_path) "transceiver_phy_sim/altera_xcvr_native_a10/mentor/altera_xcvr_native_a10.sv"]
set_global_assignment -library "lib_transceiver_phy" -name MISC_FILE [file join $::quartus(sip_path) "transceiver_phy_sim/altera_xcvr_native_a10/mentor/alt_xcvr_native_avmm_nf.sv"]
set_global_assignment -library "lib_transceiver_phy" -name MISC_FILE [file join $::quartus(sip_path) "transceiver_phy_sim/altera_xcvr_native_a10/plain_files.txt"]
set_global_assignment -library "lib_transceiver_phy" -name MISC_FILE [file join $::quartus(sip_path) "transceiver_phy_sim/altera_xcvr_native_a10/mentor_files.txt"]
set_global_assignment -library "lib_transceiver_phy" -name MISC_FILE [file join $::quartus(sip_path) "transceiver_phy_sim/altera_xcvr_native_a10/cadence_files.txt"]
set_global_assignment -library "lib_transceiver_phy" -name MISC_FILE [file join $::quartus(sip_path) "transceiver_phy_sim/altera_xcvr_native_a10/synopsys_files.txt"]
set_global_assignment -library "lib_transceiver_phy" -name MISC_FILE [file join $::quartus(sip_path) "transceiver_phy_sim/altera_xcvr_native_a10/aldec_files.txt"]
set_global_assignment -library "lib_transceiver_phy" -name MISC_FILE [file join $::quartus(sip_path) "transceiver_phy_sim/altera_xcvr_native_a10/docs/altera_xcvr_native_a10_parameters.csv"]
boards/uniboard2/designs/unb2_pinning/src/ip/transceiver_pll.qip 0 → 100644
+ 18
− 0
View file @ 4517e733
set_global_assignment -entity "transceiver_pll" -library "transceiver_pll" -name IP_TOOL_NAME "altera_xcvr_atx_pll_a10"
set_global_assignment -entity "transceiver_pll" -library "transceiver_pll" -name IP_TOOL_VERSION "13.1"
set_global_assignment -entity "transceiver_pll" -library "transceiver_pll" -name IP_TOOL_ENV "mwpim"
set_global_assignment -library "transceiver_pll" -name MISC_FILE [file join $::quartus(qip_path) "transceiver_pll.cmp"]
set_global_assignment -entity "transceiver_pll" -library "transceiver_pll" -name IP_GENERATED_DEVICE_FAMILY "{Arria 10}"
set_global_assignment -name SYNTHESIS_ONLY_QIP ON
set_global_assignment -library "transceiver_pll" -name VHDL_FILE [file join $::quartus(qip_path) "transceiver_pll.vhd"]
set_global_assignment -library "transceiver_pll" -name SYSTEMVERILOG_FILE [file join $::quartus(qip_path) "transceiver_pll/twentynm_xcvr_avmm.sv"]
set_global_assignment -library "transceiver_pll" -name SYSTEMVERILOG_FILE [file join $::quartus(qip_path) "transceiver_pll/alt_xcvr_resync.sv"]
set_global_assignment -library "transceiver_pll" -name SYSTEMVERILOG_FILE [file join $::quartus(qip_path) "transceiver_pll/altera_xcvr_atx_pll_a10.sv"]
set_global_assignment -library "transceiver_pll" -name SYSTEMVERILOG_FILE [file join $::quartus(qip_path) "transceiver_pll/a10_xcvr_atx_pll.sv"]
set_global_assignment -library "transceiver_pll" -name SOURCE_FILE [file join $::quartus(qip_path) "transceiver_pll/plain_files.txt"]
set_global_assignment -library "transceiver_pll" -name SOURCE_FILE [file join $::quartus(qip_path) "transceiver_pll/docs/altera_xcvr_atx_pll_a10_parameters.csv"]
set_global_assignment -entity "altera_xcvr_atx_pll_a10" -library "transceiver_pll" -name IP_TOOL_NAME "altera_xcvr_atx_pll_a10"
set_global_assignment -entity "altera_xcvr_atx_pll_a10" -library "transceiver_pll" -name IP_TOOL_VERSION "13.1"
set_global_assignment -entity "altera_xcvr_atx_pll_a10" -library "transceiver_pll" -name IP_TOOL_ENV "mwpim"
boards/uniboard2/designs/unb2_pinning/src/ip/transceiver_pll.sip 0 → 100644
+ 20
− 0
View file @ 4517e733
set_global_assignment -entity "transceiver_pll" -library "lib_transceiver_pll" -name IP_TOOL_NAME "altera_xcvr_atx_pll_a10"
set_global_assignment -entity "transceiver_pll" -library "lib_transceiver_pll" -name IP_TOOL_VERSION "13.1"
set_global_assignment -entity "transceiver_pll" -library "lib_transceiver_pll" -name IP_TOOL_ENV "mwpim"
set_global_assignment -library "lib_transceiver_pll" -name SPD_FILE [file join $::quartus(sip_path) "transceiver_pll.spd"]
set_global_assignment -library "lib_transceiver_pll" -name MISC_FILE [file join $::quartus(sip_path) "transceiver_pll_sim/transceiver_pll.vhd"]
set_global_assignment -library "lib_transceiver_pll" -name MISC_FILE [file join $::quartus(sip_path) "transceiver_pll_sim/altera_xcvr_atx_pll_a10/twentynm_xcvr_avmm.sv"]
set_global_assignment -library "lib_transceiver_pll" -name MISC_FILE [file join $::quartus(sip_path) "transceiver_pll_sim/altera_xcvr_atx_pll_a10/mentor/twentynm_xcvr_avmm.sv"]
set_global_assignment -library "lib_transceiver_pll" -name MISC_FILE [file join $::quartus(sip_path) "transceiver_pll_sim/altera_xcvr_atx_pll_a10/alt_xcvr_resync.sv"]
set_global_assignment -library "lib_transceiver_pll" -name MISC_FILE [file join $::quartus(sip_path) "transceiver_pll_sim/altera_xcvr_atx_pll_a10/mentor/alt_xcvr_resync.sv"]
set_global_assignment -library "lib_transceiver_pll" -name MISC_FILE [file join $::quartus(sip_path) "transceiver_pll_sim/altera_xcvr_atx_pll_a10/altera_xcvr_atx_pll_a10.sv"]
set_global_assignment -library "lib_transceiver_pll" -name MISC_FILE [file join $::quartus(sip_path) "transceiver_pll_sim/altera_xcvr_atx_pll_a10/a10_xcvr_atx_pll.sv"]
set_global_assignment -library "lib_transceiver_pll" -name MISC_FILE [file join $::quartus(sip_path) "transceiver_pll_sim/altera_xcvr_atx_pll_a10/mentor/altera_xcvr_atx_pll_a10.sv"]
set_global_assignment -library "lib_transceiver_pll" -name MISC_FILE [file join $::quartus(sip_path) "transceiver_pll_sim/altera_xcvr_atx_pll_a10/mentor/a10_xcvr_atx_pll.sv"]
set_global_assignment -library "lib_transceiver_pll" -name MISC_FILE [file join $::quartus(sip_path) "transceiver_pll_sim/altera_xcvr_atx_pll_a10/plain_files.txt"]
set_global_assignment -library "lib_transceiver_pll" -name MISC_FILE [file join $::quartus(sip_path) "transceiver_pll_sim/altera_xcvr_atx_pll_a10/mentor_files.txt"]
set_global_assignment -library "lib_transceiver_pll" -name MISC_FILE [file join $::quartus(sip_path) "transceiver_pll_sim/altera_xcvr_atx_pll_a10/cadence_files.txt"]
set_global_assignment -library "lib_transceiver_pll" -name MISC_FILE [file join $::quartus(sip_path) "transceiver_pll_sim/altera_xcvr_atx_pll_a10/synopsys_files.txt"]
set_global_assignment -library "lib_transceiver_pll" -name MISC_FILE [file join $::quartus(sip_path) "transceiver_pll_sim/altera_xcvr_atx_pll_a10/aldec_files.txt"]
set_global_assignment -library "lib_transceiver_pll" -name MISC_FILE [file join $::quartus(sip_path) "transceiver_pll_sim/altera_xcvr_atx_pll_a10/docs/altera_xcvr_atx_pll_a10_parameters.csv"]
boards/uniboard2/designs/unb2_pinning/src/ip/transceiver_reset_controller.qip 0 → 100644
+ 17
− 0
View file @ 4517e733
set_global_assignment -entity "transceiver_reset_controller" -library "transceiver_reset_controller" -name IP_TOOL_NAME "altera_xcvr_reset_control"
set_global_assignment -entity "transceiver_reset_controller" -library "transceiver_reset_controller" -name IP_TOOL_VERSION "13.1"
set_global_assignment -entity "transceiver_reset_controller" -library "transceiver_reset_controller" -name IP_TOOL_ENV "mwpim"
set_global_assignment -library "transceiver_reset_controller" -name MISC_FILE [file join $::quartus(qip_path) "transceiver_reset_controller.cmp"]
set_global_assignment -entity "transceiver_reset_controller" -library "transceiver_reset_controller" -name IP_GENERATED_DEVICE_FAMILY "{Device Agnostic}"
set_global_assignment -name SYNTHESIS_ONLY_QIP ON
set_global_assignment -library "transceiver_reset_controller" -name VHDL_FILE [file join $::quartus(qip_path) "transceiver_reset_controller.vhd"]
set_global_assignment -library "transceiver_reset_controller" -name SYSTEMVERILOG_FILE [file join $::quartus(qip_path) "transceiver_reset_controller/altera_xcvr_functions.sv"]
set_global_assignment -library "transceiver_reset_controller" -name SYSTEMVERILOG_FILE [file join $::quartus(qip_path) "transceiver_reset_controller/alt_xcvr_resync.sv"]
set_global_assignment -library "transceiver_reset_controller" -name SYSTEMVERILOG_FILE [file join $::quartus(qip_path) "transceiver_reset_controller/altera_xcvr_reset_control.sv"]
set_global_assignment -library "transceiver_reset_controller" -name SYSTEMVERILOG_FILE [file join $::quartus(qip_path) "transceiver_reset_controller/alt_xcvr_reset_counter.sv"]
set_global_assignment -library "transceiver_reset_controller" -name SOURCE_FILE [file join $::quartus(qip_path) "transceiver_reset_controller/plain_files.txt"]
set_global_assignment -entity "altera_xcvr_reset_control" -library "transceiver_reset_controller" -name IP_TOOL_NAME "altera_xcvr_reset_control"
set_global_assignment -entity "altera_xcvr_reset_control" -library "transceiver_reset_controller" -name IP_TOOL_VERSION "13.1"
set_global_assignment -entity "altera_xcvr_reset_control" -library "transceiver_reset_controller" -name IP_TOOL_ENV "mwpim"
boards/uniboard2/designs/unb2_pinning/src/ip/transceiver_reset_controller.sip 0 → 100644
+ 19
− 0
View file @ 4517e733
set_global_assignment -entity "transceiver_reset_controller" -library "lib_transceiver_reset_controller" -name IP_TOOL_NAME "altera_xcvr_reset_control"
set_global_assignment -entity "transceiver_reset_controller" -library "lib_transceiver_reset_controller" -name IP_TOOL_VERSION "13.1"
set_global_assignment -entity "transceiver_reset_controller" -library "lib_transceiver_reset_controller" -name IP_TOOL_ENV "mwpim"
set_global_assignment -library "lib_transceiver_reset_controller" -name SPD_FILE [file join $::quartus(sip_path) "transceiver_reset_controller.spd"]
set_global_assignment -library "lib_transceiver_reset_controller" -name MISC_FILE [file join $::quartus(sip_path) "transceiver_reset_controller_sim/transceiver_reset_controller.vhd"]
set_global_assignment -library "lib_transceiver_reset_controller" -name MISC_FILE [file join $::quartus(sip_path) "transceiver_reset_controller_sim/altera_xcvr_reset_control/altera_xcvr_functions.sv"]
set_global_assignment -library "lib_transceiver_reset_controller" -name MISC_FILE [file join $::quartus(sip_path) "transceiver_reset_controller_sim/altera_xcvr_reset_control/mentor/altera_xcvr_functions.sv"]
set_global_assignment -library "lib_transceiver_reset_controller" -name MISC_FILE [file join $::quartus(sip_path) "transceiver_reset_controller_sim/altera_xcvr_reset_control/alt_xcvr_resync.sv"]
set_global_assignment -library "lib_transceiver_reset_controller" -name MISC_FILE [file join $::quartus(sip_path) "transceiver_reset_controller_sim/altera_xcvr_reset_control/mentor/alt_xcvr_resync.sv"]
set_global_assignment -library "lib_transceiver_reset_controller" -name MISC_FILE [file join $::quartus(sip_path) "transceiver_reset_controller_sim/altera_xcvr_reset_control/altera_xcvr_reset_control.sv"]
set_global_assignment -library "lib_transceiver_reset_controller" -name MISC_FILE [file join $::quartus(sip_path) "transceiver_reset_controller_sim/altera_xcvr_reset_control/alt_xcvr_reset_counter.sv"]
set_global_assignment -library "lib_transceiver_reset_controller" -name MISC_FILE [file join $::quartus(sip_path) "transceiver_reset_controller_sim/altera_xcvr_reset_control/mentor/altera_xcvr_reset_control.sv"]
set_global_assignment -library "lib_transceiver_reset_controller" -name MISC_FILE [file join $::quartus(sip_path) "transceiver_reset_controller_sim/altera_xcvr_reset_control/mentor/alt_xcvr_reset_counter.sv"]
set_global_assignment -library "lib_transceiver_reset_controller" -name MISC_FILE [file join $::quartus(sip_path) "transceiver_reset_controller_sim/altera_xcvr_reset_control/plain_files.txt"]
set_global_assignment -library "lib_transceiver_reset_controller" -name MISC_FILE [file join $::quartus(sip_path) "transceiver_reset_controller_sim/altera_xcvr_reset_control/mentor_files.txt"]
set_global_assignment -library "lib_transceiver_reset_controller" -name MISC_FILE [file join $::quartus(sip_path) "transceiver_reset_controller_sim/altera_xcvr_reset_control/cadence_files.txt"]
set_global_assignment -library "lib_transceiver_reset_controller" -name MISC_FILE [file join $::quartus(sip_path) "transceiver_reset_controller_sim/altera_xcvr_reset_control/synopsys_files.txt"]
set_global_assignment -library "lib_transceiver_reset_controller" -name MISC_FILE [file join $::quartus(sip_path) "transceiver_reset_controller_sim/altera_xcvr_reset_control/aldec_files.txt"]
0% or .
You are about to add 0 people to the discussion. Proceed with caution.
Please register or to comment