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Commit 1459f821 authored by Reinier van der Walle's avatar Reinier van der Walle
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parent a625ccd4
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1 merge request!218Resolve L2SDP-492 + L2SDP-581
Pipeline #26242 passed
Showing with 2428 additions and 1828 deletions
...@@ -409,20 +409,6 @@ peripherals: ...@@ -409,20 +409,6 @@ peripherals:
mm_port_names: mm_port_names:
- REG_STAT_HDR_DAT_BST - REG_STAT_HDR_DAT_BST
- peripheral_name: nw_10GbE/nw_10GbE_unb2legacy # For beamlet output
peripheral_group: beamlet_output
parameter_overrides:
- { name: g_nof_macs, value: 1 }
mm_port_names:
- REG_NW_10GBE_MAC
- peripheral_name: nw_10GbE/nw_10GbE_eth10g # For beamlet output
peripheral_group: beamlet_output
parameter_overrides:
- { name: g_nof_macs, value: 1 }
mm_port_names:
- REG_NW_10GBE_ETH10G
- peripheral_name: dp/dp_bsn_monitor_v2 - peripheral_name: dp/dp_bsn_monitor_v2
peripheral_group: bst_udp peripheral_group: bst_udp
number_of_peripherals: c_N_beamsets number_of_peripherals: c_N_beamsets
...@@ -439,3 +425,16 @@ peripherals: ...@@ -439,3 +425,16 @@ peripherals:
mm_port_names: mm_port_names:
- REG_BSN_MONITOR_V2_BEAMLET_OUTPUT - REG_BSN_MONITOR_V2_BEAMLET_OUTPUT
- peripheral_name: nw_10GbE/nw_10GbE_unb2legacy # For beamlet output
peripheral_group: beamlet_output
parameter_overrides:
- { name: g_nof_macs, value: 1 }
mm_port_names:
- REG_NW_10GBE_MAC
- peripheral_name: nw_10GbE/nw_10GbE_eth10g # For beamlet output
peripheral_group: beamlet_output
parameter_overrides:
- { name: g_nof_macs, value: 1 }
mm_port_names:
- REG_NW_10GBE_ETH10G
...@@ -48,7 +48,7 @@ number_of_columns = 13 ...@@ -48,7 +48,7 @@ number_of_columns = 13
- - - - expected_cnt 0x00030001 1 RW uint32 b[27:0] - - - - - - - expected_cnt 0x00030001 1 RW uint32 b[27:0] - - -
- - - - edge 0x00030001 1 RW uint32 b[31:31] - - - - - - - edge 0x00030001 1 RW uint32 b[31:31] - - -
- - - - offset_cnt 0x00030002 1 RO uint32 b[27:0] - - - - - - - offset_cnt 0x00030002 1 RO uint32 b[27:0] - - -
REG_EPCS 1 1 REG addr 0x00038000 1 WO uint32 b[23:0] - - - REG_EPCS 1 1 REG addr 0x00038000 1 WO uint32 b[31:0] - - -
- - - - rden 0x00038001 1 WO uint32 b[0:0] - - - - - - - rden 0x00038001 1 WO uint32 b[0:0] - - -
- - - - read_bit 0x00038002 1 WO uint32 b[0:0] - - - - - - - read_bit 0x00038002 1 WO uint32 b[0:0] - - -
- - - - write_bit 0x00038003 1 WO uint32 b[0:0] - - - - - - - write_bit 0x00038003 1 WO uint32 b[0:0] - - -
...@@ -64,8 +64,8 @@ number_of_columns = 13 ...@@ -64,8 +64,8 @@ number_of_columns = 13
- - - - param 0x00050001 1 WO uint32 b[2:0] - - - - - - - param 0x00050001 1 WO uint32 b[2:0] - - -
- - - - read_param 0x00050002 1 WO uint32 b[0:0] - - - - - - - read_param 0x00050002 1 WO uint32 b[0:0] - - -
- - - - write_param 0x00050003 1 WO uint32 b[0:0] - - - - - - - write_param 0x00050003 1 WO uint32 b[0:0] - - -
- - - - data_out 0x00050004 1 RO uint32 b[23:0] - - - - - - - data_out 0x00050004 1 RO uint32 b[31:0] - - -
- - - - data_in 0x00050005 1 WO uint32 b[23:0] - - - - - - - data_in 0x00050005 1 WO uint32 b[31:0] - - -
- - - - busy 0x00050006 1 RO uint32 b[0:0] - - - - - - - busy 0x00050006 1 RO uint32 b[0:0] - - -
REG_SDP_INFO 1 1 REG block_period 0x00058000 1 RO uint32 b[15:0] - - - REG_SDP_INFO 1 1 REG block_period 0x00058000 1 RO uint32 b[15:0] - - -
- - - - beam_repositioning_flag 0x00058001 1 RW uint32 b[0:0] - - - - - - - beam_repositioning_flag 0x00058001 1 RW uint32 b[0:0] - - -
...@@ -205,18 +205,27 @@ number_of_columns = 13 ...@@ -205,18 +205,27 @@ number_of_columns = 13
- - - - eth_destination_mac 0x000e8029 1 RW uint64 b[31:0] b[31:0] - - - - - - eth_destination_mac 0x000e8029 1 RW uint64 b[31:0] b[31:0] - -
- - - - - 0x000e802a - - - b[15:0] b[47:32] - - - - - - - 0x000e802a - - - b[15:0] b[47:32] - -
- - - - word_align 0x000e802b 1 RW uint32 b[15:0] - - - - - - - word_align 0x000e802b 1 RW uint32 b[15:0] - - -
REG_BSN_SYNC_SCHEDULER_XSUB 1 1 REG ctrl_enable 0x000f0000 1 RW uint32 b[0:0] - - - REG_BSN_MONITOR_V2_SST_OFFLOAD 1 1 REG xon_stable 0x000f0000 1 RO uint32 b[0:0] - - -
- - - - ctrl_interval_size 0x000f0001 1 RW uint32 b[30:0] - - - - - - - ready_stable 0x000f0000 1 RO uint32 b[1:1] - - -
- - - - ctrl_start_bsn 0x000f0002 1 RW uint64 b[31:0] b[31:0] - - - - - - sync_timeout 0x000f0000 1 RO uint32 b[2:2] - - -
- - - - - 0x000f0003 - - - b[31:0] b[63:32] - - - - - - bsn_at_sync 0x000f0001 1 RO uint64 b[31:0] b[31:0] - -
- - - - mon_current_input_bsn 0x000f0004 1 RO uint64 b[31:0] b[31:0] - - - - - - - 0x000f0002 - - - b[31:0] b[63:32] - -
- - - - - 0x000f0005 - - - b[31:0] b[63:32] - - - - - - nof_sop 0x000f0003 1 RO uint32 b[31:0] - - -
- - - - mon_input_bsn_at_sync 0x000f0006 1 RO uint64 b[31:0] b[31:0] - - - - - - nof_valid 0x000f0004 1 RO uint32 b[31:0] - - -
- - - - - 0x000f0007 - - - b[31:0] b[63:32] - - - - - - nof_err 0x000f0005 1 RO uint32 b[31:0] - - -
- - - - mon_output_enable 0x000f0008 1 RO uint32 b[0:0] - - - - - - - latency 0x000f0008 1 RO uint32 b[31:0] - - -
- - - - mon_output_sync_bsn 0x000f0009 1 RO uint64 b[31:0] b[31:0] - - REG_BSN_SYNC_SCHEDULER_XSUB 1 1 REG ctrl_enable 0x000f8000 1 RW uint32 b[0:0] - - -
- - - - - 0x000f000a - - - b[31:0] b[63:32] - - - - - - ctrl_interval_size 0x000f8001 1 RW uint32 b[30:0] - - -
- - - - block_size 0x000f000b 1 RO uint32 b[31:0] - - - - - - - ctrl_start_bsn 0x000f8002 1 RW uint64 b[31:0] b[31:0] - -
- - - - - 0x000f8003 - - - b[31:0] b[63:32] - -
- - - - mon_current_input_bsn 0x000f8004 1 RO uint64 b[31:0] b[31:0] - -
- - - - - 0x000f8005 - - - b[31:0] b[63:32] - -
- - - - mon_input_bsn_at_sync 0x000f8006 1 RO uint64 b[31:0] b[31:0] - -
- - - - - 0x000f8007 - - - b[31:0] b[63:32] - -
- - - - mon_output_enable 0x000f8008 1 RO uint32 b[0:0] - - -
- - - - mon_output_sync_bsn 0x000f8009 1 RO uint64 b[31:0] b[31:0] - -
- - - - - 0x000f800a - - - b[31:0] b[63:32] - -
- - - - block_size 0x000f800b 1 RO uint32 b[31:0] - - -
RAM_ST_XSQ 1 9 RAM data 0x00100000 1008 RW cint64_ir b[31:0] b[31:0] - 4096 RAM_ST_XSQ 1 9 RAM data 0x00100000 1008 RW cint64_ir b[31:0] b[31:0] - 4096
- - - - - 0x00100001 - - - b[31:0] b[63:32] - - - - - - - 0x00100001 - - - b[31:0] b[63:32] - -
- - - - - 0x00100002 - - - b[31:0] b[95:64] - - - - - - - 0x00100002 - - - b[31:0] b[95:64] - -
...@@ -274,8 +283,9 @@ number_of_columns = 13 ...@@ -274,8 +283,9 @@ number_of_columns = 13
- - - - eth_destination_mac 0x00128029 1 RW uint64 b[31:0] b[31:0] - - - - - - eth_destination_mac 0x00128029 1 RW uint64 b[31:0] b[31:0] - -
- - - - - 0x0012802a - - - b[15:0] b[47:32] - - - - - - - 0x0012802a - - - b[15:0] b[47:32] - -
- - - - word_align 0x0012802b 1 RW uint32 b[15:0] - - - - - - - word_align 0x0012802b 1 RW uint32 b[15:0] - - -
REG_BSN_ALIGN 1 9 REG enable 0x00130000 1 RW uint32 b[0:0] - - 1 REG_BSN_ALIGN_V2 1 9 REG enable 0x00130000 1 RW uint32 b[0:0] - - 2
REG_BSN_MONITOR_V2_BSN_ALIGN_INPUT 1 9 REG xon_stable 0x00138000 1 RO uint32 b[0:0] - - 8 - - - - replaced_pkt_cnt 0x00130001 1 RO uint32 b[31:0] - - -
REG_BSN_MONITOR_V2_BSN_ALIGN_V2_INPUT 1 9 REG xon_stable 0x00138000 1 RO uint32 b[0:0] - - 8
- - - - ready_stable 0x00138000 1 RO uint32 b[1:1] - - - - - - - ready_stable 0x00138000 1 RO uint32 b[1:1] - - -
- - - - sync_timeout 0x00138000 1 RO uint32 b[2:2] - - - - - - - sync_timeout 0x00138000 1 RO uint32 b[2:2] - - -
- - - - bsn_at_sync 0x00138001 1 RO uint64 b[31:0] b[31:0] - - - - - - bsn_at_sync 0x00138001 1 RO uint64 b[31:0] b[31:0] - -
...@@ -284,7 +294,7 @@ number_of_columns = 13 ...@@ -284,7 +294,7 @@ number_of_columns = 13
- - - - nof_valid 0x00138004 1 RO uint32 b[31:0] - - - - - - - nof_valid 0x00138004 1 RO uint32 b[31:0] - - -
- - - - nof_err 0x00138005 1 RO uint32 b[31:0] - - - - - - - nof_err 0x00138005 1 RO uint32 b[31:0] - - -
- - - - latency 0x00138008 1 RO uint32 b[31:0] - - - - - - - latency 0x00138008 1 RO uint32 b[31:0] - - -
REG_BSN_MONITOR_V2_BSN_ALIGN_OUTPUT 1 1 REG xon_stable 0x00140000 1 RO uint32 b[0:0] - - - REG_BSN_MONITOR_V2_BSN_ALIGN_V2_OUTPUT 1 1 REG xon_stable 0x00140000 1 RO uint32 b[0:0] - - -
- - - - ready_stable 0x00140000 1 RO uint32 b[1:1] - - - - - - - ready_stable 0x00140000 1 RO uint32 b[1:1] - - -
- - - - sync_timeout 0x00140000 1 RO uint32 b[2:2] - - - - - - - sync_timeout 0x00140000 1 RO uint32 b[2:2] - - -
- - - - bsn_at_sync 0x00140001 1 RO uint64 b[31:0] b[31:0] - - - - - - bsn_at_sync 0x00140001 1 RO uint64 b[31:0] b[31:0] - -
...@@ -293,7 +303,7 @@ number_of_columns = 13 ...@@ -293,7 +303,7 @@ number_of_columns = 13
- - - - nof_valid 0x00140004 1 RO uint32 b[31:0] - - - - - - - nof_valid 0x00140004 1 RO uint32 b[31:0] - - -
- - - - nof_err 0x00140005 1 RO uint32 b[31:0] - - - - - - - nof_err 0x00140005 1 RO uint32 b[31:0] - - -
- - - - latency 0x00140008 1 RO uint32 b[31:0] - - - - - - - latency 0x00140008 1 RO uint32 b[31:0] - - -
REG_XST_UDP_MONITOR 1 1 REG xon_stable 0x00148000 1 RO uint32 b[0:0] - - - REG_BSN_MONITOR_V2_XST_OFFLOAD 1 1 REG xon_stable 0x00148000 1 RO uint32 b[0:0] - - -
- - - - ready_stable 0x00148000 1 RO uint32 b[1:1] - - - - - - - ready_stable 0x00148000 1 RO uint32 b[1:1] - - -
- - - - sync_timeout 0x00148000 1 RO uint32 b[2:2] - - - - - - - sync_timeout 0x00148000 1 RO uint32 b[2:2] - - -
- - - - bsn_at_sync 0x00148001 1 RO uint64 b[31:0] b[31:0] - - - - - - bsn_at_sync 0x00148001 1 RO uint64 b[31:0] b[31:0] - -
...@@ -604,182 +614,200 @@ number_of_columns = 13 ...@@ -604,182 +614,200 @@ number_of_columns = 13
- - - - eth_destination_mac 0x001c0029 1 RW uint64 b[31:0] b[31:0] - - - - - - eth_destination_mac 0x001c0029 1 RW uint64 b[31:0] b[31:0] - -
- - - - - 0x001c002a - - - b[15:0] b[47:32] - - - - - - - 0x001c002a - - - b[15:0] b[47:32] - -
- - - - word_align 0x001c002b 1 RW uint32 b[15:0] - - - - - - - word_align 0x001c002b 1 RW uint32 b[15:0] - - -
REG_NW_10GBE_MAC 1 1 REG rx_transfer_control 0x001c8000 1 RW uint32 b[0:0] - - - REG_BSN_MONITOR_V2_BST_OFFLOAD 2 1 REG xon_stable 0x001c8000 1 RO uint32 b[0:0] - 1 8
- - - - rx_transfer_status 0x001c8001 1 RO uint32 b[0:0] - - - - - - - ready_stable 0x001c8000 1 RO uint32 b[1:1] - - -
- - - - tx_transfer_control 0x001c8002 1 RW uint32 b[0:0] - - - - - - - sync_timeout 0x001c8000 1 RO uint32 b[2:2] - - -
- - - - rx_padcrc_control 0x001c8040 1 RW uint32 b[1:0] - - - - - - - bsn_at_sync 0x001c8001 1 RO uint64 b[31:0] b[31:0] - -
- - - - rx_crccheck_control 0x001c8080 1 RW uint32 b[1:0] - - - - - - - - 0x001c8002 - - - b[31:0] b[63:32] - -
- - - - rx_pktovrflow_error 0x001c80c0 1 RO uint64 b[3:0] b[35:32] - - - - - - nof_sop 0x001c8003 1 RO uint32 b[31:0] - - -
- - - - - 0x001c80c1 - - - b[31:0] b[31:0] - - - - - - nof_valid 0x001c8004 1 RO uint32 b[31:0] - - -
- - - - rx_pktovrflow_etherstatsdropevents 0x001c80c2 1 RO uint64 b[3:0] b[35:32] - - - - - - nof_err 0x001c8005 1 RO uint32 b[31:0] - - -
- - - - - 0x001c80c3 - - - b[31:0] b[31:0] - - - - - - latency 0x001c8008 1 RO uint32 b[31:0] - - -
- - - - rx_lane_decoder_preamble_control 0x001c8100 1 RW uint32 b[0:0] - - - REG_BSN_MONITOR_V2_BEAMLET_OUTPUT 2 1 REG xon_stable 0x001d0000 1 RO uint32 b[0:0] - 1 8
- - - - rx_preamble_inserter_control 0x001c8140 1 RW uint32 b[0:0] - - - - - - - ready_stable 0x001d0000 1 RO uint32 b[1:1] - - -
- - - - rx_frame_control 0x001c8800 1 RW uint32 b[19:0] - - - - - - - sync_timeout 0x001d0000 1 RO uint32 b[2:2] - - -
- - - - rx_frame_maxlength 0x001c8801 1 RW uint32 b[15:0] - - - - - - - bsn_at_sync 0x001d0001 1 RO uint64 b[31:0] b[31:0] - -
- - - - rx_frame_addr0 0x001c8802 1 RW uint32 b[15:0] - - - - - - - - 0x001d0002 - - - b[31:0] b[63:32] - -
- - - - rx_frame_addr1 0x001c8803 1 RW uint32 b[15:0] - - - - - - - nof_sop 0x001d0003 1 RO uint32 b[31:0] - - -
- - - - rx_frame_spaddr0_0 0x001c8804 1 RW uint32 b[15:0] - - - - - - - nof_valid 0x001d0004 1 RO uint32 b[31:0] - - -
- - - - rx_frame_spaddr0_1 0x001c8805 1 RW uint32 b[15:0] - - - - - - - nof_err 0x001d0005 1 RO uint32 b[31:0] - - -
- - - - rx_frame_spaddr1_0 0x001c8806 1 RW uint32 b[15:0] - - - - - - - latency 0x001d0008 1 RO uint32 b[31:0] - - -
- - - - rx_frame_spaddr1_1 0x001c8807 1 RW uint32 b[15:0] - - - REG_NW_10GBE_MAC 1 1 REG rx_transfer_control 0x001d8000 1 RW uint32 b[0:0] - - -
- - - - rx_frame_spaddr2_0 0x001c8808 1 RW uint32 b[15:0] - - - - - - - rx_transfer_status 0x001d8001 1 RO uint32 b[0:0] - - -
- - - - rx_frame_spaddr2_1 0x001c8809 1 RW uint32 b[15:0] - - - - - - - tx_transfer_control 0x001d8002 1 RW uint32 b[0:0] - - -
- - - - rx_frame_spaddr3_0 0x001c880a 1 RW uint32 b[15:0] - - - - - - - rx_padcrc_control 0x001d8040 1 RW uint32 b[1:0] - - -
- - - - rx_frame_spaddr3_1 0x001c880b 1 RW uint32 b[15:0] - - - - - - - rx_crccheck_control 0x001d8080 1 RW uint32 b[1:0] - - -
- - - - rx_pfc_control 0x001c8818 1 RW uint32 b[16:0] - - - - - - - rx_pktovrflow_error 0x001d80c0 1 RO uint64 b[3:0] b[35:32] - -
- - - - rx_stats_clr 0x001c8c00 1 RW uint32 b[0:0] - - - - - - - - 0x001d80c1 - - - b[31:0] b[31:0] - -
- - - - rx_stats_framesok 0x001c8c02 1 RO uint64 b[3:0] b[35:32] - - - - - - rx_pktovrflow_etherstatsdropevents 0x001d80c2 1 RO uint64 b[3:0] b[35:32] - -
- - - - - 0x001c8c03 - - - b[31:0] b[31:0] - - - - - - - 0x001d80c3 - - - b[31:0] b[31:0] - -
- - - - rx_stats_frameserr 0x001c8c04 1 RO uint64 b[3:0] b[35:32] - - - - - - rx_lane_decoder_preamble_control 0x001d8100 1 RW uint32 b[0:0] - - -
- - - - - 0x001c8c05 - - - b[31:0] b[31:0] - - - - - - rx_preamble_inserter_control 0x001d8140 1 RW uint32 b[0:0] - - -
- - - - rx_stats_framescrcerr 0x001c8c06 1 RO uint64 b[3:0] b[35:32] - - - - - - rx_frame_control 0x001d8800 1 RW uint32 b[19:0] - - -
- - - - - 0x001c8c07 - - - b[31:0] b[31:0] - - - - - - rx_frame_maxlength 0x001d8801 1 RW uint32 b[15:0] - - -
- - - - rx_stats_octetsok 0x001c8c08 1 RO uint64 b[3:0] b[35:32] - - - - - - rx_frame_addr0 0x001d8802 1 RW uint32 b[15:0] - - -
- - - - - 0x001c8c09 - - - b[31:0] b[31:0] - - - - - - rx_frame_addr1 0x001d8803 1 RW uint32 b[15:0] - - -
- - - - rx_stats_pausemacctrl_frames 0x001c8c0a 1 RO uint64 b[3:0] b[35:32] - - - - - - rx_frame_spaddr0_0 0x001d8804 1 RW uint32 b[15:0] - - -
- - - - - 0x001c8c0b - - - b[31:0] b[31:0] - - - - - - rx_frame_spaddr0_1 0x001d8805 1 RW uint32 b[15:0] - - -
- - - - rx_stats_iferrors 0x001c8c0c 1 RO uint64 b[3:0] b[35:32] - - - - - - rx_frame_spaddr1_0 0x001d8806 1 RW uint32 b[15:0] - - -
- - - - - 0x001c8c0d - - - b[31:0] b[31:0] - - - - - - rx_frame_spaddr1_1 0x001d8807 1 RW uint32 b[15:0] - - -
- - - - rx_stats_unicast_framesok 0x001c8c0e 1 RO uint64 b[3:0] b[35:32] - - - - - - rx_frame_spaddr2_0 0x001d8808 1 RW uint32 b[15:0] - - -
- - - - - 0x001c8c0f - - - b[31:0] b[31:0] - - - - - - rx_frame_spaddr2_1 0x001d8809 1 RW uint32 b[15:0] - - -
- - - - rx_stats_unicast_frameserr 0x001c8c10 1 RO uint64 b[3:0] b[35:32] - - - - - - rx_frame_spaddr3_0 0x001d880a 1 RW uint32 b[15:0] - - -
- - - - - 0x001c8c11 - - - b[31:0] b[31:0] - - - - - - rx_frame_spaddr3_1 0x001d880b 1 RW uint32 b[15:0] - - -
- - - - rx_stats_multicastframesok 0x001c8c12 1 RO uint64 b[3:0] b[35:32] - - - - - - rx_pfc_control 0x001d8818 1 RW uint32 b[16:0] - - -
- - - - - 0x001c8c13 - - - b[31:0] b[31:0] - - - - - - rx_stats_clr 0x001d8c00 1 RW uint32 b[0:0] - - -
- - - - rx_stats_multicast_frameserr 0x001c8c14 1 RO uint64 b[3:0] b[35:32] - - - - - - rx_stats_framesok 0x001d8c02 1 RO uint64 b[3:0] b[35:32] - -
- - - - - 0x001c8c15 - - - b[31:0] b[31:0] - - - - - - - 0x001d8c03 - - - b[31:0] b[31:0] - -
- - - - rx_stats_broadcastframesok 0x001c8c16 1 RO uint64 b[3:0] b[35:32] - - - - - - rx_stats_frameserr 0x001d8c04 1 RO uint64 b[3:0] b[35:32] - -
- - - - - 0x001c8c17 - - - b[31:0] b[31:0] - - - - - - - 0x001d8c05 - - - b[31:0] b[31:0] - -
- - - - rx_stats_broadcast_frameserr 0x001c8c18 1 RO uint64 b[3:0] b[35:32] - - - - - - rx_stats_framescrcerr 0x001d8c06 1 RO uint64 b[3:0] b[35:32] - -
- - - - - 0x001c8c19 - - - b[31:0] b[31:0] - - - - - - - 0x001d8c07 - - - b[31:0] b[31:0] - -
- - - - rx_stats_etherstatsoctets 0x001c8c1a 1 RO uint64 b[3:0] b[35:32] - - - - - - rx_stats_octetsok 0x001d8c08 1 RO uint64 b[3:0] b[35:32] - -
- - - - - 0x001c8c1b - - - b[31:0] b[31:0] - - - - - - - 0x001d8c09 - - - b[31:0] b[31:0] - -
- - - - rx_stats_etherstatspkts 0x001c8c1c 1 RO uint64 b[3:0] b[35:32] - - - - - - rx_stats_pausemacctrl_frames 0x001d8c0a 1 RO uint64 b[3:0] b[35:32] - -
- - - - - 0x001c8c1d - - - b[31:0] b[31:0] - - - - - - - 0x001d8c0b - - - b[31:0] b[31:0] - -
- - - - rx_stats_etherstats_undersizepkts 0x001c8c1e 1 RO uint64 b[3:0] b[35:32] - - - - - - rx_stats_iferrors 0x001d8c0c 1 RO uint64 b[3:0] b[35:32] - -
- - - - - 0x001c8c1f - - - b[31:0] b[31:0] - - - - - - - 0x001d8c0d - - - b[31:0] b[31:0] - -
- - - - rx_stats_etherstats_oversizepkts 0x001c8c20 1 RO uint64 b[3:0] b[35:32] - - - - - - rx_stats_unicast_framesok 0x001d8c0e 1 RO uint64 b[3:0] b[35:32] - -
- - - - - 0x001c8c21 - - - b[31:0] b[31:0] - - - - - - - 0x001d8c0f - - - b[31:0] b[31:0] - -
- - - - rx_stats_etherstats_pkts64octets 0x001c8c22 1 RO uint64 b[3:0] b[35:32] - - - - - - rx_stats_unicast_frameserr 0x001d8c10 1 RO uint64 b[3:0] b[35:32] - -
- - - - - 0x001c8c23 - - - b[31:0] b[31:0] - - - - - - - 0x001d8c11 - - - b[31:0] b[31:0] - -
- - - - rx_stats_etherstats_pkts65to127octets 0x001c8c24 1 RO uint64 b[3:0] b[35:32] - - - - - - rx_stats_multicastframesok 0x001d8c12 1 RO uint64 b[3:0] b[35:32] - -
- - - - - 0x001c8c25 - - - b[31:0] b[31:0] - - - - - - - 0x001d8c13 - - - b[31:0] b[31:0] - -
- - - - rx_stats_etherstats_pkts128to255octets 0x001c8c26 1 RO uint64 b[3:0] b[35:32] - - - - - - rx_stats_multicast_frameserr 0x001d8c14 1 RO uint64 b[3:0] b[35:32] - -
- - - - - 0x001c8c27 - - - b[31:0] b[31:0] - - - - - - - 0x001d8c15 - - - b[31:0] b[31:0] - -
- - - - rx_stats_etherstats_pkts256to511octets 0x001c8c28 1 RO uint64 b[3:0] b[35:32] - - - - - - rx_stats_broadcastframesok 0x001d8c16 1 RO uint64 b[3:0] b[35:32] - -
- - - - - 0x001c8c29 - - - b[31:0] b[31:0] - - - - - - - 0x001d8c17 - - - b[31:0] b[31:0] - -
- - - - rx_stats_etherstats_pkts512to1023octets 0x001c8c2a 1 RO uint64 b[3:0] b[35:32] - - - - - - rx_stats_broadcast_frameserr 0x001d8c18 1 RO uint64 b[3:0] b[35:32] - -
- - - - - 0x001c8c2b - - - b[31:0] b[31:0] - - - - - - - 0x001d8c19 - - - b[31:0] b[31:0] - -
- - - - rx_stats_etherstat_pkts1024to1518octets 0x001c8c2c 1 RO uint64 b[3:0] b[35:32] - - - - - - rx_stats_etherstatsoctets 0x001d8c1a 1 RO uint64 b[3:0] b[35:32] - -
- - - - - 0x001c8c2d - - - b[31:0] b[31:0] - - - - - - - 0x001d8c1b - - - b[31:0] b[31:0] - -
- - - - rx_stats_etherstats_pkts1519toxoctets 0x001c8c2e 1 RO uint64 b[3:0] b[35:32] - - - - - - rx_stats_etherstatspkts 0x001d8c1c 1 RO uint64 b[3:0] b[35:32] - -
- - - - - 0x001c8c2f - - - b[31:0] b[31:0] - - - - - - - 0x001d8c1d - - - b[31:0] b[31:0] - -
- - - - rx_stats_etherstats_fragments 0x001c8c30 1 RO uint64 b[3:0] b[35:32] - - - - - - rx_stats_etherstats_undersizepkts 0x001d8c1e 1 RO uint64 b[3:0] b[35:32] - -
- - - - - 0x001c8c31 - - - b[31:0] b[31:0] - - - - - - - 0x001d8c1f - - - b[31:0] b[31:0] - -
- - - - rx_stats_etherstats_jabbers 0x001c8c32 1 RO uint64 b[3:0] b[35:32] - - - - - - rx_stats_etherstats_oversizepkts 0x001d8c20 1 RO uint64 b[3:0] b[35:32] - -
- - - - - 0x001c8c33 - - - b[31:0] b[31:0] - - - - - - - 0x001d8c21 - - - b[31:0] b[31:0] - -
- - - - rx_stats_etherstatscrcerr 0x001c8c34 1 RO uint64 b[3:0] b[35:32] - - - - - - rx_stats_etherstats_pkts64octets 0x001d8c22 1 RO uint64 b[3:0] b[35:32] - -
- - - - - 0x001c8c35 - - - b[31:0] b[31:0] - - - - - - - 0x001d8c23 - - - b[31:0] b[31:0] - -
- - - - rx_stats_unicastmacctrlframes 0x001c8c36 1 RO uint64 b[3:0] b[35:32] - - - - - - rx_stats_etherstats_pkts65to127octets 0x001d8c24 1 RO uint64 b[3:0] b[35:32] - -
- - - - - 0x001c8c37 - - - b[31:0] b[31:0] - - - - - - - 0x001d8c25 - - - b[31:0] b[31:0] - -
- - - - rx_stats_multicastmac_ctrlframes 0x001c8c38 1 RO uint64 b[3:0] b[35:32] - - - - - - rx_stats_etherstats_pkts128to255octets 0x001d8c26 1 RO uint64 b[3:0] b[35:32] - -
- - - - - 0x001c8c39 - - - b[31:0] b[31:0] - - - - - - - 0x001d8c27 - - - b[31:0] b[31:0] - -
- - - - rx_stats_broadcastmac_ctrlframes 0x001c8c3a 1 RO uint64 b[3:0] b[35:32] - - - - - - rx_stats_etherstats_pkts256to511octets 0x001d8c28 1 RO uint64 b[3:0] b[35:32] - -
- - - - - 0x001c8c3b - - - b[31:0] b[31:0] - - - - - - - 0x001d8c29 - - - b[31:0] b[31:0] - -
- - - - rx_stats_pfcmacctrlframes 0x001c8c3c 1 RO uint64 b[3:0] b[35:32] - - - - - - rx_stats_etherstats_pkts512to1023octets 0x001d8c2a 1 RO uint64 b[3:0] b[35:32] - -
- - - - - 0x001c8c3d - - - b[31:0] b[31:0] - - - - - - - 0x001d8c2b - - - b[31:0] b[31:0] - -
- - - - tx_transfer_status 0x001c9001 1 RO uint32 b[0:0] - - - - - - - rx_stats_etherstat_pkts1024to1518octets 0x001d8c2c 1 RO uint64 b[3:0] b[35:32] - -
- - - - tx_padins_control 0x001c9040 1 RW uint32 b[0:0] - - - - - - - - 0x001d8c2d - - - b[31:0] b[31:0] - -
- - - - tx_crcins_control 0x001c9080 1 RW uint32 b[1:0] - - - - - - - rx_stats_etherstats_pkts1519toxoctets 0x001d8c2e 1 RO uint64 b[3:0] b[35:32] - -
- - - - tx_pktunderflow_error 0x001c90c0 1 RO uint64 b[3:0] b[35:32] - - - - - - - 0x001d8c2f - - - b[31:0] b[31:0] - -
- - - - - 0x001c90c1 - - - b[31:0] b[31:0] - - - - - - rx_stats_etherstats_fragments 0x001d8c30 1 RO uint64 b[3:0] b[35:32] - -
- - - - tx_preamble_control 0x001c9100 1 RW uint32 b[0:0] - - - - - - - - 0x001d8c31 - - - b[31:0] b[31:0] - -
- - - - tx_pauseframe_control 0x001c9140 1 RW uint32 b[1:0] - - - - - - - rx_stats_etherstats_jabbers 0x001d8c32 1 RO uint64 b[3:0] b[35:32] - -
- - - - tx_pauseframe_quanta 0x001c9141 1 RW uint32 b[15:0] - - - - - - - - 0x001d8c33 - - - b[31:0] b[31:0] - -
- - - - tx_pauseframe_enable 0x001c9142 1 RW uint32 b[0:0] - - - - - - - rx_stats_etherstatscrcerr 0x001d8c34 1 RO uint64 b[3:0] b[35:32] - -
- - - - pfc_pause_quanta_0 0x001c9180 1 RW uint32 b[31:0] - - - - - - - - 0x001d8c35 - - - b[31:0] b[31:0] - -
- - - - pfc_pause_quanta_1 0x001c9181 1 RW uint32 b[31:0] - - - - - - - rx_stats_unicastmacctrlframes 0x001d8c36 1 RO uint64 b[3:0] b[35:32] - -
- - - - pfc_pause_quanta_2 0x001c9182 1 RW uint32 b[31:0] - - - - - - - - 0x001d8c37 - - - b[31:0] b[31:0] - -
- - - - pfc_pause_quanta_3 0x001c9183 1 RW uint32 b[31:0] - - - - - - - rx_stats_multicastmac_ctrlframes 0x001d8c38 1 RO uint64 b[3:0] b[35:32] - -
- - - - pfc_pause_quanta_4 0x001c9184 1 RW uint32 b[31:0] - - - - - - - - 0x001d8c39 - - - b[31:0] b[31:0] - -
- - - - pfc_pause_quanta_5 0x001c9185 1 RW uint32 b[31:0] - - - - - - - rx_stats_broadcastmac_ctrlframes 0x001d8c3a 1 RO uint64 b[3:0] b[35:32] - -
- - - - pfc_pause_quanta_6 0x001c9186 1 RW uint32 b[31:0] - - - - - - - - 0x001d8c3b - - - b[31:0] b[31:0] - -
- - - - pfc_pause_quanta_7 0x001c9187 1 RW uint32 b[31:0] - - - - - - - rx_stats_pfcmacctrlframes 0x001d8c3c 1 RO uint64 b[3:0] b[35:32] - -
- - - - pfc_holdoff_quanta_0 0x001c9190 1 RW uint32 b[31:0] - - - - - - - - 0x001d8c3d - - - b[31:0] b[31:0] - -
- - - - pfc_holdoff_quanta_1 0x001c9191 1 RW uint32 b[31:0] - - - - - - - tx_transfer_status 0x001d9001 1 RO uint32 b[0:0] - - -
- - - - pfc_holdoff_quanta_2 0x001c9192 1 RW uint32 b[31:0] - - - - - - - tx_padins_control 0x001d9040 1 RW uint32 b[0:0] - - -
- - - - pfc_holdoff_quanta_3 0x001c9193 1 RW uint32 b[31:0] - - - - - - - tx_crcins_control 0x001d9080 1 RW uint32 b[1:0] - - -
- - - - pfc_holdoff_quanta_4 0x001c9194 1 RW uint32 b[31:0] - - - - - - - tx_pktunderflow_error 0x001d90c0 1 RO uint64 b[3:0] b[35:32] - -
- - - - pfc_holdoff_quanta_5 0x001c9195 1 RW uint32 b[31:0] - - - - - - - - 0x001d90c1 - - - b[31:0] b[31:0] - -
- - - - pfc_holdoff_quanta_6 0x001c9196 1 RW uint32 b[31:0] - - - - - - - tx_preamble_control 0x001d9100 1 RW uint32 b[0:0] - - -
- - - - pfc_holdoff_quanta_7 0x001c9197 1 RW uint32 b[31:0] - - - - - - - tx_pauseframe_control 0x001d9140 1 RW uint32 b[1:0] - - -
- - - - tx_pfc_priority_enable 0x001c91a0 1 RW uint32 b[7:0] - - - - - - - tx_pauseframe_quanta 0x001d9141 1 RW uint32 b[15:0] - - -
- - - - tx_addrins_control 0x001c9200 1 RW uint32 b[0:0] - - - - - - - tx_pauseframe_enable 0x001d9142 1 RW uint32 b[0:0] - - -
- - - - tx_addrins_macaddr0 0x001c9201 1 RW uint32 b[31:0] - - - - - - - pfc_pause_quanta_0 0x001d9180 1 RW uint32 b[31:0] - - -
- - - - tx_addrins_macaddr1 0x001c9202 1 RW uint32 b[15:0] - - - - - - - pfc_pause_quanta_1 0x001d9181 1 RW uint32 b[31:0] - - -
- - - - tx_frame_maxlength 0x001c9801 1 RW uint32 b[15:0] - - - - - - - pfc_pause_quanta_2 0x001d9182 1 RW uint32 b[31:0] - - -
- - - - tx_stats_clr 0x001c9c00 1 RW uint32 b[0:0] - - - - - - - pfc_pause_quanta_3 0x001d9183 1 RW uint32 b[31:0] - - -
- - - - tx_stats_framesok 0x001c9c02 1 RO uint64 b[3:0] b[35:32] - - - - - - pfc_pause_quanta_4 0x001d9184 1 RW uint32 b[31:0] - - -
- - - - - 0x001c9c03 - - - b[31:0] b[31:0] - - - - - - pfc_pause_quanta_5 0x001d9185 1 RW uint32 b[31:0] - - -
- - - - tx_stats_frameserr 0x001c9c04 1 RO uint64 b[3:0] b[35:32] - - - - - - pfc_pause_quanta_6 0x001d9186 1 RW uint32 b[31:0] - - -
- - - - - 0x001c9c05 - - - b[31:0] b[31:0] - - - - - - pfc_pause_quanta_7 0x001d9187 1 RW uint32 b[31:0] - - -
- - - - tx_stats_framescrcerr 0x001c9c06 1 RO uint64 b[3:0] b[35:32] - - - - - - pfc_holdoff_quanta_0 0x001d9190 1 RW uint32 b[31:0] - - -
- - - - - 0x001c9c07 - - - b[31:0] b[31:0] - - - - - - pfc_holdoff_quanta_1 0x001d9191 1 RW uint32 b[31:0] - - -
- - - - tx_stats_octetsok 0x001c9c08 1 RO uint64 b[3:0] b[35:32] - - - - - - pfc_holdoff_quanta_2 0x001d9192 1 RW uint32 b[31:0] - - -
- - - - - 0x001c9c09 - - - b[31:0] b[31:0] - - - - - - pfc_holdoff_quanta_3 0x001d9193 1 RW uint32 b[31:0] - - -
- - - - tx_stats_pausemacctrl_frames 0x001c9c0a 1 RO uint64 b[3:0] b[35:32] - - - - - - pfc_holdoff_quanta_4 0x001d9194 1 RW uint32 b[31:0] - - -
- - - - - 0x001c9c0b - - - b[31:0] b[31:0] - - - - - - pfc_holdoff_quanta_5 0x001d9195 1 RW uint32 b[31:0] - - -
- - - - tx_stats_iferrors 0x001c9c0c 1 RO uint64 b[3:0] b[35:32] - - - - - - pfc_holdoff_quanta_6 0x001d9196 1 RW uint32 b[31:0] - - -
- - - - - 0x001c9c0d - - - b[31:0] b[31:0] - - - - - - pfc_holdoff_quanta_7 0x001d9197 1 RW uint32 b[31:0] - - -
- - - - tx_stats_unicast_framesok 0x001c9c0e 1 RO uint64 b[3:0] b[35:32] - - - - - - tx_pfc_priority_enable 0x001d91a0 1 RW uint32 b[7:0] - - -
- - - - - 0x001c9c0f - - - b[31:0] b[31:0] - - - - - - tx_addrins_control 0x001d9200 1 RW uint32 b[0:0] - - -
- - - - tx_stats_unicast_frameserr 0x001c9c10 1 RO uint64 b[3:0] b[35:32] - - - - - - tx_addrins_macaddr0 0x001d9201 1 RW uint32 b[31:0] - - -
- - - - - 0x001c9c11 - - - b[31:0] b[31:0] - - - - - - tx_addrins_macaddr1 0x001d9202 1 RW uint32 b[15:0] - - -
- - - - tx_stats_multicastframesok 0x001c9c12 1 RO uint64 b[3:0] b[35:32] - - - - - - tx_frame_maxlength 0x001d9801 1 RW uint32 b[15:0] - - -
- - - - - 0x001c9c13 - - - b[31:0] b[31:0] - - - - - - tx_stats_clr 0x001d9c00 1 RW uint32 b[0:0] - - -
- - - - tx_stats_multicast_frameserr 0x001c9c14 1 RO uint64 b[3:0] b[35:32] - - - - - - tx_stats_framesok 0x001d9c02 1 RO uint64 b[3:0] b[35:32] - -
- - - - - 0x001c9c15 - - - b[31:0] b[31:0] - - - - - - - 0x001d9c03 - - - b[31:0] b[31:0] - -
- - - - tx_stats_broadcastframesok 0x001c9c16 1 RO uint64 b[3:0] b[35:32] - - - - - - tx_stats_frameserr 0x001d9c04 1 RO uint64 b[3:0] b[35:32] - -
- - - - - 0x001c9c17 - - - b[31:0] b[31:0] - - - - - - - 0x001d9c05 - - - b[31:0] b[31:0] - -
- - - - tx_stats_broadcast_frameserr 0x001c9c18 1 RO uint64 b[3:0] b[35:32] - - - - - - tx_stats_framescrcerr 0x001d9c06 1 RO uint64 b[3:0] b[35:32] - -
- - - - - 0x001c9c19 - - - b[31:0] b[31:0] - - - - - - - 0x001d9c07 - - - b[31:0] b[31:0] - -
- - - - tx_stats_etherstatsoctets 0x001c9c1a 1 RO uint64 b[3:0] b[35:32] - - - - - - tx_stats_octetsok 0x001d9c08 1 RO uint64 b[3:0] b[35:32] - -
- - - - - 0x001c9c1b - - - b[31:0] b[31:0] - - - - - - - 0x001d9c09 - - - b[31:0] b[31:0] - -
- - - - tx_stats_etherstatspkts 0x001c9c1c 1 RO uint64 b[3:0] b[35:32] - - - - - - tx_stats_pausemacctrl_frames 0x001d9c0a 1 RO uint64 b[3:0] b[35:32] - -
- - - - - 0x001c9c1d - - - b[31:0] b[31:0] - - - - - - - 0x001d9c0b - - - b[31:0] b[31:0] - -
- - - - tx_stats_etherstats_undersizepkts 0x001c9c1e 1 RO uint64 b[3:0] b[35:32] - - - - - - tx_stats_iferrors 0x001d9c0c 1 RO uint64 b[3:0] b[35:32] - -
- - - - - 0x001c9c1f - - - b[31:0] b[31:0] - - - - - - - 0x001d9c0d - - - b[31:0] b[31:0] - -
- - - - tx_stats_etherstats_oversizepkts 0x001c9c20 1 RO uint64 b[3:0] b[35:32] - - - - - - tx_stats_unicast_framesok 0x001d9c0e 1 RO uint64 b[3:0] b[35:32] - -
- - - - - 0x001c9c21 - - - b[31:0] b[31:0] - - - - - - - 0x001d9c0f - - - b[31:0] b[31:0] - -
- - - - tx_stats_etherstats_pkts64octets 0x001c9c22 1 RO uint64 b[3:0] b[35:32] - - - - - - tx_stats_unicast_frameserr 0x001d9c10 1 RO uint64 b[3:0] b[35:32] - -
- - - - - 0x001c9c23 - - - b[31:0] b[31:0] - - - - - - - 0x001d9c11 - - - b[31:0] b[31:0] - -
- - - - tx_stats_etherstats_pkts65to127octets 0x001c9c24 1 RO uint64 b[3:0] b[35:32] - - - - - - tx_stats_multicastframesok 0x001d9c12 1 RO uint64 b[3:0] b[35:32] - -
- - - - - 0x001c9c25 - - - b[31:0] b[31:0] - - - - - - - 0x001d9c13 - - - b[31:0] b[31:0] - -
- - - - tx_stats_etherstats_pkts128to255octets 0x001c9c26 1 RO uint64 b[3:0] b[35:32] - - - - - - tx_stats_multicast_frameserr 0x001d9c14 1 RO uint64 b[3:0] b[35:32] - -
- - - - - 0x001c9c27 - - - b[31:0] b[31:0] - - - - - - - 0x001d9c15 - - - b[31:0] b[31:0] - -
- - - - tx_stats_etherstats_pkts256to511octets 0x001c9c28 1 RO uint64 b[3:0] b[35:32] - - - - - - tx_stats_broadcastframesok 0x001d9c16 1 RO uint64 b[3:0] b[35:32] - -
- - - - - 0x001c9c29 - - - b[31:0] b[31:0] - - - - - - - 0x001d9c17 - - - b[31:0] b[31:0] - -
- - - - tx_stats_etherstats_pkts512to1023octets 0x001c9c2a 1 RO uint64 b[3:0] b[35:32] - - - - - - tx_stats_broadcast_frameserr 0x001d9c18 1 RO uint64 b[3:0] b[35:32] - -
- - - - - 0x001c9c2b - - - b[31:0] b[31:0] - - - - - - - 0x001d9c19 - - - b[31:0] b[31:0] - -
- - - - tx_stats_etherstat_pkts1024to1518octets 0x001c9c2c 1 RO uint64 b[3:0] b[35:32] - - - - - - tx_stats_etherstatsoctets 0x001d9c1a 1 RO uint64 b[3:0] b[35:32] - -
- - - - - 0x001c9c2d - - - b[31:0] b[31:0] - - - - - - - 0x001d9c1b - - - b[31:0] b[31:0] - -
- - - - tx_stats_etherstats_pkts1519toxoctets 0x001c9c2e 1 RO uint64 b[3:0] b[35:32] - - - - - - tx_stats_etherstatspkts 0x001d9c1c 1 RO uint64 b[3:0] b[35:32] - -
- - - - - 0x001c9c2f - - - b[31:0] b[31:0] - - - - - - - 0x001d9c1d - - - b[31:0] b[31:0] - -
- - - - tx_stats_etherstats_fragments 0x001c9c30 1 RO uint64 b[3:0] b[35:32] - - - - - - tx_stats_etherstats_undersizepkts 0x001d9c1e 1 RO uint64 b[3:0] b[35:32] - -
- - - - - 0x001c9c31 - - - b[31:0] b[31:0] - - - - - - - 0x001d9c1f - - - b[31:0] b[31:0] - -
- - - - tx_stats_etherstats_jabbers 0x001c9c32 1 RO uint64 b[3:0] b[35:32] - - - - - - tx_stats_etherstats_oversizepkts 0x001d9c20 1 RO uint64 b[3:0] b[35:32] - -
- - - - - 0x001c9c33 - - - b[31:0] b[31:0] - - - - - - - 0x001d9c21 - - - b[31:0] b[31:0] - -
- - - - tx_stats_etherstatscrcerr 0x001c9c34 1 RO uint64 b[3:0] b[35:32] - - - - - - tx_stats_etherstats_pkts64octets 0x001d9c22 1 RO uint64 b[3:0] b[35:32] - -
- - - - - 0x001c9c35 - - - b[31:0] b[31:0] - - - - - - - 0x001d9c23 - - - b[31:0] b[31:0] - -
- - - - tx_stats_unicastmacctrlframes 0x001c9c36 1 RO uint64 b[3:0] b[35:32] - - - - - - tx_stats_etherstats_pkts65to127octets 0x001d9c24 1 RO uint64 b[3:0] b[35:32] - -
- - - - - 0x001c9c37 - - - b[31:0] b[31:0] - - - - - - - 0x001d9c25 - - - b[31:0] b[31:0] - -
- - - - tx_stats_multicastmac_ctrlframes 0x001c9c38 1 RO uint64 b[3:0] b[35:32] - - - - - - tx_stats_etherstats_pkts128to255octets 0x001d9c26 1 RO uint64 b[3:0] b[35:32] - -
- - - - - 0x001c9c39 - - - b[31:0] b[31:0] - - - - - - - 0x001d9c27 - - - b[31:0] b[31:0] - -
- - - - tx_stats_broadcastmac_ctrlframes 0x001c9c3a 1 RO uint64 b[3:0] b[35:32] - - - - - - tx_stats_etherstats_pkts256to511octets 0x001d9c28 1 RO uint64 b[3:0] b[35:32] - -
- - - - - 0x001c9c3b - - - b[31:0] b[31:0] - - - - - - - 0x001d9c29 - - - b[31:0] b[31:0] - -
- - - - tx_stats_pfcmacctrlframes 0x001c9c3c 1 RO uint64 b[3:0] b[35:32] - - - - - - tx_stats_etherstats_pkts512to1023octets 0x001d9c2a 1 RO uint64 b[3:0] b[35:32] - -
- - - - - 0x001c9c3d - - - b[31:0] b[31:0] - - - - - - - 0x001d9c2b - - - b[31:0] b[31:0] - -
REG_NW_10GBE_ETH10G 1 1 REG tx_snk_out_xon 0x001d0000 1 RO uint32 b[0:0] - - - - - - - tx_stats_etherstat_pkts1024to1518octets 0x001d9c2c 1 RO uint64 b[3:0] b[35:32] - -
- - - - xgmii_tx_ready 0x001d0000 1 RO uint32 b[1:1] - - - - - - - - 0x001d9c2d - - - b[31:0] b[31:0] - -
- - - - xgmii_link_status 0x001d0000 1 RO uint32 b[3:2] - - - - - - - tx_stats_etherstats_pkts1519toxoctets 0x001d9c2e 1 RO uint64 b[3:0] b[35:32] - -
\ No newline at end of file - - - - - 0x001d9c2f - - - b[31:0] b[31:0] - -
- - - - tx_stats_etherstats_fragments 0x001d9c30 1 RO uint64 b[3:0] b[35:32] - -
- - - - - 0x001d9c31 - - - b[31:0] b[31:0] - -
- - - - tx_stats_etherstats_jabbers 0x001d9c32 1 RO uint64 b[3:0] b[35:32] - -
- - - - - 0x001d9c33 - - - b[31:0] b[31:0] - -
- - - - tx_stats_etherstatscrcerr 0x001d9c34 1 RO uint64 b[3:0] b[35:32] - -
- - - - - 0x001d9c35 - - - b[31:0] b[31:0] - -
- - - - tx_stats_unicastmacctrlframes 0x001d9c36 1 RO uint64 b[3:0] b[35:32] - -
- - - - - 0x001d9c37 - - - b[31:0] b[31:0] - -
- - - - tx_stats_multicastmac_ctrlframes 0x001d9c38 1 RO uint64 b[3:0] b[35:32] - -
- - - - - 0x001d9c39 - - - b[31:0] b[31:0] - -
- - - - tx_stats_broadcastmac_ctrlframes 0x001d9c3a 1 RO uint64 b[3:0] b[35:32] - -
- - - - - 0x001d9c3b - - - b[31:0] b[31:0] - -
- - - - tx_stats_pfcmacctrlframes 0x001d9c3c 1 RO uint64 b[3:0] b[35:32] - -
- - - - - 0x001d9c3d - - - b[31:0] b[31:0] - -
REG_NW_10GBE_ETH10G 1 1 REG tx_snk_out_xon 0x001e0000 1 RO uint32 b[0:0] - - -
- - - - xgmii_tx_ready 0x001e0000 1 RO uint32 b[1:1] - - -
- - - - xgmii_link_status 0x001e0000 1 RO uint32 b[3:2] - - -
\ No newline at end of file
Source diff could not be displayed: it is too large. Options to address this: view the blob.
...@@ -409,20 +409,6 @@ peripherals: ...@@ -409,20 +409,6 @@ peripherals:
mm_port_names: mm_port_names:
- REG_STAT_HDR_DAT_BST - REG_STAT_HDR_DAT_BST
- peripheral_name: nw_10GbE/nw_10GbE_unb2legacy # For beamlet output
peripheral_group: beamlet_output
parameter_overrides:
- { name: g_nof_macs, value: 1 }
mm_port_names:
- REG_NW_10GBE_MAC
- peripheral_name: nw_10GbE/nw_10GbE_eth10g # For beamlet output
peripheral_group: beamlet_output
parameter_overrides:
- { name: g_nof_macs, value: 1 }
mm_port_names:
- REG_NW_10GBE_ETH10G
- peripheral_name: dp/dp_bsn_monitor_v2 - peripheral_name: dp/dp_bsn_monitor_v2
peripheral_group: bst_udp peripheral_group: bst_udp
number_of_peripherals: c_N_beamsets number_of_peripherals: c_N_beamsets
...@@ -439,3 +425,16 @@ peripherals: ...@@ -439,3 +425,16 @@ peripherals:
mm_port_names: mm_port_names:
- REG_BSN_MONITOR_V2_BEAMLET_OUTPUT - REG_BSN_MONITOR_V2_BEAMLET_OUTPUT
- peripheral_name: nw_10GbE/nw_10GbE_unb2legacy # For beamlet output
peripheral_group: beamlet_output
parameter_overrides:
- { name: g_nof_macs, value: 1 }
mm_port_names:
- REG_NW_10GBE_MAC
- peripheral_name: nw_10GbE/nw_10GbE_eth10g # For beamlet output
peripheral_group: beamlet_output
parameter_overrides:
- { name: g_nof_macs, value: 1 }
mm_port_names:
- REG_NW_10GBE_ETH10G
Source diff could not be displayed: it is too large. Options to address this: view the blob.
...@@ -19,7 +19,7 @@ number_of_columns = 13 ...@@ -19,7 +19,7 @@ number_of_columns = 13
# col 13: mm_port_span (in MM words), if - then the span is not used or already defined on first line of MM port # col 13: mm_port_span (in MM words), if - then the span is not used or already defined on first line of MM port
# #
# col1 col2 col3 col4 col5 col6 col7 col8 col9 col10 col11 col12 col13 # col1 col2 col3 col4 col5 col6 col7 col8 col9 col10 col11 col12 col13
# ---------------------------- ---- ---- ----- ---------------------------------------- ---------- ------ ----- ----------- ---------- ---------- ----- ----- # ---------------------------------------- ---- ---- ----- ---------------------------------------- ---------- ------ ----- ----------- ---------- ---------- ----- -----
ROM_SYSTEM_INFO 1 1 RAM data 0x00004000 32768 RO char8 b[31:0] b[7:0] - - ROM_SYSTEM_INFO 1 1 RAM data 0x00004000 32768 RO char8 b[31:0] b[7:0] - -
PIO_SYSTEM_INFO 1 1 REG info 0x00000000 1 RO uint32 b[31:0] - - - PIO_SYSTEM_INFO 1 1 REG info 0x00000000 1 RO uint32 b[31:0] - - -
- - - - info_gn_index 0x00000000 1 RO uint32 b[7:0] - - - - - - - info_gn_index 0x00000000 1 RO uint32 b[7:0] - - -
...@@ -36,88 +36,97 @@ number_of_columns = 13 ...@@ -36,88 +36,97 @@ number_of_columns = 13
- - - - stamp_commit 0x00000011 3 RO uint32 b[31:0] - - - - - - - stamp_commit 0x00000011 3 RO uint32 b[31:0] - - -
- - - - design_note 0x00000014 52 RO char8 b[31:0] b[7:0] - - - - - - design_note 0x00000014 52 RO char8 b[31:0] b[7:0] - -
REG_WDI 1 1 REG wdi_override 0x00000c00 1 WO uint32 b[31:0] - - - REG_WDI 1 1 REG wdi_override 0x00000c00 1 WO uint32 b[31:0] - - -
REG_FPGA_TEMP_SENS 1 1 REG temp 0x00000dc8 1 RO uint32 b[31:0] - - - REG_FPGA_TEMP_SENS 1 1 REG temp 0x000431b8 1 RO uint32 b[31:0] - - -
REG_FPGA_VOLTAGE_SENS 1 1 REG voltages 0x00000db0 6 RO uint32 b[31:0] - - - REG_FPGA_VOLTAGE_SENS 1 1 REG voltages 0x00043180 6 RO uint32 b[31:0] - - -
RAM_SCRAP 1 1 RAM data 0x00000200 512 RW uint32 b[31:0] - - - RAM_SCRAP 1 1 RAM data 0x00000200 512 RW uint32 b[31:0] - - -
AVS_ETH_0_TSE 1 1 REG status 0x00000400 1024 RO uint32 b[31:0] - - - AVS_ETH_0_TSE 1 1 REG status 0x00000400 1024 RO uint32 b[31:0] - - -
AVS_ETH_0_REG 1 1 REG status 0x00000d80 12 RO uint32 b[31:0] - - - AVS_ETH_0_REG 1 1 REG status 0x00043130 12 RO uint32 b[31:0] - - -
AVS_ETH_0_RAM 1 1 RAM data 0x00000800 1024 RW uint32 b[31:0] - - - AVS_ETH_0_RAM 1 1 RAM data 0x00000800 1024 RW uint32 b[31:0] - - -
PIO_PPS 1 1 REG capture_cnt 0x00000dec 1 RO uint32 b[29:0] - - - PIO_PPS 1 1 REG capture_cnt 0x000431e4 1 RO uint32 b[29:0] - - -
- - - - stable 0x00000dec 1 RO uint32 b[30:30] - - - - - - - stable 0x000431e4 1 RO uint32 b[30:30] - - -
- - - - toggle 0x00000dec 1 RO uint32 b[31:31] - - - - - - - toggle 0x000431e4 1 RO uint32 b[31:31] - - -
- - - - expected_cnt 0x00000ded 1 RW uint32 b[27:0] - - - - - - - expected_cnt 0x000431e5 1 RW uint32 b[27:0] - - -
- - - - edge 0x00000ded 1 RW uint32 b[31:31] - - - - - - - edge 0x000431e5 1 RW uint32 b[31:31] - - -
- - - - offset_cnt 0x00000dee 1 RO uint32 b[27:0] - - - - - - - offset_cnt 0x000431e6 1 RO uint32 b[27:0] - - -
REG_EPCS 1 1 REG addr 0x00000dd0 1 WO uint32 b[23:0] - - - REG_EPCS 1 1 REG addr 0x000431c0 1 WO uint32 b[31:0] - - -
- - - - rden 0x00000dd1 1 WO uint32 b[0:0] - - - - - - - rden 0x000431c1 1 WO uint32 b[0:0] - - -
- - - - read_bit 0x00000dd2 1 WO uint32 b[0:0] - - - - - - - read_bit 0x000431c2 1 WO uint32 b[0:0] - - -
- - - - write_bit 0x00000dd3 1 WO uint32 b[0:0] - - - - - - - write_bit 0x000431c3 1 WO uint32 b[0:0] - - -
- - - - sector_erase 0x00000dd4 1 WO uint32 b[0:0] - - - - - - - sector_erase 0x000431c4 1 WO uint32 b[0:0] - - -
- - - - busy 0x00000dd5 1 RO uint32 b[0:0] - - - - - - - busy 0x000431c5 1 RO uint32 b[0:0] - - -
- - - - unprotect 0x00000dd6 1 WO uint32 b[31:0] - - - - - - - unprotect 0x000431c6 1 WO uint32 b[31:0] - - -
REG_DPMM_CTRL 1 1 REG rd_usedw 0x0002f004 1 RO uint32 b[31:0] - - - REG_DPMM_CTRL 1 1 REG rd_usedw 0x000431fe 1 RO uint32 b[31:0] - - -
REG_DPMM_DATA 1 1 FIFO data 0x0002f002 1 RO uint32 b[31:0] - - - REG_DPMM_DATA 1 1 FIFO data 0x000431fc 1 RO uint32 b[31:0] - - -
REG_MMDP_CTRL 1 1 REG wr_usedw 0x0002f000 1 RO uint32 b[31:0] - - - REG_MMDP_CTRL 1 1 REG wr_usedw 0x000431fa 1 RO uint32 b[31:0] - - -
- - - - wr_availw 0x0002f001 1 RO uint32 b[31:0] - - - - - - - wr_availw 0x000431fb 1 RO uint32 b[31:0] - - -
REG_MMDP_DATA 1 1 FIFO data 0x00000dfe 1 WO uint32 b[31:0] - - - REG_MMDP_DATA 1 1 FIFO data 0x000431f8 1 WO uint32 b[31:0] - - -
REG_REMU 1 1 REG reconfigure 0x00000dd8 1 WO uint32 b[31:0] - - - REG_REMU 1 1 REG reconfigure 0x000431c8 1 WO uint32 b[31:0] - - -
- - - - param 0x00000dd9 1 WO uint32 b[2:0] - - - - - - - param 0x000431c9 1 WO uint32 b[2:0] - - -
- - - - read_param 0x00000dda 1 WO uint32 b[0:0] - - - - - - - read_param 0x000431ca 1 WO uint32 b[0:0] - - -
- - - - write_param 0x00000ddb 1 WO uint32 b[0:0] - - - - - - - write_param 0x000431cb 1 WO uint32 b[0:0] - - -
- - - - data_out 0x00000ddc 1 RO uint32 b[23:0] - - - - - - - data_out 0x000431cc 1 RO uint32 b[31:0] - - -
- - - - data_in 0x00000ddd 1 WO uint32 b[23:0] - - - - - - - data_in 0x000431cd 1 WO uint32 b[31:0] - - -
- - - - busy 0x00000dde 1 RO uint32 b[0:0] - - - - - - - busy 0x000431ce 1 RO uint32 b[0:0] - - -
REG_SDP_INFO 1 1 REG block_period 0x00000da0 1 RO uint32 b[15:0] - - - REG_SDP_INFO 1 1 REG block_period 0x00043170 1 RO uint32 b[15:0] - - -
- - - - n_rn 0x00000da1 1 RW uint32 b[7:0] - - - - - - - beam_repositioning_flag 0x00043171 1 RW uint32 b[0:0] - - -
- - - - o_rn 0x00000da2 1 RW uint32 b[7:0] - - - - - - - fsub_type 0x00043172 1 RO uint32 b[0:0] - - -
- - - - n_si 0x00000da3 1 RW uint32 b[7:0] - - - - - - - f_adc 0x00043173 1 RO uint32 b[0:0] - - -
- - - - o_si 0x00000da4 1 RW uint32 b[7:0] - - - - - - - nyquist_zone_index 0x00043174 1 RW uint32 b[1:0] - - -
- - - - beam_repositioning_flag 0x00000da5 1 RW uint32 b[0:0] - - - - - - - observation_id 0x00043175 1 RW uint32 b[31:0] - - -
- - - - fsub_type 0x00000da6 1 RO uint32 b[0:0] - - - - - - - antenna_band_index 0x00043176 1 RW uint32 b[0:0] - - -
- - - - f_adc 0x00000da7 1 RO uint32 b[0:0] - - - - - - - station_id 0x00043177 1 RW uint32 b[15:0] - - -
- - - - nyquist_zone_index 0x00000da8 1 RW uint32 b[1:0] - - - REG_RING_INFO 1 1 REG use_cable_to_previous_rn 0x000431d0 1 RW uint32 b[0:0] - - -
- - - - observation_id 0x00000da9 1 RW uint32 b[31:0] - - - - - - - use_cable_to_next_rn 0x000431d1 1 RW uint32 b[0:0] - - -
- - - - antenna_band_index 0x00000daa 1 RO uint32 b[0:0] - - - - - - - n_rn 0x000431d2 1 RW uint32 b[7:0] - - -
- - - - station_id 0x00000dab 1 RW uint32 b[15:0] - - - - - - - o_rn 0x000431d3 1 RW uint32 b[7:0] - - -
PIO_JESD_CTRL 1 1 REG enable 0x00000df4 1 RW uint32 b[30:0] - - - PIO_JESD_CTRL 1 1 REG enable 0x000431ee 1 RW uint32 b[30:0] - - -
- - - - reset 0x00000df4 1 RW uint32 b[31:31] - - - - - - - reset 0x000431ee 1 RW uint32 b[31:31] - - -
JESD204B 1 12 REG rx_dll_ctrl 0x0002e014 1 RW uint32 b[16:0] - - 256 JESD204B 1 12 REG rx_lane_ctrl_common 0x00042000 1 RW uint32 b[2:0] - - 256
- - - - rx_syncn_sysref_ctrl 0x0002e015 1 RW uint32 b[24:0] - - - - - - - rx_lane_ctrl_0 0x00042001 1 RW uint32 b[2:0] - - -
- - - - rx_csr_sysref_always_on 0x0002e015 1 RW uint32 b[1:1] - - - - - - - rx_lane_ctrl_1 0x00042002 1 RW uint32 b[2:0] - - -
- - - - rx_csr_rbd_offset 0x0002e015 1 RW uint32 b[10:3] - - - - - - - rx_lane_ctrl_2 0x00042003 1 RW uint32 b[2:0] - - -
- - - - rx_csr_lmfc_offset 0x0002e015 1 RW uint32 b[19:12] - - - - - - - rx_lane_ctrl_3 0x00042004 1 RW uint32 b[2:0] - - -
- - - - rx_err0 0x0002e018 1 RW uint32 b[8:0] - - - - - - - rx_lane_ctrl_4 0x00042005 1 RW uint32 b[2:0] - - -
- - - - rx_err1 0x0002e019 1 RW uint32 b[9:0] - - - - - - - rx_lane_ctrl_5 0x00042006 1 RW uint32 b[2:0] - - -
- - - - csr_dev_syncn 0x0002e020 1 RO uint32 b[0:0] - - - - - - - rx_lane_ctrl_6 0x00042007 1 RW uint32 b[2:0] - - -
- - - - csr_rbd_count 0x0002e020 1 RO uint32 b[10:3] - - - - - - - rx_lane_ctrl_7 0x00042008 1 RW uint32 b[2:0] - - -
- - - - rx_status1 0x0002e021 1 RW uint32 b[23:0] - - - - - - - rx_dll_ctrl 0x00042014 1 RW uint32 b[16:0] - - -
- - - - rx_status2 0x0002e022 1 RW uint32 b[23:0] - - - - - - - rx_syncn_sysref_ctrl 0x00042015 1 RW uint32 b[24:0] - - -
- - - - rx_status3 0x0002e023 1 RW uint32 b[7:0] - - - - - - - rx_csr_sysref_always_on 0x00042015 1 RW uint32 b[1:1] - - -
- - - - rx_ilas_csr_l 0x0002e025 1 RW uint32 b[4:0] - - - - - - - rx_csr_rbd_offset 0x00042015 1 RW uint32 b[10:3] - - -
- - - - rx_ilas_csr_f 0x0002e025 1 RW uint32 b[15:8] - - - - - - - rx_csr_lmfc_offset 0x00042015 1 RW uint32 b[19:12] - - -
- - - - rx_ilas_csr_k 0x0002e025 1 RW uint32 b[20:16] - - - - - - - rx_err0 0x00042018 1 RW uint32 b[8:0] - - -
- - - - rx_ilas_csr_m 0x0002e025 1 RW uint32 b[31:24] - - - - - - - rx_err1 0x00042019 1 RW uint32 b[9:0] - - -
- - - - rx_ilas_csr_n 0x0002e026 1 RW uint32 b[4:0] - - - - - - - csr_dev_syncn 0x00042020 1 RO uint32 b[0:0] - - -
- - - - rx_ilas_csr_cs 0x0002e026 1 RW uint32 b[7:6] - - - - - - - csr_rbd_count 0x00042020 1 RO uint32 b[10:3] - - -
- - - - rx_ilas_csr_np 0x0002e026 1 RW uint32 b[12:8] - - - - - - - rx_status1 0x00042021 1 RW uint32 b[23:0] - - -
- - - - rx_ilas_csr_subclassv 0x0002e026 1 RW uint32 b[15:13] - - - - - - - rx_status2 0x00042022 1 RW uint32 b[23:0] - - -
- - - - rx_ilas_csr_s 0x0002e026 1 RW uint32 b[20:16] - - - - - - - rx_status3 0x00042023 1 RW uint32 b[7:0] - - -
- - - - rx_ilas_csr_jesdv 0x0002e026 1 RW uint32 b[23:21] - - - - - - - rx_ilas_csr_l 0x00042025 1 RW uint32 b[4:0] - - -
- - - - rx_ilas_csr_cf 0x0002e026 1 RW uint32 b[28:24] - - - - - - - rx_ilas_csr_f 0x00042025 1 RW uint32 b[15:8] - - -
- - - - rx_ilas_csr_hd 0x0002e026 1 RW uint32 b[31:31] - - - - - - - rx_ilas_csr_k 0x00042025 1 RW uint32 b[20:16] - - -
- - - - rx_status4 0x0002e03c 1 RW uint32 b[15:0] - - - - - - - rx_ilas_csr_m 0x00042025 1 RW uint32 b[31:24] - - -
- - - - rx_status5 0x0002e03d 1 RW uint32 b[15:0] - - - - - - - rx_ilas_csr_n 0x00042026 1 RW uint32 b[4:0] - - -
- - - - rx_status6 0x0002e03e 1 RW uint32 b[23:0] - - - - - - - rx_ilas_csr_cs 0x00042026 1 RW uint32 b[7:6] - - -
- - - - rx_status7 0x0002e03f 1 RO uint32 b[31:0] - - - - - - - rx_ilas_csr_np 0x00042026 1 RW uint32 b[12:8] - - -
REG_DP_SHIFTRAM 1 12 REG shift 0x00000c20 1 RW uint32 b[11:0] - - 2 - - - - rx_ilas_csr_subclassv 0x00042026 1 RW uint32 b[15:13] - - -
REG_BSN_SOURCE_V2 1 1 REG dp_on 0x00000dc0 1 RW uint32 b[0:0] - - - - - - - rx_ilas_csr_s 0x00042026 1 RW uint32 b[20:16] - - -
- - - - dp_on_pps 0x00000dc0 1 RW uint32 b[1:1] - - - - - - - rx_ilas_csr_jesdv 0x00042026 1 RW uint32 b[23:21] - - -
- - - - nof_clk_per_sync 0x00000dc1 1 RW uint32 b[31:0] - - - - - - - rx_ilas_csr_cf 0x00042026 1 RW uint32 b[28:24] - - -
- - - - bsn_init 0x00000dc2 1 RW uint64 b[31:0] b[31:0] - - - - - - rx_ilas_csr_hd 0x00042026 1 RW uint32 b[31:31] - - -
- - - - - 0x00000dc3 - - - b[31:0] b[63:32] - - - - - - rx_status4 0x0004203c 1 RW uint32 b[15:0] - - -
- - - - bsn_time_offset 0x00000dc4 1 RW uint32 b[9:0] - - - - - - - rx_status5 0x0004203d 1 RW uint32 b[15:0] - - -
REG_BSN_SCHEDULER 1 1 REG scheduled_bsn 0x00000dfa 1 RW uint64 b[31:0] b[31:0] - - - - - - rx_status6 0x0004203e 1 RW uint32 b[23:0] - - -
- - - - - 0x00000dfb - - - b[31:0] b[63:32] - - - - - - rx_status7 0x0004203f 1 RO uint32 b[31:0] - - -
REG_DP_SHIFTRAM 1 12 REG shift 0x00043100 1 RW uint32 b[11:0] - - 2
REG_BSN_SOURCE_V2 1 1 REG dp_on 0x000431b0 1 RW uint32 b[0:0] - - -
- - - - dp_on_pps 0x000431b0 1 RW uint32 b[1:1] - - -
- - - - nof_clk_per_sync 0x000431b1 1 RW uint32 b[31:0] - - -
- - - - bsn_init 0x000431b2 1 RW uint64 b[31:0] b[31:0] - -
- - - - - 0x000431b3 - - - b[31:0] b[63:32] - -
- - - - bsn_time_offset 0x000431b4 1 RW uint32 b[9:0] - - -
REG_BSN_SCHEDULER 1 1 REG scheduled_bsn 0x000431f4 1 RW uint64 b[31:0] b[31:0] - -
- - - - - 0x000431f5 - - - b[31:0] b[63:32] - -
REG_BSN_MONITOR_INPUT 1 1 REG xon_stable 0x00000100 1 RO uint32 b[0:0] - - - REG_BSN_MONITOR_INPUT 1 1 REG xon_stable 0x00000100 1 RO uint32 b[0:0] - - -
- - - - ready_stable 0x00000100 1 RO uint32 b[1:1] - - - - - - - ready_stable 0x00000100 1 RO uint32 b[1:1] - - -
- - - - sync_timeout 0x00000100 1 RO uint32 b[2:2] - - - - - - - sync_timeout 0x00000100 1 RO uint32 b[2:2] - - -
...@@ -129,27 +138,27 @@ number_of_columns = 13 ...@@ -129,27 +138,27 @@ number_of_columns = 13
- - - - bsn_first 0x00000106 1 RO uint64 b[31:0] b[31:0] - - - - - - bsn_first 0x00000106 1 RO uint64 b[31:0] b[31:0] - -
- - - - - 0x00000107 - - - b[31:0] b[63:32] - - - - - - - 0x00000107 - - - b[31:0] b[63:32] - -
- - - - bsn_first_cycle_cnt 0x00000108 1 RO uint32 b[31:0] - - - - - - - bsn_first_cycle_cnt 0x00000108 1 RO uint32 b[31:0] - - -
REG_WG 1 12 REG mode 0x00000d00 1 RW uint32 b[7:0] - - 4 REG_WG 1 12 REG mode 0x00043080 1 RW uint32 b[7:0] - - 4
- - - - nof_samples 0x00000d00 1 RW uint32 b[31:16] - - - - - - - nof_samples 0x00043080 1 RW uint32 b[31:16] - - -
- - - - phase 0x00000d01 1 RW uint32 b[15:0] - - - - - - - phase 0x00043081 1 RW uint32 b[15:0] - - -
- - - - freq 0x00000d02 1 RW uint32 b[30:0] - - - - - - - freq 0x00043082 1 RW uint32 b[30:0] - - -
- - - - ampl 0x00000d03 1 RW uint32 b[16:0] - - - - - - - ampl 0x00043083 1 RW uint32 b[16:0] - - -
RAM_WG 1 12 RAM data 0x00020000 1024 RW uint32 b[17:0] - - 1024 RAM_WG 1 12 RAM data 0x00034000 1024 RW uint32 b[17:0] - - 1024
RAM_ST_HISTOGRAM 1 12 RAM data 0x00002000 512 RW uint32 b[31:0] b[27:0] - 512 RAM_ST_HISTOGRAM 1 12 RAM data 0x00002000 512 RW uint32 b[31:0] b[27:0] - 512
REG_ADUH_MONITOR 1 12 REG mean_sum 0x00000d40 1 RO int64 b[31:0] b[31:0] - 4 REG_ADUH_MONITOR 1 12 REG mean_sum 0x000430c0 1 RO int64 b[31:0] b[31:0] - 4
- - - - - 0x00000d41 - - - b[31:0] b[63:32] - - - - - - - 0x000430c1 - - - b[31:0] b[63:32] - -
- - - - power_sum 0x00000d42 1 RO int64 b[31:0] b[31:0] - - - - - - power_sum 0x000430c2 1 RO int64 b[31:0] b[31:0] - -
- - - - - 0x00000d43 - - - b[31:0] b[63:32] - - - - - - - 0x000430c3 - - - b[31:0] b[63:32] - -
REG_DIAG_DATA_BUFFER_BSN 1 12 REG sync_cnt 0x00000020 1 RO uint32 b[31:0] - - 2 REG_DIAG_DATA_BUFFER_BSN 1 12 REG sync_cnt 0x00000c20 1 RO uint32 b[31:0] - - 2
- - - - word_cnt 0x00000021 1 RO uint32 b[31:0] - - - - - - - word_cnt 0x00000c21 1 RO uint32 b[31:0] - - -
RAM_DIAG_DATA_BUFFER_BSN 1 12 RAM data 0x00200000 1024 RW uint32 b[31:0] b[15:0] - 1024 RAM_DIAG_DATA_BUFFER_BSN 1 12 RAM data 0x00200000 1024 RW uint32 b[31:0] b[15:0] - 1024
REG_SI 1 1 REG enable 0x00000dfc 1 RW uint32 b[0:0] - - - REG_SI 1 1 REG enable 0x000431f6 1 RW uint32 b[0:0] - - -
RAM_FIL_COEFS 1 16 RAM data 0x00024000 1024 RW uint32 b[15:0] - - 1024 RAM_FIL_COEFS 1 16 RAM data 0x00038000 1024 RW uint32 b[15:0] - - 1024
RAM_EQUALIZER_GAINS 1 6 RAM data 0x0002c000 1024 RW cint16_ir b[31:0] - - 1024 RAM_EQUALIZER_GAINS 1 6 RAM data 0x00040000 1024 RW cint16_ir b[31:0] - - 1024
REG_DP_SELECTOR 1 1 REG input_select 0x00000df8 1 RW uint32 b[0:0] - - - REG_DP_SELECTOR 1 1 REG input_select 0x000431f2 1 RW uint32 b[0:0] - - -
RAM_ST_SST 1 6 RAM data 0x00028000 1024 RW uint64 b[31:0] b[31:0] - 2048 RAM_ST_SST 1 6 RAM data 0x0003c000 1024 RW uint64 b[31:0] b[31:0] - 2048
- - - - - 0x00028001 - - - b[21:0] b[53:32] - - - - - - - 0x0003c001 - - - b[21:0] b[53:32] - -
REG_STAT_ENABLE_SST 1 1 REG enable 0x00000df2 1 RW uint32 b[0:0] - - - REG_STAT_ENABLE_SST 1 1 REG enable 0x000431ec 1 RW uint32 b[0:0] - - -
REG_STAT_HDR_DAT_SST 1 1 REG bsn 0x00000c40 1 RW uint64 b[31:0] b[31:0] - - REG_STAT_HDR_DAT_SST 1 1 REG bsn 0x00000c40 1 RW uint64 b[31:0] b[31:0] - -
- - - - - 0x00000c41 - - - b[31:0] b[63:32] - - - - - - - 0x00000c41 - - - b[31:0] b[63:32] - -
- - - - sdp_block_period 0x00000c42 1 RW uint32 b[15:0] - - - - - - - sdp_block_period 0x00000c42 1 RW uint32 b[15:0] - - -
...@@ -196,25 +205,36 @@ number_of_columns = 13 ...@@ -196,25 +205,36 @@ number_of_columns = 13
- - - - eth_destination_mac 0x00000c69 1 RW uint64 b[31:0] b[31:0] - - - - - - eth_destination_mac 0x00000c69 1 RW uint64 b[31:0] b[31:0] - -
- - - - - 0x00000c6a - - - b[15:0] b[47:32] - - - - - - - 0x00000c6a - - - b[15:0] b[47:32] - -
- - - - word_align 0x00000c6b 1 RW uint32 b[15:0] - - - - - - - word_align 0x00000c6b 1 RW uint32 b[15:0] - - -
REG_BSN_SYNC_SCHEDULER_XSUB 1 1 REG ctrl_enable 0x00000c10 1 RW uint32 b[0:0] - - - REG_BSN_MONITOR_V2_SST_OFFLOAD 1 1 REG xon_stable 0x00000c08 1 RO uint32 b[0:0] - - -
- - - - ctrl_interval_size 0x00000c11 1 RW uint32 b[30:0] - - - - - - - ready_stable 0x00000c08 1 RO uint32 b[1:1] - - -
- - - - ctrl_start_bsn 0x00000c12 1 RW uint64 b[31:0] b[31:0] - - - - - - sync_timeout 0x00000c08 1 RO uint32 b[2:2] - - -
- - - - - 0x00000c13 - - - b[31:0] b[63:32] - - - - - - bsn_at_sync 0x00000c09 1 RO uint64 b[31:0] b[31:0] - -
- - - - mon_current_input_bsn 0x00000c14 1 RO uint64 b[31:0] b[31:0] - - - - - - - 0x00000c0a - - - b[31:0] b[63:32] - -
- - - - - 0x00000c15 - - - b[31:0] b[63:32] - - - - - - nof_sop 0x00000c0b 1 RO uint32 b[31:0] - - -
- - - - mon_input_bsn_at_sync 0x00000c16 1 RO uint64 b[31:0] b[31:0] - - - - - - nof_valid 0x00000c0c 1 RO uint32 b[31:0] - - -
- - - - - 0x00000c17 - - - b[31:0] b[63:32] - - - - - - nof_err 0x00000c0d 1 RO uint32 b[31:0] - - -
- - - - mon_output_enable 0x00000c18 1 RO uint32 b[0:0] - - - - - - - latency 0x00000c10 1 RO uint32 b[31:0] - - -
- - - - mon_output_sync_bsn 0x00000c19 1 RO uint64 b[31:0] b[31:0] - - REG_BSN_SYNC_SCHEDULER_XSUB 1 1 REG ctrl_enable 0x00043150 1 RW uint32 b[0:0] - - -
- - - - - 0x00000c1a - - - b[31:0] b[63:32] - - - - - - ctrl_interval_size 0x00043151 1 RW uint32 b[30:0] - - -
- - - - block_size 0x00000c1b 1 RO uint32 b[31:0] - - - - - - - ctrl_start_bsn 0x00043152 1 RW uint64 b[31:0] b[31:0] - -
RAM_ST_XSQ 1 9 RAM data 0x00018000 1008 RW cint64_ir b[31:0] b[31:0] - 4096 - - - - - 0x00043153 - - - b[31:0] b[63:32] - -
- - - - - 0x00018001 - - - b[31:0] b[63:32] - - - - - - mon_current_input_bsn 0x00043154 1 RO uint64 b[31:0] b[31:0] - -
REG_CROSSLETS_INFO 1 1 REG offset 0x00000d90 15 RW uint32 b[31:0] - - - - - - - - 0x00043155 - - - b[31:0] b[63:32] - -
- - - - step 0x00000d9f 1 RW uint32 b[31:0] - - - - - - - mon_input_bsn_at_sync 0x00043156 1 RO uint64 b[31:0] b[31:0] - -
REG_NOF_CROSSLETS 1 1 REG nof_crosslets 0x00000c02 1 RW uint32 b[31:0] - - - - - - - - 0x00043157 - - - b[31:0] b[63:32] - -
- - - - unused 0x00000c03 1 RW uint32 b[31:0] - - - - - - - mon_output_enable 0x00043158 1 RO uint32 b[0:0] - - -
REG_STAT_ENABLE_XST 1 1 REG enable 0x00000df0 1 RW uint32 b[0:0] - - - - - - - mon_output_sync_bsn 0x00043159 1 RO uint64 b[31:0] b[31:0] - -
- - - - - 0x0004315a - - - b[31:0] b[63:32] - -
- - - - block_size 0x0004315b 1 RO uint32 b[31:0] - - -
RAM_ST_XSQ 1 9 RAM data 0x00010000 1008 RW cint64_ir b[31:0] b[31:0] - 4096
- - - - - 0x00010001 - - - b[31:0] b[63:32] - -
- - - - - 0x00010002 - - - b[31:0] b[95:64] - -
- - - - - 0x00010003 - - - b[31:0] b[127:96] - -
REG_CROSSLETS_INFO 1 1 REG offset 0x00043160 15 RW uint32 b[31:0] - - -
- - - - step 0x0004316f 1 RW uint32 b[31:0] - - -
REG_NOF_CROSSLETS 1 1 REG nof_crosslets 0x000431e8 1 RW uint32 b[31:0] - - -
- - - - unused 0x000431e9 1 RW uint32 b[31:0] - - -
REG_STAT_ENABLE_XST 1 1 REG enable 0x000431ea 1 RW uint32 b[0:0] - - -
REG_STAT_HDR_DAT_XST 1 1 REG bsn 0x00000040 1 RW uint64 b[31:0] b[31:0] - - REG_STAT_HDR_DAT_XST 1 1 REG bsn 0x00000040 1 RW uint64 b[31:0] b[31:0] - -
- - - - - 0x00000041 - - - b[31:0] b[63:32] - - - - - - - 0x00000041 - - - b[31:0] b[63:32] - -
- - - - block_period 0x00000042 1 RW uint32 b[15:0] - - - - - - - block_period 0x00000042 1 RW uint32 b[15:0] - - -
...@@ -263,102 +283,355 @@ number_of_columns = 13 ...@@ -263,102 +283,355 @@ number_of_columns = 13
- - - - eth_destination_mac 0x00000069 1 RW uint64 b[31:0] b[31:0] - - - - - - eth_destination_mac 0x00000069 1 RW uint64 b[31:0] b[31:0] - -
- - - - - 0x0000006a - - - b[15:0] b[47:32] - - - - - - - 0x0000006a - - - b[15:0] b[47:32] - -
- - - - word_align 0x0000006b 1 RW uint32 b[15:0] - - - - - - - word_align 0x0000006b 1 RW uint32 b[15:0] - - -
RAM_SS_SS_WIDE 2 6 RAM data 0x0001c000 976 RW uint32 b[9:0] - 8192 1024 REG_BSN_ALIGN_V2 1 9 REG enable 0x00000020 1 RW uint32 b[0:0] - - 2
RAM_BF_WEIGHTS 2 12 RAM data 0x00010000 976 RW cint16_ir b[31:0] - 16384 1024 - - - - replaced_pkt_cnt 0x00000021 1 RO uint32 b[31:0] - - -
REG_BF_SCALE 2 1 REG scale 0x00000de8 1 RW uint32 b[15:0] - 2 2 REG_BSN_MONITOR_V2_BSN_ALIGN_V2_INPUT 1 9 REG xon_stable 0x00000080 1 RO uint32 b[0:0] - - 8
- - - - unused 0x00000de9 1 RW uint32 b[31:0] - - - - - - - ready_stable 0x00000080 1 RO uint32 b[1:1] - - -
REG_HDR_DAT 2 1 REG bsn 0x00000c80 1 RW uint64 b[31:0] b[31:0] 64 64 - - - - sync_timeout 0x00000080 1 RO uint32 b[2:2] - - -
- - - - - 0x00000c81 - - - b[31:0] b[63:32] - - - - - - bsn_at_sync 0x00000081 1 RO uint64 b[31:0] b[31:0] - -
- - - - sdp_block_period 0x00000c82 1 RW uint32 b[15:0] - - - - - - - - 0x00000082 - - - b[31:0] b[63:32] - -
- - - - sdp_nof_beamlets_per_block 0x00000c83 1 RW uint32 b[15:0] - - - - - - - nof_sop 0x00000083 1 RO uint32 b[31:0] - - -
- - - - sdp_nof_blocks_per_packet 0x00000c84 1 RW uint32 b[7:0] - - - - - - - nof_valid 0x00000084 1 RO uint32 b[31:0] - - -
- - - - sdp_beamlet_index 0x00000c85 1 RW uint32 b[15:0] - - - - - - - nof_err 0x00000085 1 RO uint32 b[31:0] - - -
- - - - sdp_beamlet_scale 0x00000c86 1 RW uint32 b[15:0] - - - - - - - latency 0x00000088 1 RO uint32 b[31:0] - - -
- - - - sdp_reserved 0x00000c87 1 RW uint64 b[31:0] b[31:0] - - REG_BSN_MONITOR_V2_BSN_ALIGN_V2_OUTPUT 1 1 REG xon_stable 0x000431a8 1 RO uint32 b[0:0] - - -
- - - - - 0x00000c88 - - - b[7:0] b[39:32] - - - - - - ready_stable 0x000431a8 1 RO uint32 b[1:1] - - -
- - - - sdp_source_info_gn_index 0x00000c89 1 RW uint32 b[4:0] - - - - - - - sync_timeout 0x000431a8 1 RO uint32 b[2:2] - - -
- - - - sdp_source_info_beamlet_width 0x00000c8a 1 RW uint32 b[7:5] - - - - - - - bsn_at_sync 0x000431a9 1 RO uint64 b[31:0] b[31:0] - -
- - - - sdp_source_info_repositioning_flag 0x00000c8b 1 RW uint32 b[9:9] - - - - - - - - 0x000431aa - - - b[31:0] b[63:32] - -
- - - - sdp_source_info_payload_error 0x00000c8c 1 RW uint32 b[10:10] - - - - - - - nof_sop 0x000431ab 1 RO uint32 b[31:0] - - -
- - - - sdp_source_info_fsub_type 0x00000c8d 1 RW uint32 b[11:11] - - - - - - - nof_valid 0x000431ac 1 RO uint32 b[31:0] - - -
- - - - sdp_source_info_f_adc 0x00000c8e 1 RW uint32 b[12:12] - - - - - - - nof_err 0x000431ad 1 RO uint32 b[31:0] - - -
- - - - sdp_source_info_nyquist_zone_index 0x00000c8f 1 RW uint32 b[14:13] - - - - - - - latency 0x000431b0 1 RO uint32 b[31:0] - - -
- - - - sdp_source_info_antenna_band_index 0x00000c90 1 RW uint32 b[15:15] - - - REG_BSN_MONITOR_V2_XST_OFFLOAD 1 1 REG xon_stable 0x000431a0 1 RO uint32 b[0:0] - - -
- - - - sdp_station_id 0x00000c91 1 RW uint32 b[15:0] - - - - - - - ready_stable 0x000431a0 1 RO uint32 b[1:1] - - -
- - - - sdp_observation_id 0x00000c92 1 RW uint32 b[31:0] - - - - - - - sync_timeout 0x000431a0 1 RO uint32 b[2:2] - - -
- - - - sdp_version_id 0x00000c93 1 RO uint32 b[7:0] - - - - - - - bsn_at_sync 0x000431a1 1 RO uint64 b[31:0] b[31:0] - -
- - - - sdp_marker 0x00000c94 1 RO uint32 b[7:0] - - - - - - - - 0x000431a2 - - - b[31:0] b[63:32] - -
- - - - udp_checksum 0x00000c95 1 RW uint32 b[15:0] - - - - - - - nof_sop 0x000431a3 1 RO uint32 b[31:0] - - -
- - - - udp_length 0x00000c96 1 RW uint32 b[15:0] - - - - - - - nof_valid 0x000431a4 1 RO uint32 b[31:0] - - -
- - - - udp_destination_port 0x00000c97 1 RW uint32 b[15:0] - - - - - - - nof_err 0x000431a5 1 RO uint32 b[31:0] - - -
- - - - udp_source_port 0x00000c98 1 RW uint32 b[15:0] - - - - - - - latency 0x000431a8 1 RO uint32 b[31:0] - - -
- - - - ip_destination_address 0x00000c99 1 RW uint32 b[31:0] - - - REG_RING_LANE_INFO_XST 1 1 REG lane_direction 0x00000c02 1 RO uint32 b[0:0] - - -
- - - - ip_source_address 0x00000c9a 1 RW uint32 b[31:0] - - - - - - - transport_nof_hops 0x00000c03 1 RW uint32 b[31:0] - - -
- - - - ip_header_checksum 0x00000c9b 1 RW uint32 b[15:0] - - - REG_BSN_MONITOR_V2_RING_RX_XST 1 16 REG xon_stable 0x00000d00 1 RO uint32 b[0:0] - - 8
- - - - ip_protocol 0x00000c9c 1 RW uint32 b[7:0] - - - - - - - ready_stable 0x00000d00 1 RO uint32 b[1:1] - - -
- - - - ip_time_to_live 0x00000c9d 1 RW uint32 b[7:0] - - - - - - - sync_timeout 0x00000d00 1 RO uint32 b[2:2] - - -
- - - - ip_fragment_offset 0x00000c9e 1 RW uint32 b[12:0] - - - - - - - bsn_at_sync 0x00000d01 1 RO uint64 b[31:0] b[31:0] - -
- - - - ip_flags 0x00000c9f 1 RW uint32 b[2:0] - - - - - - - - 0x00000d02 - - - b[31:0] b[63:32] - -
- - - - ip_identification 0x00000ca0 1 RW uint32 b[15:0] - - - - - - - nof_sop 0x00000d03 1 RO uint32 b[31:0] - - -
- - - - ip_total_length 0x00000ca1 1 RW uint32 b[15:0] - - - - - - - nof_valid 0x00000d04 1 RO uint32 b[31:0] - - -
- - - - ip_services 0x00000ca2 1 RW uint32 b[7:0] - - - - - - - nof_err 0x00000d05 1 RO uint32 b[31:0] - - -
- - - - ip_header_length 0x00000ca3 1 RW uint32 b[3:0] - - - - - - - latency 0x00000d08 1 RO uint32 b[31:0] - - -
- - - - ip_version 0x00000ca4 1 RW uint32 b[3:0] - - - REG_BSN_MONITOR_V2_RING_TX_XST 1 16 REG xon_stable 0x00000c80 1 RO uint32 b[0:0] - - 8
- - - - eth_type 0x00000ca5 1 RO uint32 b[15:0] - - - - - - - ready_stable 0x00000c80 1 RO uint32 b[1:1] - - -
- - - - eth_source_mac 0x00000ca6 1 RO uint64 b[31:0] b[31:0] - - - - - - sync_timeout 0x00000c80 1 RO uint32 b[2:2] - - -
- - - - - 0x00000ca7 - - - b[15:0] b[47:32] - - - - - - bsn_at_sync 0x00000c81 1 RO uint64 b[31:0] b[31:0] - -
- - - - eth_destination_mac 0x00000ca8 1 RW uint64 b[31:0] b[31:0] - - - - - - - 0x00000c82 - - - b[31:0] b[63:32] - -
- - - - - 0x00000ca9 - - - b[15:0] b[47:32] - - - - - - nof_sop 0x00000c83 1 RO uint32 b[31:0] - - -
REG_DP_XONOFF 2 1 REG enable_stream 0x00000de4 1 RW uint32 b[0:0] - 2 2 - - - - nof_valid 0x00000c84 1 RO uint32 b[31:0] - - -
- - - - nof_err 0x00000c85 1 RO uint32 b[31:0] - - -
- - - - latency 0x00000c88 1 RO uint32 b[31:0] - - -
REG_DP_BLOCK_VALIDATE_ERR_XST 1 1 REG err_count_index 0x00043140 8 RO uint32 b[31:0] - - -
- - - - total_discarded_blocks 0x00043148 1 RO uint32 b[31:0] - - -
- - - - total_block_count 0x00043149 1 RO uint32 b[31:0] - - -
- - - - clear 0x0004314a 1 RW uint32 b[31:0] - - -
REG_DP_BLOCK_VALIDATE_BSN_AT_SYNC_XST 1 1 REG nof_sync_discarded 0x000431d4 1 RO uint32 b[31:0] - - -
- - - - nof_sync 0x000431d5 1 RO uint32 b[31:0] - - -
- - - - clear 0x000431d6 1 RW uint32 b[31:0] - - -
REG_TR_10GBE_MAC 1 3 REG rx_transfer_control 0x00020000 1 RW uint32 b[0:0] - - 1
- - - - rx_transfer_status 0x00020001 1 RO uint32 b[0:0] - - -
- - - - tx_transfer_control 0x00020002 1 RW uint32 b[0:0] - - -
- - - - rx_padcrc_control 0x00020040 1 RW uint32 b[1:0] - - -
- - - - rx_crccheck_control 0x00020080 1 RW uint32 b[1:0] - - -
- - - - rx_pktovrflow_error 0x000200c0 1 RO uint64 b[3:0] b[35:32] - -
- - - - - 0x000200c1 - - - b[31:0] b[31:0] - -
- - - - rx_pktovrflow_etherstatsdropevents 0x000200c2 1 RO uint64 b[3:0] b[35:32] - -
- - - - - 0x000200c3 - - - b[31:0] b[31:0] - -
- - - - rx_lane_decoder_preamble_control 0x00020100 1 RW uint32 b[0:0] - - -
- - - - rx_preamble_inserter_control 0x00020140 1 RW uint32 b[0:0] - - -
- - - - rx_frame_control 0x00020800 1 RW uint32 b[19:0] - - -
- - - - rx_frame_maxlength 0x00020801 1 RW uint32 b[15:0] - - -
- - - - rx_frame_addr0 0x00020802 1 RW uint32 b[15:0] - - -
- - - - rx_frame_addr1 0x00020803 1 RW uint32 b[15:0] - - -
- - - - rx_frame_spaddr0_0 0x00020804 1 RW uint32 b[15:0] - - -
- - - - rx_frame_spaddr0_1 0x00020805 1 RW uint32 b[15:0] - - -
- - - - rx_frame_spaddr1_0 0x00020806 1 RW uint32 b[15:0] - - -
- - - - rx_frame_spaddr1_1 0x00020807 1 RW uint32 b[15:0] - - -
- - - - rx_frame_spaddr2_0 0x00020808 1 RW uint32 b[15:0] - - -
- - - - rx_frame_spaddr2_1 0x00020809 1 RW uint32 b[15:0] - - -
- - - - rx_frame_spaddr3_0 0x0002080a 1 RW uint32 b[15:0] - - -
- - - - rx_frame_spaddr3_1 0x0002080b 1 RW uint32 b[15:0] - - -
- - - - rx_pfc_control 0x00020818 1 RW uint32 b[16:0] - - -
- - - - rx_stats_clr 0x00020c00 1 RW uint32 b[0:0] - - -
- - - - rx_stats_framesok 0x00020c02 1 RO uint64 b[3:0] b[35:32] - -
- - - - - 0x00020c03 - - - b[31:0] b[31:0] - -
- - - - rx_stats_frameserr 0x00020c04 1 RO uint64 b[3:0] b[35:32] - -
- - - - - 0x00020c05 - - - b[31:0] b[31:0] - -
- - - - rx_stats_framescrcerr 0x00020c06 1 RO uint64 b[3:0] b[35:32] - -
- - - - - 0x00020c07 - - - b[31:0] b[31:0] - -
- - - - rx_stats_octetsok 0x00020c08 1 RO uint64 b[3:0] b[35:32] - -
- - - - - 0x00020c09 - - - b[31:0] b[31:0] - -
- - - - rx_stats_pausemacctrl_frames 0x00020c0a 1 RO uint64 b[3:0] b[35:32] - -
- - - - - 0x00020c0b - - - b[31:0] b[31:0] - -
- - - - rx_stats_iferrors 0x00020c0c 1 RO uint64 b[3:0] b[35:32] - -
- - - - - 0x00020c0d - - - b[31:0] b[31:0] - -
- - - - rx_stats_unicast_framesok 0x00020c0e 1 RO uint64 b[3:0] b[35:32] - -
- - - - - 0x00020c0f - - - b[31:0] b[31:0] - -
- - - - rx_stats_unicast_frameserr 0x00020c10 1 RO uint64 b[3:0] b[35:32] - -
- - - - - 0x00020c11 - - - b[31:0] b[31:0] - -
- - - - rx_stats_multicastframesok 0x00020c12 1 RO uint64 b[3:0] b[35:32] - -
- - - - - 0x00020c13 - - - b[31:0] b[31:0] - -
- - - - rx_stats_multicast_frameserr 0x00020c14 1 RO uint64 b[3:0] b[35:32] - -
- - - - - 0x00020c15 - - - b[31:0] b[31:0] - -
- - - - rx_stats_broadcastframesok 0x00020c16 1 RO uint64 b[3:0] b[35:32] - -
- - - - - 0x00020c17 - - - b[31:0] b[31:0] - -
- - - - rx_stats_broadcast_frameserr 0x00020c18 1 RO uint64 b[3:0] b[35:32] - -
- - - - - 0x00020c19 - - - b[31:0] b[31:0] - -
- - - - rx_stats_etherstatsoctets 0x00020c1a 1 RO uint64 b[3:0] b[35:32] - -
- - - - - 0x00020c1b - - - b[31:0] b[31:0] - -
- - - - rx_stats_etherstatspkts 0x00020c1c 1 RO uint64 b[3:0] b[35:32] - -
- - - - - 0x00020c1d - - - b[31:0] b[31:0] - -
- - - - rx_stats_etherstats_undersizepkts 0x00020c1e 1 RO uint64 b[3:0] b[35:32] - -
- - - - - 0x00020c1f - - - b[31:0] b[31:0] - -
- - - - rx_stats_etherstats_oversizepkts 0x00020c20 1 RO uint64 b[3:0] b[35:32] - -
- - - - - 0x00020c21 - - - b[31:0] b[31:0] - -
- - - - rx_stats_etherstats_pkts64octets 0x00020c22 1 RO uint64 b[3:0] b[35:32] - -
- - - - - 0x00020c23 - - - b[31:0] b[31:0] - -
- - - - rx_stats_etherstats_pkts65to127octets 0x00020c24 1 RO uint64 b[3:0] b[35:32] - -
- - - - - 0x00020c25 - - - b[31:0] b[31:0] - -
- - - - rx_stats_etherstats_pkts128to255octets 0x00020c26 1 RO uint64 b[3:0] b[35:32] - -
- - - - - 0x00020c27 - - - b[31:0] b[31:0] - -
- - - - rx_stats_etherstats_pkts256to511octets 0x00020c28 1 RO uint64 b[3:0] b[35:32] - -
- - - - - 0x00020c29 - - - b[31:0] b[31:0] - -
- - - - rx_stats_etherstats_pkts512to1023octets 0x00020c2a 1 RO uint64 b[3:0] b[35:32] - -
- - - - - 0x00020c2b - - - b[31:0] b[31:0] - -
- - - - rx_stats_etherstat_pkts1024to1518octets 0x00020c2c 1 RO uint64 b[3:0] b[35:32] - -
- - - - - 0x00020c2d - - - b[31:0] b[31:0] - -
- - - - rx_stats_etherstats_pkts1519toxoctets 0x00020c2e 1 RO uint64 b[3:0] b[35:32] - -
- - - - - 0x00020c2f - - - b[31:0] b[31:0] - -
- - - - rx_stats_etherstats_fragments 0x00020c30 1 RO uint64 b[3:0] b[35:32] - -
- - - - - 0x00020c31 - - - b[31:0] b[31:0] - -
- - - - rx_stats_etherstats_jabbers 0x00020c32 1 RO uint64 b[3:0] b[35:32] - -
- - - - - 0x00020c33 - - - b[31:0] b[31:0] - -
- - - - rx_stats_etherstatscrcerr 0x00020c34 1 RO uint64 b[3:0] b[35:32] - -
- - - - - 0x00020c35 - - - b[31:0] b[31:0] - -
- - - - rx_stats_unicastmacctrlframes 0x00020c36 1 RO uint64 b[3:0] b[35:32] - -
- - - - - 0x00020c37 - - - b[31:0] b[31:0] - -
- - - - rx_stats_multicastmac_ctrlframes 0x00020c38 1 RO uint64 b[3:0] b[35:32] - -
- - - - - 0x00020c39 - - - b[31:0] b[31:0] - -
- - - - rx_stats_broadcastmac_ctrlframes 0x00020c3a 1 RO uint64 b[3:0] b[35:32] - -
- - - - - 0x00020c3b - - - b[31:0] b[31:0] - -
- - - - rx_stats_pfcmacctrlframes 0x00020c3c 1 RO uint64 b[3:0] b[35:32] - -
- - - - - 0x00020c3d - - - b[31:0] b[31:0] - -
- - - - tx_transfer_status 0x00021001 1 RO uint32 b[0:0] - - -
- - - - tx_padins_control 0x00021040 1 RW uint32 b[0:0] - - -
- - - - tx_crcins_control 0x00021080 1 RW uint32 b[1:0] - - -
- - - - tx_pktunderflow_error 0x000210c0 1 RO uint64 b[3:0] b[35:32] - -
- - - - - 0x000210c1 - - - b[31:0] b[31:0] - -
- - - - tx_preamble_control 0x00021100 1 RW uint32 b[0:0] - - -
- - - - tx_pauseframe_control 0x00021140 1 RW uint32 b[1:0] - - -
- - - - tx_pauseframe_quanta 0x00021141 1 RW uint32 b[15:0] - - -
- - - - tx_pauseframe_enable 0x00021142 1 RW uint32 b[0:0] - - -
- - - - pfc_pause_quanta_0 0x00021180 1 RW uint32 b[31:0] - - -
- - - - pfc_pause_quanta_1 0x00021181 1 RW uint32 b[31:0] - - -
- - - - pfc_pause_quanta_2 0x00021182 1 RW uint32 b[31:0] - - -
- - - - pfc_pause_quanta_3 0x00021183 1 RW uint32 b[31:0] - - -
- - - - pfc_pause_quanta_4 0x00021184 1 RW uint32 b[31:0] - - -
- - - - pfc_pause_quanta_5 0x00021185 1 RW uint32 b[31:0] - - -
- - - - pfc_pause_quanta_6 0x00021186 1 RW uint32 b[31:0] - - -
- - - - pfc_pause_quanta_7 0x00021187 1 RW uint32 b[31:0] - - -
- - - - pfc_holdoff_quanta_0 0x00021190 1 RW uint32 b[31:0] - - -
- - - - pfc_holdoff_quanta_1 0x00021191 1 RW uint32 b[31:0] - - -
- - - - pfc_holdoff_quanta_2 0x00021192 1 RW uint32 b[31:0] - - -
- - - - pfc_holdoff_quanta_3 0x00021193 1 RW uint32 b[31:0] - - -
- - - - pfc_holdoff_quanta_4 0x00021194 1 RW uint32 b[31:0] - - -
- - - - pfc_holdoff_quanta_5 0x00021195 1 RW uint32 b[31:0] - - -
- - - - pfc_holdoff_quanta_6 0x00021196 1 RW uint32 b[31:0] - - -
- - - - pfc_holdoff_quanta_7 0x00021197 1 RW uint32 b[31:0] - - -
- - - - tx_pfc_priority_enable 0x000211a0 1 RW uint32 b[7:0] - - -
- - - - tx_addrins_control 0x00021200 1 RW uint32 b[0:0] - - -
- - - - tx_addrins_macaddr0 0x00021201 1 RW uint32 b[31:0] - - -
- - - - tx_addrins_macaddr1 0x00021202 1 RW uint32 b[15:0] - - -
- - - - tx_frame_maxlength 0x00021801 1 RW uint32 b[15:0] - - -
- - - - tx_stats_clr 0x00021c00 1 RW uint32 b[0:0] - - -
- - - - tx_stats_framesok 0x00021c02 1 RO uint64 b[3:0] b[35:32] - -
- - - - - 0x00021c03 - - - b[31:0] b[31:0] - -
- - - - tx_stats_frameserr 0x00021c04 1 RO uint64 b[3:0] b[35:32] - -
- - - - - 0x00021c05 - - - b[31:0] b[31:0] - -
- - - - tx_stats_framescrcerr 0x00021c06 1 RO uint64 b[3:0] b[35:32] - -
- - - - - 0x00021c07 - - - b[31:0] b[31:0] - -
- - - - tx_stats_octetsok 0x00021c08 1 RO uint64 b[3:0] b[35:32] - -
- - - - - 0x00021c09 - - - b[31:0] b[31:0] - -
- - - - tx_stats_pausemacctrl_frames 0x00021c0a 1 RO uint64 b[3:0] b[35:32] - -
- - - - - 0x00021c0b - - - b[31:0] b[31:0] - -
- - - - tx_stats_iferrors 0x00021c0c 1 RO uint64 b[3:0] b[35:32] - -
- - - - - 0x00021c0d - - - b[31:0] b[31:0] - -
- - - - tx_stats_unicast_framesok 0x00021c0e 1 RO uint64 b[3:0] b[35:32] - -
- - - - - 0x00021c0f - - - b[31:0] b[31:0] - -
- - - - tx_stats_unicast_frameserr 0x00021c10 1 RO uint64 b[3:0] b[35:32] - -
- - - - - 0x00021c11 - - - b[31:0] b[31:0] - -
- - - - tx_stats_multicastframesok 0x00021c12 1 RO uint64 b[3:0] b[35:32] - -
- - - - - 0x00021c13 - - - b[31:0] b[31:0] - -
- - - - tx_stats_multicast_frameserr 0x00021c14 1 RO uint64 b[3:0] b[35:32] - -
- - - - - 0x00021c15 - - - b[31:0] b[31:0] - -
- - - - tx_stats_broadcastframesok 0x00021c16 1 RO uint64 b[3:0] b[35:32] - -
- - - - - 0x00021c17 - - - b[31:0] b[31:0] - -
- - - - tx_stats_broadcast_frameserr 0x00021c18 1 RO uint64 b[3:0] b[35:32] - -
- - - - - 0x00021c19 - - - b[31:0] b[31:0] - -
- - - - tx_stats_etherstatsoctets 0x00021c1a 1 RO uint64 b[3:0] b[35:32] - -
- - - - - 0x00021c1b - - - b[31:0] b[31:0] - -
- - - - tx_stats_etherstatspkts 0x00021c1c 1 RO uint64 b[3:0] b[35:32] - -
- - - - - 0x00021c1d - - - b[31:0] b[31:0] - -
- - - - tx_stats_etherstats_undersizepkts 0x00021c1e 1 RO uint64 b[3:0] b[35:32] - -
- - - - - 0x00021c1f - - - b[31:0] b[31:0] - -
- - - - tx_stats_etherstats_oversizepkts 0x00021c20 1 RO uint64 b[3:0] b[35:32] - -
- - - - - 0x00021c21 - - - b[31:0] b[31:0] - -
- - - - tx_stats_etherstats_pkts64octets 0x00021c22 1 RO uint64 b[3:0] b[35:32] - -
- - - - - 0x00021c23 - - - b[31:0] b[31:0] - -
- - - - tx_stats_etherstats_pkts65to127octets 0x00021c24 1 RO uint64 b[3:0] b[35:32] - -
- - - - - 0x00021c25 - - - b[31:0] b[31:0] - -
- - - - tx_stats_etherstats_pkts128to255octets 0x00021c26 1 RO uint64 b[3:0] b[35:32] - -
- - - - - 0x00021c27 - - - b[31:0] b[31:0] - -
- - - - tx_stats_etherstats_pkts256to511octets 0x00021c28 1 RO uint64 b[3:0] b[35:32] - -
- - - - - 0x00021c29 - - - b[31:0] b[31:0] - -
- - - - tx_stats_etherstats_pkts512to1023octets 0x00021c2a 1 RO uint64 b[3:0] b[35:32] - -
- - - - - 0x00021c2b - - - b[31:0] b[31:0] - -
- - - - tx_stats_etherstat_pkts1024to1518octets 0x00021c2c 1 RO uint64 b[3:0] b[35:32] - -
- - - - - 0x00021c2d - - - b[31:0] b[31:0] - -
- - - - tx_stats_etherstats_pkts1519toxoctets 0x00021c2e 1 RO uint64 b[3:0] b[35:32] - -
- - - - - 0x00021c2f - - - b[31:0] b[31:0] - -
- - - - tx_stats_etherstats_fragments 0x00021c30 1 RO uint64 b[3:0] b[35:32] - -
- - - - - 0x00021c31 - - - b[31:0] b[31:0] - -
- - - - tx_stats_etherstats_jabbers 0x00021c32 1 RO uint64 b[3:0] b[35:32] - -
- - - - - 0x00021c33 - - - b[31:0] b[31:0] - -
- - - - tx_stats_etherstatscrcerr 0x00021c34 1 RO uint64 b[3:0] b[35:32] - -
- - - - - 0x00021c35 - - - b[31:0] b[31:0] - -
- - - - tx_stats_unicastmacctrlframes 0x00021c36 1 RO uint64 b[3:0] b[35:32] - -
- - - - - 0x00021c37 - - - b[31:0] b[31:0] - -
- - - - tx_stats_multicastmac_ctrlframes 0x00021c38 1 RO uint64 b[3:0] b[35:32] - -
- - - - - 0x00021c39 - - - b[31:0] b[31:0] - -
- - - - tx_stats_broadcastmac_ctrlframes 0x00021c3a 1 RO uint64 b[3:0] b[35:32] - -
- - - - - 0x00021c3b - - - b[31:0] b[31:0] - -
- - - - tx_stats_pfcmacctrlframes 0x00021c3c 1 RO uint64 b[3:0] b[35:32] - -
- - - - - 0x00021c3d - - - b[31:0] b[31:0] - -
REG_TR_10GBE_ETH10G 1 3 REG tx_snk_out_xon 0x00043198 1 RO uint32 b[0:0] - - 1
- - - - xgmii_tx_ready 0x00043198 1 RO uint32 b[1:1] - - -
- - - - xgmii_link_status 0x00043198 1 RO uint32 b[3:2] - - -
RAM_SS_SS_WIDE 2 6 RAM data 0x00030000 976 RW uint32 b[9:0] - 8192 1024
RAM_BF_WEIGHTS 2 12 RAM data 0x00028000 976 RW cint16_ir b[31:0] - 16384 1024
REG_BF_SCALE 2 1 REG scale 0x000431e0 1 RW uint32 b[15:0] - 2 2
- - - - unused 0x000431e1 1 RW uint32 b[31:0] - - -
REG_HDR_DAT 2 1 REG bsn 0x00043000 1 RW uint64 b[31:0] b[31:0] 64 64
- - - - - 0x00043001 - - - b[31:0] b[63:32] - -
- - - - sdp_block_period 0x00043002 1 RW uint32 b[15:0] - - -
- - - - sdp_nof_beamlets_per_block 0x00043003 1 RW uint32 b[15:0] - - -
- - - - sdp_nof_blocks_per_packet 0x00043004 1 RW uint32 b[7:0] - - -
- - - - sdp_beamlet_index 0x00043005 1 RW uint32 b[15:0] - - -
- - - - sdp_beamlet_scale 0x00043006 1 RW uint32 b[15:0] - - -
- - - - sdp_reserved 0x00043007 1 RW uint64 b[31:0] b[31:0] - -
- - - - - 0x00043008 - - - b[7:0] b[39:32] - -
- - - - sdp_source_info_gn_index 0x00043009 1 RW uint32 b[4:0] - - -
- - - - sdp_source_info_beamlet_width 0x0004300a 1 RW uint32 b[7:5] - - -
- - - - sdp_source_info_repositioning_flag 0x0004300b 1 RW uint32 b[9:9] - - -
- - - - sdp_source_info_payload_error 0x0004300c 1 RW uint32 b[10:10] - - -
- - - - sdp_source_info_fsub_type 0x0004300d 1 RW uint32 b[11:11] - - -
- - - - sdp_source_info_f_adc 0x0004300e 1 RW uint32 b[12:12] - - -
- - - - sdp_source_info_nyquist_zone_index 0x0004300f 1 RW uint32 b[14:13] - - -
- - - - sdp_source_info_antenna_band_index 0x00043010 1 RW uint32 b[15:15] - - -
- - - - sdp_station_id 0x00043011 1 RW uint32 b[15:0] - - -
- - - - sdp_observation_id 0x00043012 1 RW uint32 b[31:0] - - -
- - - - sdp_version_id 0x00043013 1 RO uint32 b[7:0] - - -
- - - - sdp_marker 0x00043014 1 RO uint32 b[7:0] - - -
- - - - udp_checksum 0x00043015 1 RW uint32 b[15:0] - - -
- - - - udp_length 0x00043016 1 RW uint32 b[15:0] - - -
- - - - udp_destination_port 0x00043017 1 RW uint32 b[15:0] - - -
- - - - udp_source_port 0x00043018 1 RW uint32 b[15:0] - - -
- - - - ip_destination_address 0x00043019 1 RW uint32 b[31:0] - - -
- - - - ip_source_address 0x0004301a 1 RW uint32 b[31:0] - - -
- - - - ip_header_checksum 0x0004301b 1 RW uint32 b[15:0] - - -
- - - - ip_protocol 0x0004301c 1 RW uint32 b[7:0] - - -
- - - - ip_time_to_live 0x0004301d 1 RW uint32 b[7:0] - - -
- - - - ip_fragment_offset 0x0004301e 1 RW uint32 b[12:0] - - -
- - - - ip_flags 0x0004301f 1 RW uint32 b[2:0] - - -
- - - - ip_identification 0x00043020 1 RW uint32 b[15:0] - - -
- - - - ip_total_length 0x00043021 1 RW uint32 b[15:0] - - -
- - - - ip_services 0x00043022 1 RW uint32 b[7:0] - - -
- - - - ip_header_length 0x00043023 1 RW uint32 b[3:0] - - -
- - - - ip_version 0x00043024 1 RW uint32 b[3:0] - - -
- - - - eth_type 0x00043025 1 RO uint32 b[15:0] - - -
- - - - eth_source_mac 0x00043026 1 RO uint64 b[31:0] b[31:0] - -
- - - - - 0x00043027 - - - b[15:0] b[47:32] - -
- - - - eth_destination_mac 0x00043028 1 RW uint64 b[31:0] b[31:0] - -
- - - - - 0x00043029 - - - b[15:0] b[47:32] - -
REG_DP_XONOFF 2 1 REG enable_stream 0x000431dc 1 RW uint32 b[0:0] - 2 2
RAM_ST_BST 2 1 RAM data 0x00001000 976 RW uint64 b[31:0] b[31:0] 2048 2048 RAM_ST_BST 2 1 RAM data 0x00001000 976 RW uint64 b[31:0] b[31:0] 2048 2048
- - - - - 0x00001001 - - - b[21:0] b[53:32] - - - - - - - 0x00001001 - - - b[21:0] b[53:32] - -
REG_STAT_ENABLE_BST 2 1 REG enable 0x00000de0 1 RW uint32 b[0:0] - 2 2 REG_STAT_ENABLE_BST 2 1 REG enable 0x000431d8 1 RW uint32 b[0:0] - 2 2
REG_STAT_HDR_DAT_BST 2 1 REG bsn 0x00000080 1 RW uint64 b[31:0] b[31:0] 64 64 REG_STAT_HDR_DAT_BST 2 1 REG bsn 0x00000d80 1 RW uint64 b[31:0] b[31:0] 64 64
- - - - - 0x00000081 - - - b[31:0] b[63:32] - - - - - - - 0x00000d81 - - - b[31:0] b[63:32] - -
- - - - block_period 0x00000082 1 RW uint32 b[15:0] - - - - - - - block_period 0x00000d82 1 RW uint32 b[15:0] - - -
- - - - nof_statistics_per_packet 0x00000083 1 RW uint32 b[15:0] - - - - - - - nof_statistics_per_packet 0x00000d83 1 RW uint32 b[15:0] - - -
- - - - nof_bytes_per_statistic 0x00000084 1 RW uint32 b[7:0] - - - - - - - nof_bytes_per_statistic 0x00000d84 1 RW uint32 b[7:0] - - -
- - - - nof_signal_inputs 0x00000085 1 RW uint32 b[7:0] - - - - - - - nof_signal_inputs 0x00000d85 1 RW uint32 b[7:0] - - -
- - - - sdp_data_id 0x00000086 1 RW uint32 b[31:0] - - - - - - - sdp_data_id 0x00000d86 1 RW uint32 b[31:0] - - -
- - - - sdp_data_id_bst_beamlet_index 0x00000086 1 RW uint32 b[15:0] - - - - - - - sdp_data_id_bst_beamlet_index 0x00000d86 1 RW uint32 b[15:0] - - -
- - - - sdp_data_id_bst_reserved 0x00000086 1 RW uint32 b[31:16] - - - - - - - sdp_data_id_bst_reserved 0x00000d86 1 RW uint32 b[31:16] - - -
- - - - sdp_integration_interval 0x00000087 1 RW uint32 b[23:0] - - - - - - - sdp_integration_interval 0x00000d87 1 RW uint32 b[23:0] - - -
- - - - sdp_reserved 0x00000088 1 RW uint32 b[7:0] - - - - - - - sdp_reserved 0x00000d88 1 RW uint32 b[7:0] - - -
- - - - sdp_source_info_gn_index 0x00000089 1 RW uint32 b[4:0] - - - - - - - sdp_source_info_gn_index 0x00000d89 1 RW uint32 b[4:0] - - -
- - - - sdp_source_info_reserved 0x0000008a 1 RW uint32 b[7:5] - - - - - - - sdp_source_info_reserved 0x00000d8a 1 RW uint32 b[7:5] - - -
- - - - sdp_source_info_subband_calibrated_flag 0x0000008b 1 RW uint32 b[8:8] - - - - - - - sdp_source_info_subband_calibrated_flag 0x00000d8b 1 RW uint32 b[8:8] - - -
- - - - sdp_source_info_beam_repositioning_flag 0x0000008c 1 RW uint32 b[9:9] - - - - - - - sdp_source_info_beam_repositioning_flag 0x00000d8c 1 RW uint32 b[9:9] - - -
- - - - sdp_source_info_payload_error 0x0000008d 1 RW uint32 b[10:10] - - - - - - - sdp_source_info_payload_error 0x00000d8d 1 RW uint32 b[10:10] - - -
- - - - sdp_source_info_fsub_type 0x0000008e 1 RW uint32 b[11:11] - - - - - - - sdp_source_info_fsub_type 0x00000d8e 1 RW uint32 b[11:11] - - -
- - - - sdp_source_info_f_adc 0x0000008f 1 RW uint32 b[12:12] - - - - - - - sdp_source_info_f_adc 0x00000d8f 1 RW uint32 b[12:12] - - -
- - - - sdp_source_info_nyquist_zone_index 0x00000090 1 RW uint32 b[14:13] - - - - - - - sdp_source_info_nyquist_zone_index 0x00000d90 1 RW uint32 b[14:13] - - -
- - - - sdp_source_info_antenna_band_index 0x00000091 1 RW uint32 b[15:15] - - - - - - - sdp_source_info_antenna_band_index 0x00000d91 1 RW uint32 b[15:15] - - -
- - - - sdp_station_id 0x00000092 1 RW uint32 b[15:0] - - - - - - - sdp_station_id 0x00000d92 1 RW uint32 b[15:0] - - -
- - - - sdp_observation_id 0x00000093 1 RW uint32 b[31:0] - - - - - - - sdp_observation_id 0x00000d93 1 RW uint32 b[31:0] - - -
- - - - sdp_version_id 0x00000094 1 RO uint32 b[7:0] - - - - - - - sdp_version_id 0x00000d94 1 RO uint32 b[7:0] - - -
- - - - sdp_marker 0x00000095 1 RO uint32 b[7:0] - - - - - - - sdp_marker 0x00000d95 1 RO uint32 b[7:0] - - -
- - - - udp_checksum 0x00000096 1 RW uint32 b[15:0] - - - - - - - udp_checksum 0x00000d96 1 RW uint32 b[15:0] - - -
- - - - udp_length 0x00000097 1 RW uint32 b[15:0] - - - - - - - udp_length 0x00000d97 1 RW uint32 b[15:0] - - -
- - - - udp_destination_port 0x00000098 1 RW uint32 b[15:0] - - - - - - - udp_destination_port 0x00000d98 1 RW uint32 b[15:0] - - -
- - - - udp_source_port 0x00000099 1 RW uint32 b[15:0] - - - - - - - udp_source_port 0x00000d99 1 RW uint32 b[15:0] - - -
- - - - ip_destination_address 0x0000009a 1 RW uint32 b[31:0] - - - - - - - ip_destination_address 0x00000d9a 1 RW uint32 b[31:0] - - -
- - - - ip_source_address 0x0000009b 1 RW uint32 b[31:0] - - - - - - - ip_source_address 0x00000d9b 1 RW uint32 b[31:0] - - -
- - - - ip_header_checksum 0x0000009c 1 RW uint32 b[15:0] - - - - - - - ip_header_checksum 0x00000d9c 1 RW uint32 b[15:0] - - -
- - - - ip_protocol 0x0000009d 1 RW uint32 b[7:0] - - - - - - - ip_protocol 0x00000d9d 1 RW uint32 b[7:0] - - -
- - - - ip_time_to_live 0x0000009e 1 RW uint32 b[7:0] - - - - - - - ip_time_to_live 0x00000d9e 1 RW uint32 b[7:0] - - -
- - - - ip_fragment_offset 0x0000009f 1 RW uint32 b[12:0] - - - - - - - ip_fragment_offset 0x00000d9f 1 RW uint32 b[12:0] - - -
- - - - ip_flags 0x000000a0 1 RW uint32 b[2:0] - - - - - - - ip_flags 0x00000da0 1 RW uint32 b[2:0] - - -
- - - - ip_identification 0x000000a1 1 RW uint32 b[15:0] - - - - - - - ip_identification 0x00000da1 1 RW uint32 b[15:0] - - -
- - - - ip_total_length 0x000000a2 1 RW uint32 b[15:0] - - - - - - - ip_total_length 0x00000da2 1 RW uint32 b[15:0] - - -
- - - - ip_services 0x000000a3 1 RW uint32 b[7:0] - - - - - - - ip_services 0x00000da3 1 RW uint32 b[7:0] - - -
- - - - ip_header_length 0x000000a4 1 RW uint32 b[3:0] - - - - - - - ip_header_length 0x00000da4 1 RW uint32 b[3:0] - - -
- - - - ip_version 0x000000a5 1 RW uint32 b[3:0] - - - - - - - ip_version 0x00000da5 1 RW uint32 b[3:0] - - -
- - - - eth_type 0x000000a6 1 RO uint32 b[15:0] - - - - - - - eth_type 0x00000da6 1 RO uint32 b[15:0] - - -
- - - - eth_source_mac 0x000000a7 1 RO uint64 b[31:0] b[31:0] - - - - - - eth_source_mac 0x00000da7 1 RO uint64 b[31:0] b[31:0] - -
- - - - - 0x000000a8 - - - b[15:0] b[47:32] - - - - - - - 0x00000da8 - - - b[15:0] b[47:32] - -
- - - - eth_destination_mac 0x000000a9 1 RW uint64 b[31:0] b[31:0] - - - - - - eth_destination_mac 0x00000da9 1 RW uint64 b[31:0] b[31:0] - -
- - - - - 0x000000aa - - - b[15:0] b[47:32] - - - - - - - 0x00000daa - - - b[15:0] b[47:32] - -
- - - - word_align 0x000000ab 1 RW uint32 b[15:0] - - - - - - - word_align 0x00000dab 1 RW uint32 b[15:0] - - -
REG_BSN_MONITOR_V2_BST_OFFLOAD 2 1 REG xon_stable 0x00043120 1 RO uint32 b[0:0] - 1 8
- - - - ready_stable 0x00043120 1 RO uint32 b[1:1] - - -
- - - - sync_timeout 0x00043120 1 RO uint32 b[2:2] - - -
- - - - bsn_at_sync 0x00043121 1 RO uint64 b[31:0] b[31:0] - -
- - - - - 0x00043122 - - - b[31:0] b[63:32] - -
- - - - nof_sop 0x00043123 1 RO uint32 b[31:0] - - -
- - - - nof_valid 0x00043124 1 RO uint32 b[31:0] - - -
- - - - nof_err 0x00043125 1 RO uint32 b[31:0] - - -
- - - - latency 0x00043128 1 RO uint32 b[31:0] - - -
REG_BSN_MONITOR_V2_BEAMLET_OUTPUT 2 1 REG xon_stable 0x00000c10 1 RO uint32 b[0:0] - 1 8
- - - - ready_stable 0x00000c10 1 RO uint32 b[1:1] - - -
- - - - sync_timeout 0x00000c10 1 RO uint32 b[2:2] - - -
- - - - bsn_at_sync 0x00000c11 1 RO uint64 b[31:0] b[31:0] - -
- - - - - 0x00000c12 - - - b[31:0] b[63:32] - -
- - - - nof_sop 0x00000c13 1 RO uint32 b[31:0] - - -
- - - - nof_valid 0x00000c14 1 RO uint32 b[31:0] - - -
- - - - nof_err 0x00000c15 1 RO uint32 b[31:0] - - -
- - - - latency 0x00000c18 1 RO uint32 b[31:0] - - -
REG_NW_10GBE_MAC 1 1 REG rx_transfer_control 0x00006000 1 RW uint32 b[0:0] - - - REG_NW_10GBE_MAC 1 1 REG rx_transfer_control 0x00006000 1 RW uint32 b[0:0] - - -
- - - - rx_transfer_status 0x00006001 1 RO uint32 b[0:0] - - - - - - - rx_transfer_status 0x00006001 1 RO uint32 b[0:0] - - -
- - - - tx_transfer_control 0x00006002 1 RW uint32 b[0:0] - - - - - - - tx_transfer_control 0x00006002 1 RW uint32 b[0:0] - - -
...@@ -535,6 +808,6 @@ number_of_columns = 13 ...@@ -535,6 +808,6 @@ number_of_columns = 13
- - - - - 0x00007c3b - - - b[31:0] b[31:0] - - - - - - - 0x00007c3b - - - b[31:0] b[31:0] - -
- - - - tx_stats_pfcmacctrlframes 0x00007c3c 1 RO uint64 b[3:0] b[35:32] - - - - - - tx_stats_pfcmacctrlframes 0x00007c3c 1 RO uint64 b[3:0] b[35:32] - -
- - - - - 0x00007c3d - - - b[31:0] b[31:0] - - - - - - - 0x00007c3d - - - b[31:0] b[31:0] - -
REG_NW_10GBE_ETH10G 1 1 REG tx_snk_out_xon 0x00000df6 1 RO uint32 b[0:0] - - - REG_NW_10GBE_ETH10G 1 1 REG tx_snk_out_xon 0x000431f0 1 RO uint32 b[0:0] - - -
- - - - xgmii_tx_ready 0x00000df6 1 RO uint32 b[1:1] - - - - - - - xgmii_tx_ready 0x000431f0 1 RO uint32 b[1:1] - - -
- - - - xgmii_link_status 0x00000df6 1 RO uint32 b[3:2] - - - - - - - xgmii_link_status 0x000431f0 1 RO uint32 b[3:2] - - -
\ No newline at end of file \ No newline at end of file
...@@ -243,7 +243,7 @@ BEGIN ...@@ -243,7 +243,7 @@ BEGIN
GENERIC MAP ( GENERIC MAP (
g_nof_streams => 1, g_nof_streams => 1,
g_cross_clock_domain => TRUE, g_cross_clock_domain => TRUE,
g_sync_timeout => c_sdp_N_clk_per_sync, g_sync_timeout => c_sdp_N_clk_sync_timeout,
g_bsn_w => c_dp_stream_bsn_w, g_bsn_w => c_dp_stream_bsn_w,
g_error_bi => 0, g_error_bi => 0,
g_cnt_sop_w => c_word_w, g_cnt_sop_w => c_word_w,
......
...@@ -508,7 +508,7 @@ BEGIN ...@@ -508,7 +508,7 @@ BEGIN
GENERIC MAP ( GENERIC MAP (
g_nof_streams => 1, g_nof_streams => 1,
g_cross_clock_domain => TRUE, g_cross_clock_domain => TRUE,
g_sync_timeout => c_sdp_N_clk_per_sync, g_sync_timeout => c_sdp_N_clk_sync_timeout,
g_bsn_w => c_dp_stream_bsn_w, g_bsn_w => c_dp_stream_bsn_w,
g_error_bi => 0, g_error_bi => 0,
g_cnt_sop_w => c_word_w, g_cnt_sop_w => c_word_w,
......
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