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fpga_map.cpp 42.99 KiB
/* *************************************************************************
* Copyright 2020
* ASTRON (Netherlands Institute for Radio Astronomy) <http://www.astron.nl/>
* P.O.Box 2, 7990 AA Dwingeloo, The Netherlands
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
* *********************************************************************** */
/* *************************************************************************
* Author:
* . Leon Hiemstra
* . Pieter Donker
* Purpose:
* . opc-ua to ucp translator
* Description:
* . class with fpga registers available for opc-ua server
* *********************************************************************** */
// You need to compile with _REENTRANT defined since this uses threads
#ifndef _REENTRANT
#define _REENTRANT 1
#endif
#include <cstdio>
#include <stdexcept>
#include <iostream>
#include <sstream>
#include <exception>
#include <unistd.h>
#include <thread>
#include <chrono>
#include "sdptr.h"
#include "constants.h"
#include "fpga_map.h"
#include "tools/loguru.h"
#include "periph/fpga.h"
using namespace std;
// Everything addressed with FPGA_...
extern int debug;
extern Serverdat SD;
FpgaMap::FpgaMap()
{
nFilterbanks = (uint32_t)SD.n_filterbanks;
nBeamsets = (uint32_t)SD.n_beamsets;
nFpgas = (uint32_t)SD.n_fpgas;
pointMap = new CPointMap();
// Add all opc-ua points:
// opc-ua name, intern cmdID, n_nodes, n_data, permision, data_format
pointMap->add_register("FPGA_ucp_block_comm_R", UCP_BLOCK, nFpgas, 1, "RO", REG_FORMAT_BOOLEAN);
pointMap->add_register("FPGA_ucp_block_comm_RW", UCP_BLOCK, nFpgas, 1, "RW", REG_FORMAT_BOOLEAN);
pointMap->add_register("FPGA_ucp_status_R", UCP_STATUS, nFpgas, 6, "RO", REG_FORMAT_INT64);
pointMap->add_register("FPGA_ucp_status_reset_WO", UCP_STATUS, nFpgas, 1, "WO", REG_FORMAT_BOOLEAN);