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David Brouwer
authored
Create new IP with the similar configuration as the ip_arria10_es2g_ram_crwk_crw.ip and ip_arria10_e2sg_ram_cr_cw.ip, because the use of two read/write ports is not possible by the Agilex. The use of a dual clock is not possible with true dual port, but with one read and one write port it is possible. The version for the arria10_e2sg is 20.0.0 and for the agi027_xxxx is 20.4.0. The ram_name crk_cw is created in stead of crwk_crw.
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