diff --git a/libraries/technology/ip_stratixiv/flash/hdllib.cfg b/libraries/technology/ip_stratixiv/flash/hdllib.cfg
index d19b4b4e1a9705e39963ab4a3ddc7a10016d9922..110bffb7f89dd7c351de12ebf8e89055034fe7c4 100644
--- a/libraries/technology/ip_stratixiv/flash/hdllib.cfg
+++ b/libraries/technology/ip_stratixiv/flash/hdllib.cfg
@@ -10,3 +10,6 @@ synth_files =
     ip_stratixiv_remote_update.vhd
     
 test_bench_files =
+
+modelsim_copy_files = 
+    $UNB/Firmware/modules/Numonyx/NU_M25P128_V10/sim/memory_file .
diff --git a/libraries/technology/ip_stratixiv/flash/ip_stratixiv_asmi_parallel.vhd b/libraries/technology/ip_stratixiv/flash/ip_stratixiv_asmi_parallel.vhd
index e91cad5402b94003f3093ff3d3af513413086975..d1e4e63ac7c6360ed46ba0cff4cab3129fd4b482 100644
--- a/libraries/technology/ip_stratixiv/flash/ip_stratixiv_asmi_parallel.vhd
+++ b/libraries/technology/ip_stratixiv/flash/ip_stratixiv_asmi_parallel.vhd
@@ -902,7 +902,7 @@
   -- synthesis translate_off
   u_M25P128: ENTITY numonyx_m25p128_lib.M25P128
   GENERIC MAP(
-    MemoryFileName => "../../../../../UniBoard/trunk/Firmware/modules/Numonyx/NU_M25P128_V10/sim/memory_file",
+    MemoryFileName => "../ip_stratixiv_flash/memory_file",
     TimingCheckOn  => FALSE
   )
   PORT MAP (