diff --git a/libraries/base/common/src/vhdl/common_mem_pkg.vhd b/libraries/base/common/src/vhdl/common_mem_pkg.vhd
index 27fcd79466c332fc6ece560e5c5cc34b616407ca..dd26500d83613818ffad93645f699eaf5a229ff3 100644
--- a/libraries/base/common/src/vhdl/common_mem_pkg.vhd
+++ b/libraries/base/common/src/vhdl/common_mem_pkg.vhd
@@ -109,7 +109,27 @@ PACKAGE common_mem_pkg IS
   FUNCTION RESIZE_MEM_UDATA(  vec : STD_LOGIC_VECTOR) RETURN STD_LOGIC_VECTOR;  -- unsigned
   FUNCTION RESIZE_MEM_SDATA(  vec : STD_LOGIC_VECTOR) RETURN STD_LOGIC_VECTOR;  -- sign extended
   FUNCTION RESIZE_MEM_XDATA(  vec : STD_LOGIC_VECTOR) RETURN STD_LOGIC_VECTOR;  -- set unused MSBits to 'X'
-  
+
+  ------------------------------------------------------------------------------
+  -- Procedures to access MM bus
+  -- . no mm_clk, combinatoral inputs only, to allow use in a state machine
+  -- . similar proc_mem_mm_bus_*() procs in tb_common_mem_pkg.vhd do have
+  --   mm_clk inputs
+  -- . if mm_copi.waitrequest is used, then issue the MM access and externaly
+  --   check and wait for mm_copi.waitrequest = '0' before removing the MM
+  --   access.
+  ------------------------------------------------------------------------------
+  PROCEDURE proc_mem_bus_wr(CONSTANT wr_addr : IN  NATURAL;
+                            CONSTANT wr_data : IN  INTEGER;
+                            SIGNAL   mm_copi : OUT t_mem_copi);
+
+  PROCEDURE proc_mem_bus_wr(CONSTANT wr_addr : IN  NATURAL;
+                            CONSTANT wr_data : IN  STD_LOGIC_VECTOR;
+                            SIGNAL   mm_copi : OUT t_mem_copi);
+
+  PROCEDURE proc_mem_bus_rd(CONSTANT wr_addr : IN  NATURAL;
+                            SIGNAL   mm_copi : OUT t_mem_copi);
+
   ------------------------------------------------------------------------------
   -- Burst memory access (for DDR access interface)
   ------------------------------------------------------------------------------
@@ -279,7 +299,32 @@ PACKAGE BODY common_mem_pkg IS
     v_vec(vec'LENGTH-1 DOWNTO 0) := vec;
     RETURN v_vec;
   END RESIZE_MEM_XDATA;
-  
+
+  -- Procedures to access MM bus
+  PROCEDURE proc_mem_bus_wr(CONSTANT wr_addr : IN  NATURAL;
+                            CONSTANT wr_data : IN  INTEGER;
+                            SIGNAL   mm_copi : OUT t_mem_copi) IS
+  BEGIN
+    mm_copi.address <= TO_MEM_ADDRESS(wr_addr);
+    mm_copi.wrdata  <= TO_MEM_DATA(wr_data);
+    mm_copi.wr      <= '1';
+  END proc_mem_bus_wr;
+
+  PROCEDURE proc_mem_bus_wr(CONSTANT wr_addr : IN  NATURAL;
+                            CONSTANT wr_data : IN  STD_LOGIC_VECTOR;
+                            SIGNAL   mm_copi : OUT t_mem_copi) IS
+  BEGIN
+    mm_copi.address <= TO_MEM_ADDRESS(wr_addr);
+    mm_copi.wrdata  <= RESIZE_MEM_DATA(wr_data);
+    mm_copi.wr      <= '1';
+  END proc_mem_bus_wr;
+
+  PROCEDURE proc_mem_bus_rd(CONSTANT wr_addr : IN  NATURAL;
+                            SIGNAL   mm_copi : OUT t_mem_copi) IS
+  BEGIN
+    mm_copi.address <= TO_MEM_ADDRESS(wr_addr);
+    mm_copi.rd      <= '1';
+  END proc_mem_bus_rd;
 
   -- Resize functions to fit an integer or an SLV in the corresponding t_mem_miso or t_mem_mosi field width
   FUNCTION TO_MEM_CTLR_ADDRESS(n : INTEGER) RETURN STD_LOGIC_VECTOR IS