From f8289ae00dc0560a300faf8a353521cbc78b13ec Mon Sep 17 00:00:00 2001
From: Erik Kooistra <kooistra@astron.nl>
Date: Wed, 6 Feb 2019 10:54:21 +0000
Subject: [PATCH] Use RESIZE_DP_BSN(init_bsn) to avoid slv to int conversion
 warnings on undefined MSbits > g_bsn_w, to prepare for using c_dp_sosi_rst
 with dont care info and data fields.

---
 libraries/base/dp/src/vhdl/dp_bsn_source.vhd | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/libraries/base/dp/src/vhdl/dp_bsn_source.vhd b/libraries/base/dp/src/vhdl/dp_bsn_source.vhd
index 62e8cfdfbc..385eb4f19b 100644
--- a/libraries/base/dp/src/vhdl/dp_bsn_source.vhd
+++ b/libraries/base/dp/src/vhdl/dp_bsn_source.vhd
@@ -79,7 +79,7 @@ ARCHITECTURE rtl OF dp_bsn_source IS
   SIGNAL block_cnt          : STD_LOGIC_VECTOR(g_bsn_w-1 DOWNTO 0);
   SIGNAL nxt_block_cnt      : STD_LOGIC_VECTOR(g_bsn_w-1 DOWNTO 0);
 
-  SIGNAL i_src_out          : t_dp_sosi;
+  SIGNAL i_src_out          : t_dp_sosi := c_dp_sosi_init;
   SIGNAL nxt_src_out        : t_dp_sosi;
  
   SIGNAL nxt_dp_on_status   : STD_LOGIC;
@@ -141,7 +141,7 @@ BEGIN
       WHEN s_dp_off =>
         nxt_dp_on_status <= '0';
         nxt_block_cnt <=  (OTHERS=>'0');
-        nxt_src_out.bsn(g_bsn_w-1 DOWNTO 0) <= init_bsn;
+        nxt_src_out.bsn <= RESIZE_DP_BSN(init_bsn);
         IF dp_on = '1' THEN 
           IF dp_on_pps = '1' THEN
             IF pps = '1' THEN
-- 
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