diff --git a/applications/lofar2/designs/lofar2_unb2b_sdp_station/lofar2_unb2b_sdp_station.fpga.yaml b/applications/lofar2/designs/lofar2_unb2b_sdp_station/lofar2_unb2b_sdp_station.fpga.yaml
index 87a56501014ef31f56ea825959ad286ac766af87..049d49e757afc23cc41cd45851f0291976895032 100644
--- a/applications/lofar2/designs/lofar2_unb2b_sdp_station/lofar2_unb2b_sdp_station.fpga.yaml
+++ b/applications/lofar2/designs/lofar2_unb2b_sdp_station/lofar2_unb2b_sdp_station.fpga.yaml
@@ -199,6 +199,8 @@ peripherals:
#############################################################################
- peripheral_name: si/si
+ parameter_overrides:
+ - { name: g_nof_streams, value: c_S_pn }
mm_port_names:
- REG_SI
diff --git a/applications/lofar2/designs/lofar2_unb2b_sdp_station/lofar2_unb2b_sdp_station.mmap.gold b/applications/lofar2/designs/lofar2_unb2b_sdp_station/lofar2_unb2b_sdp_station.mmap.gold
index 8f34189c14fb832d6b2bb80947a5c62548138a71..c5ba7e8ef763f59d004eb353dc4bbaf7c3f69106 100644
--- a/applications/lofar2/designs/lofar2_unb2b_sdp_station/lofar2_unb2b_sdp_station.mmap.gold
+++ b/applications/lofar2/designs/lofar2_unb2b_sdp_station/lofar2_unb2b_sdp_station.mmap.gold
@@ -183,7 +183,7 @@ number_of_columns = 13
REG_DIAG_DATA_BUFFER_BSN 1 12 REG sync_cnt 0x000b0000 1 RO uint32 b[31:0] - - 2
- - - - word_cnt 0x000b0001 1 RO uint32 b[31:0] - - -
RAM_DIAG_DATA_BUFFER_BSN 1 12 RAM data 0x000b4000 1024 RW uint32 b[31:0] b[15:0] - 1024
- REG_SI 1 1 REG enable 0x000b8000 1 RW uint32 b[0:0] - - -
+ REG_SI 1 1 REG enable 0x000b8000 1 RW uint32 b[11:0] - - -
RAM_FIL_COEFS 2 16 RAM data 0x000c0000 1024 RW uint32 b[15:0] - 16384 1024
RAM_EQUALIZER_GAINS 1 12 RAM data 0x000c8000 1024 RW cint16_ir b[31:0] - - 1024
REG_DP_SELECTOR 1 1 REG input_select 0x000d0000 1 RW uint32 b[0:0] - - -
diff --git a/applications/lofar2/designs/lofar2_unb2b_sdp_station/lofar2_unb2b_sdp_station.mmap.qsys.gold b/applications/lofar2/designs/lofar2_unb2b_sdp_station/lofar2_unb2b_sdp_station.mmap.qsys.gold
index 1b53885aa12434da53bd7505e5b28defe6d2632c..53598b995cca9269d8dc866fc316918f6631aba0 100644
--- a/applications/lofar2/designs/lofar2_unb2b_sdp_station/lofar2_unb2b_sdp_station.mmap.qsys.gold
+++ b/applications/lofar2/designs/lofar2_unb2b_sdp_station/lofar2_unb2b_sdp_station.mmap.qsys.gold
@@ -183,7 +183,7 @@ number_of_columns = 13
REG_DIAG_DATA_BUFFER_BSN 1 12 REG sync_cnt 0x0004d1a0 1 RO uint32 b[31:0] - - 2
- - - - word_cnt 0x0004d1a1 1 RO uint32 b[31:0] - - -
RAM_DIAG_DATA_BUFFER_BSN 1 12 RAM data 0x00200000 1024 RW uint32 b[31:0] b[15:0] - 1024
- REG_SI 1 1 REG enable 0x0004d2fa 1 RW uint32 b[0:0] - - -
+ REG_SI 1 1 REG enable 0x0004d2fa 1 RW uint32 b[11:0] - - -
RAM_FIL_COEFS 2 16 RAM data 0x00030000 1024 RW uint32 b[15:0] - 16384 1024
RAM_EQUALIZER_GAINS 1 12 RAM data 0x00040000 1024 RW cint16_ir b[31:0] - - 1024
REG_DP_SELECTOR 1 1 REG input_select 0x0004d2f6 1 RW uint32 b[0:0] - - -
diff --git a/applications/lofar2/designs/lofar2_unb2c_sdp_station/lofar2_unb2c_sdp_station.fpga.yaml b/applications/lofar2/designs/lofar2_unb2c_sdp_station/lofar2_unb2c_sdp_station.fpga.yaml
index d82446632b6a9a0ca53ac9bb6d3f8fe2a71474b3..b350714e1ecfbd8ff5c857721530b21153f03412 100644
--- a/applications/lofar2/designs/lofar2_unb2c_sdp_station/lofar2_unb2c_sdp_station.fpga.yaml
+++ b/applications/lofar2/designs/lofar2_unb2c_sdp_station/lofar2_unb2c_sdp_station.fpga.yaml
@@ -199,6 +199,8 @@ peripherals:
#############################################################################
- peripheral_name: si/si
+ parameter_overrides:
+ - { name: g_nof_streams, value: c_S_pn }
mm_port_names:
- REG_SI
diff --git a/libraries/dsp/si/si.peripheral.yaml b/libraries/dsp/si/si.peripheral.yaml
index 206534545d065f54e4b155f8ba1086225391e6c0..f32856fe37cc44bcb2a007011a7e9d070e84bbd8 100644
--- a/libraries/dsp/si/si.peripheral.yaml
+++ b/libraries/dsp/si/si.peripheral.yaml
@@ -8,6 +8,9 @@ hdl_library_description: "Spectral Inversion (SI)"
peripherals:
- peripheral_name: si # pi_si.py
peripheral_description: "Spectral Inversion control."
+ parameters:
+ # Parameters of si_arr.vhd
+ - { name: g_nof_streams, value: 1 }
mm_ports:
# MM port for si_arr.vhd
- mm_port_name: REG_SI
@@ -15,6 +18,9 @@ peripherals:
mm_port_description: "In the even Nyquist zones the sampled spectrum gets flipped in frequency. This flip can be compensated for by enabling spectral inversion (SI)."
fields:
- - field_name: enable
- field_description: "When 0 then pass on the array of input signals, when 1 then enable spectral inversion for all the input signals."
+ field_description: |
+ "Set spectral inversion per input signal in [g_nof_streams-1:0].
+ When enable[i] = 0 then pass on input signal i, when enable[i] = 1
+ then enable spectral inversion for the input signal i."
address_offset: 0x0
- mm_width: 1
+ mm_width: g_nof_streams
diff --git a/libraries/dsp/si/src/vhdl/si_arr.vhd b/libraries/dsp/si/src/vhdl/si_arr.vhd
index faa86d371483f52f1a93f3903abc1393465f46e1..cb6a7a9339e7a6dc7763f3219843428ec345b729 100755
--- a/libraries/dsp/si/src/vhdl/si_arr.vhd
+++ b/libraries/dsp/si/src/vhdl/si_arr.vhd
@@ -56,9 +56,20 @@ END si_arr;
ARCHITECTURE str OF si_arr IS
- CONSTANT c_si_mem_reg : t_c_mem := (c_mem_reg_rd_latency, 1, 1, 1, '0');
+ --TYPE t_c_mem IS RECORD
+ -- latency : NATURAL; -- read latency
+ -- adr_w : NATURAL;
+ -- dat_w : NATURAL;
+ -- nof_dat : NATURAL; -- optional, nof dat words <= 2**adr_w
+ -- init_sl : STD_LOGIC; -- optional, init all dat words to std_logic '0', '1' or 'X'
+ -- --init_file : STRING; -- "UNUSED", unconstrained length can not be in record
+ --END RECORD;
- SIGNAL reg_si_en : STD_LOGIC_VECTOR(c_si_mem_reg.dat_w*c_si_mem_reg.nof_dat-1 DOWNTO 0);
+ -- Use one MM word to fit the si_en bits, so this suits g_nof_streams
+ -- <= c_word_w = 32.
+ CONSTANT c_si_mem_reg : t_c_mem := (c_mem_reg_rd_latency, 1, g_nof_streams, 1, '0');
+
+ SIGNAL reg_si_en : STD_LOGIC_VECTOR(g_nof_streams-1 DOWNTO 0);
BEGIN
@@ -88,7 +99,7 @@ BEGIN
PORT MAP (
in_sosi => in_sosi_arr(I),
out_sosi => out_sosi_arr(I),
- si_en => reg_si_en(0),
+ si_en => reg_si_en(I),
clk => dp_clk,
rst => dp_rst
);