From f47988e062d5b50005acef5e19cd7829c002fb94 Mon Sep 17 00:00:00 2001
From: Reinier van der Walle <walle@astron.nl>
Date: Thu, 8 Oct 2020 16:37:17 +0200
Subject: [PATCH] Initial commit of mms_dp_scale.vhd
---
libraries/base/dp/hdllib.cfg | 3 +-
libraries/base/dp/src/vhdl/mms_dp_scale.vhd | 136 ++++++++++++++++++++
2 files changed, 138 insertions(+), 1 deletion(-)
create mode 100644 libraries/base/dp/src/vhdl/mms_dp_scale.vhd
diff --git a/libraries/base/dp/hdllib.cfg b/libraries/base/dp/hdllib.cfg
index bde1e5b94e..d238389b5a 100644
--- a/libraries/base/dp/hdllib.cfg
+++ b/libraries/base/dp/hdllib.cfg
@@ -162,11 +162,12 @@ synth_files =
src/vhdl/dp_complex_add.vhd
src/vhdl/dp_selector_arr.vhd
src/vhdl/dp_selector.vhd
+ src/vhdl/mms_dp_scale.vhd
tb/vhdl/dp_stream_player.vhd
tb/vhdl/dp_sosi_recorder.vhd
tb/vhdl/dp_stream_rec_play.vhd
tb/vhdl/dp_statistics.vhd
-
+
tb/vhdl/tb_dp_pkg.vhd
test_bench_files =
diff --git a/libraries/base/dp/src/vhdl/mms_dp_scale.vhd b/libraries/base/dp/src/vhdl/mms_dp_scale.vhd
new file mode 100644
index 0000000000..becfa24af2
--- /dev/null
+++ b/libraries/base/dp/src/vhdl/mms_dp_scale.vhd
@@ -0,0 +1,136 @@
+-------------------------------------------------------------------------------
+--
+-- Copyright 2020
+-- ASTRON (Netherlands Institute for Radio Astronomy) <http://www.astron.nl/>
+-- P.O.Box 2, 7990 AA Dwingeloo, The Netherlands
+--
+-- Licensed under the Apache License, Version 2.0 (the "License");
+-- you may not use this file except in compliance with the License.
+-- You may obtain a copy of the License at
+--
+-- http://www.apache.org/licenses/LICENSE-2.0
+--
+-- Unless required by applicable law or agreed to in writing, software
+-- distributed under the License is distributed on an "AS IS" BASIS,
+-- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+-- See the License for the specific language governing permissions and
+-- limitations under the License.
+--
+-------------------------------------------------------------------------------
+
+-------------------------------------------------------------------------------
+--
+-- Author: R. van der Walle
+-- Purpose: Scale samples per block of valid samples in a stream via MM
+-- Description:
+-- The mms_dp_scale.vhd component consists of mms_dp_gain.vhd and dp_requantize.
+-- Remark:
+-- .
+-------------------------------------------------------------------------------
+
+LIBRARY IEEE, common_lib;
+USE IEEE.STD_LOGIC_1164.ALL;
+USE common_lib.common_pkg.ALL;
+USE common_lib.common_mem_pkg.ALL;
+USE work.dp_stream_pkg.ALL;
+
+ENTITY mms_dp_scale IS
+ GENERIC (
+ -- mms_dp_gain generics
+ g_complex_data : BOOLEAN := TRUE;
+ g_complex_gain : BOOLEAN := FALSE;
+ g_gain_init_re : INTEGER := 1;
+ g_gain_init_im : INTEGER := 0;
+ g_gain_w : NATURAL := 16;
+ g_in_dat_w : NATURAL := 9;
+
+ -- dp_requantize generics
+ g_out_dat_w : NATURAL := 8;
+ g_lsb_w : NATURAL := 16;
+ g_lsb_round : BOOLEAN := TRUE; -- when TRUE ROUND else TRUNCATE the input LSbits
+ g_lsb_round_clip : BOOLEAN := FALSE; -- when TRUE round clip to +max to avoid wrapping to output -min (signed) or 0 (unsigned) due to rounding
+ g_msb_clip : BOOLEAN := TRUE; -- when TRUE CLIP else WRAP the input MSbits
+ g_msb_clip_symmetric : BOOLEAN := FALSE -- when TRUE CLIP signed symmetric to +c_smax and -c_smax, else to +c_smax and c_smin_symm
+ -- for wrapping when g_msb_clip=FALSE the g_msb_clip_symmetric is ignored, so signed wrapping is done asymmetric
+ );
+ PORT (
+ -- System
+ mm_rst : IN STD_LOGIC;
+ mm_clk : IN STD_LOGIC;
+ dp_rst : IN STD_LOGIC;
+ dp_clk : IN STD_LOGIC;
+
+ -- MM interface
+ reg_gain_re_mosi : IN t_mem_mosi := c_mem_mosi_rst;
+ reg_gain_re_miso : OUT t_mem_miso;
+ reg_gain_im_mosi : IN t_mem_mosi := c_mem_mosi_rst;
+ reg_gain_im_miso : OUT t_mem_miso;
+
+ -- ST interface
+ in_sosi : IN t_dp_sosi;
+ out_sosi : OUT t_dp_sosi
+ );
+END mms_dp_scale;
+
+ARCHITECTURE str OF mms_dp_scale IS
+
+ CONSTANT c_dp_requantize_complex : BOOLEAN := g_complex_gain OR g_complex_data;
+ CONSTANT c_gain_out_dat_w : NATURAL := g_gain_w + g_in_dat_w -1; -- -1 to compensate for double sign-bit
+
+ SIGNAL dp_gain_out_sosi : t_dp_sosi;
+
+BEGIN
+ ---------------------------------------------------------------
+ -- Gain
+ ---------------------------------------------------------------
+ u_mms_dp_gain : ENTITY work.mms_dp_gain
+ GENERIC MAP (
+ g_complex_data => g_complex_data,
+ g_complex_gain => g_complex_gain,
+ g_gain_init_re => g_gain_init_re,
+ g_gain_init_im => g_gain_init_im,
+ g_gain_w => g_gain_w,
+ g_in_dat_w => g_in_dat_w,
+ g_out_dat_w => c_gain_out_dat_w
+ )
+ PORT MAP (
+ -- System
+ mm_rst => mm_rst,
+ mm_clk => mm_clk,
+ dp_rst => dp_rst,
+ dp_clk => dp_clk,
+
+ -- MM interface
+ reg_gain_re_mosi => reg_gain_re_mosi,
+ reg_gain_re_miso => reg_gain_re_miso,
+ reg_gain_im_mosi => reg_gain_im_mosi,
+ reg_gain_im_miso => reg_gain_im_miso,
+
+ in_sosi => in_sosi,
+ out_sosi => dp_gain_out_sosi
+ );
+
+ ---------------------------------------------------------------
+ -- Requantize
+ ---------------------------------------------------------------
+ u_dp_requantize : ENTITY work.dp_requantize
+ GENERIC MAP (
+ g_complex => c_dp_requantize_complex,
+ g_representation => "SIGNED",
+ g_lsb_w => g_lsb_w,
+ g_lsb_round => g_lsb_round,
+ g_lsb_round_clip => g_lsb_round_clip,
+ g_msb_clip => g_msb_clip,
+ g_msb_clip_symmetric => g_msb_clip_symmetric,
+ g_in_dat_w => c_gain_out_dat_w,
+ g_out_dat_w => g_out_dat_w
+ )
+ PORT MAP (
+ rst => dp_rst,
+ clk => dp_clk,
+ -- ST sink
+ snk_in => dp_gain_out_sosi,
+ -- ST source
+ src_out => out_sosi
+ );
+END str;
--
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