From f1cc56a65f4c14f92321806a76fc134a8d067563 Mon Sep 17 00:00:00 2001
From: Erik Kooistra <kooistra@astron.nl>
Date: Tue, 20 Jan 2015 14:58:34 +0000
Subject: [PATCH] Added technology libraries for ip_arria10. Added
copy_hex_files for DDR4 IP simulation.
---
libraries/io/ddr/hdllib.cfg | 14 ++++++++++----
1 file changed, 10 insertions(+), 4 deletions(-)
diff --git a/libraries/io/ddr/hdllib.cfg b/libraries/io/ddr/hdllib.cfg
index 41a4c6ca9c..e50efbb9fe 100644
--- a/libraries/io/ddr/hdllib.cfg
+++ b/libraries/io/ddr/hdllib.cfg
@@ -8,6 +8,7 @@ build_dir_synth = $HDL_BUILD_DIR
modelsim_compile_ip_files =
$RADIOHDL/libraries/technology/ip_stratixiv/ddr3_uphy_4g_800_master/copy_hex_files.tcl
+ $RADIOHDL/libraries/technology/ip_arria10/ddr4_4g_1600/copy_hex_files.tcl
synth_files =
src/vhdl/io_ddr_driver_flush_ctrl.vhd
@@ -20,9 +21,14 @@ test_bench_files =
tb/vhdl/tb_tb_io_ddr.vhd
modelsim_search_libraries =
- altera_ver lpm_ver sgate_ver altera_mf_ver altera_lnsim_ver stratixiv_ver stratixiv_hssi_ver stratixiv_pcie_hip_ver
- altera lpm sgate altera_mf altera_lnsim stratixiv stratixiv_hssi stratixiv_pcie_hip
-# altera_ver lpm_ver sgate_ver altera_mf_ver altera_lnsim_ver stratixiv_ver stratixiv_hssi_ver stratixiv_pcie_hip_ver twentynm_ver twentynm_hssi_ver twentynm_hip_ver
-# altera lpm sgate altera_mf altera_lnsim stratixiv stratixiv_hssi stratixiv_pcie_hip twentynm twentynm_hssi twentynm_hip
+# stratixiv only
+# altera_ver lpm_ver sgate_ver altera_mf_ver altera_lnsim_ver stratixiv_ver stratixiv_hssi_ver stratixiv_pcie_hip_ver
+# altera lpm sgate altera_mf altera_lnsim stratixiv stratixiv_hssi stratixiv_pcie_hip
+# arria10 only
+# altera_ver lpm_ver sgate_ver altera_mf_ver altera_lnsim_ver twentynm_ver twentynm_hssi_ver twentynm_hip_ver
+# altera lpm sgate altera_mf altera_lnsim twentynm twentynm_hssi twentynm_hip
+# both (will yield errors if the technology library is not available in simulator but these errors can be ignored)
+ altera_ver lpm_ver sgate_ver altera_mf_ver altera_lnsim_ver stratixiv_ver stratixiv_hssi_ver stratixiv_pcie_hip_ver twentynm_ver twentynm_hssi_ver twentynm_hip_ver
+ altera lpm sgate altera_mf altera_lnsim stratixiv stratixiv_hssi stratixiv_pcie_hip twentynm twentynm_hssi twentynm_hip
--
GitLab