diff --git a/applications/compaan/designs/compaan_io_test_fn/src/vhdl/compaan_io_test_fn.vhd b/applications/compaan/designs/compaan_io_test_fn/src/vhdl/compaan_io_test_fn.vhd
index 89cc2d902da1bad18a23db1df8dc445b9cceb792..b16b2dc2e9e01eeb71b54f83d8e47779e70ad62e 100644
--- a/applications/compaan/designs/compaan_io_test_fn/src/vhdl/compaan_io_test_fn.vhd
+++ b/applications/compaan/designs/compaan_io_test_fn/src/vhdl/compaan_io_test_fn.vhd
@@ -117,8 +117,10 @@ ARCHITECTURE str OF compaan_io_test_fn IS
-- General
CONSTANT c_fw_version : t_unb1_board_fw_version := (1, 0);
CONSTANT c_block_size : NATURAL := 8;
+ CONSTANT c_gap_size : NATURAL := 3000;
+ CONSTANT c_nof_blocks_per_sync : NATURAL := 200000;
CONSTANT c_use_1GbE : BOOLEAN := TRUE;
- CONSTANT c_use_phy : t_c_unb1_board_use_phy := (sel_a_b(g_sim, 0, 1), 0, 0, 0, 0, 0, 0, 1);
+ CONSTANT c_use_phy : t_c_unb1_board_use_phy := (sel_a_b(g_sim, 0, 1), 0, 0, 0, 0, 0, 0, 1);
-- Terminal
CONSTANT c_nof_bus : NATURAL := 4;
CONSTANT c_term_data_w : NATURAL := 32;
@@ -139,6 +141,9 @@ ARCHITECTURE str OF compaan_io_test_fn IS
CONSTANT c_term_rx_fifo_size : NATURAL := c_bram_m9k_fifo_depth;
CONSTANT c_term_rx_fifo_fill : NATURAL := 0;
CONSTANT c_term_rx_timeout_w : NATURAL := 0;
+ -- BSN Monitor
+ CONSTANT c_nof_bsn_mon_streams : NATURAL := 5;
+ CONSTANT c_bsn_mon_timeout : NATURAL := (c_block_size+c_gap_size)*c_nof_blocks_per_sync*10/8;
-- 10GbE
CONSTANT c_nof_10G_streams : NATURAL := 1;
CONSTANT c_10G_data_w : NATURAL := 64;
@@ -147,8 +152,8 @@ ARCHITECTURE str OF compaan_io_test_fn IS
-- Offloads
CONSTANT c_ip_length : NATURAL := c_block_size*8 + 50;
CONSTANT c_udp_length : NATURAL := c_block_size*8 + 30;
- CONSTANT c_nof_hdr_fields : NATURAL := 3+12+4+10;
- CONSTANT c_hdr_field_ovr_init : STD_LOGIC_VECTOR(c_nof_hdr_fields-1 DOWNTO 0) := "111"&"111111111111"&"0011"&"101111111"&"0";
+ CONSTANT c_nof_hdr_fields : NATURAL := 3+12+4+9+1;
+ CONSTANT c_hdr_field_ovr_init : STD_LOGIC_VECTOR(c_nof_hdr_fields-1 DOWNTO 0) := "111"&"111111111111"&"0011"&"001111111"&"0";
CONSTANT c_hdr_field_arr : t_common_field_arr(c_nof_hdr_fields-1 DOWNTO 0) := ( ( field_name_pad("eth_dst_mac" ), " ", 48, field_default(0) ),
( field_name_pad("eth_src_mac" ), " ", 48, field_default(0) ),
( field_name_pad("eth_type" ), " ", 16, field_default(x"0800") ),
@@ -183,9 +188,6 @@ ARCHITECTURE str OF compaan_io_test_fn IS
-----------------------------------------------------------------------------
-- SIGNALS
-----------------------------------------------------------------------------
-
- SIGNAL block_gen_src_out_arr : t_dp_sosi_arr(c_nof_streams-1 DOWNTO 0);
-
-- System
-- . Clocks and resets
SIGNAL mm_clk : STD_LOGIC;
@@ -208,30 +210,31 @@ ARCHITECTURE str OF compaan_io_test_fn IS
-- 10GbE
-- . FIFO
- SIGNAL dp_fifo_sc_snk_in_arr : t_dp_sosi_arr(c_nof_10G_streams-1 DOWNTO 0);
- SIGNAL dp_fifo_sc_snk_out_arr : t_dp_siso_arr(c_nof_10G_streams-1 DOWNTO 0);
- -- . Header
- SIGNAL hdr_fields_out_arr : t_slv_1024_arr(c_nof_10G_streams-1 DOWNTO 0);
- SIGNAL hdr_fields_in_arr : t_slv_1024_arr(c_nof_10G_streams-1 DOWNTO 0);
- -- . XAUI
- SIGNAL xaui_tx_arr : t_xaui_arr(c_nof_10G_streams-1 DOWNTO 0);
- SIGNAL xaui_rx_arr : t_xaui_arr(c_nof_10G_streams-1 DOWNTO 0);
- SIGNAL front_xaui_tx_arr : t_unb1_board_xaui_sl_2arr(c_nof_10G_streams-1 DOWNTO 0);
- SIGNAL front_xaui_rx_arr : t_unb1_board_xaui_sl_2arr(c_nof_10G_streams-1 DOWNTO 0);
- -- . MDIO
- SIGNAL mdio_mdc_arr : STD_LOGIC_VECTOR(c_nof_10G_streams-1 DOWNTO 0);
- SIGNAL mdio_mdat_in_arr : STD_LOGIC_VECTOR(c_nof_10G_streams-1 DOWNTO 0);
- SIGNAL mdio_mdat_oen_arr : STD_LOGIC_VECTOR(c_nof_10G_streams-1 DOWNTO 0);
+ SIGNAL dp_fifo_sc_snk_in_arr : t_dp_sosi_arr(c_nof_10G_streams-1 DOWNTO 0);
+ SIGNAL dp_fifo_sc_snk_out_arr : t_dp_siso_arr(c_nof_10G_streams-1 DOWNTO 0);
+ -- . Header
+ SIGNAL hdr_fields_out_arr : t_slv_1024_arr(c_nof_10G_streams-1 DOWNTO 0);
+ SIGNAL hdr_fields_in_arr : t_slv_1024_arr(c_nof_10G_streams-1 DOWNTO 0);
+ -- . XAUI
+ SIGNAL xaui_tx_arr : t_xaui_arr(c_nof_10G_streams-1 DOWNTO 0);
+ SIGNAL xaui_rx_arr : t_xaui_arr(c_nof_10G_streams-1 DOWNTO 0);
+ SIGNAL front_xaui_tx_arr : t_unb1_board_xaui_sl_2arr(c_nof_10G_streams-1 DOWNTO 0);
+ SIGNAL front_xaui_rx_arr : t_unb1_board_xaui_sl_2arr(c_nof_10G_streams-1 DOWNTO 0);
+ -- . MDIO
+ SIGNAL mdio_mdc_arr : STD_LOGIC_VECTOR(c_nof_10G_streams-1 DOWNTO 0);
+ SIGNAL mdio_mdat_in_arr : STD_LOGIC_VECTOR(c_nof_10G_streams-1 DOWNTO 0);
+ SIGNAL mdio_mdat_oen_arr : STD_LOGIC_VECTOR(c_nof_10G_streams-1 DOWNTO 0);
-- . Offload: RX
- SIGNAL dp_offload_rx_snk_in_arr : t_dp_sosi_arr(c_nof_10G_streams-1 DOWNTO 0);
- SIGNAL dp_offload_rx_snk_out_arr : t_dp_siso_arr(c_nof_10G_streams-1 DOWNTO 0);
- SIGNAL dp_offload_rx_src_in_arr : t_dp_siso_arr(c_nof_10G_streams-1 DOWNTO 0);
- SIGNAL dp_offload_rx_src_out_arr : t_dp_sosi_arr(c_nof_10G_streams-1 DOWNTO 0);
+ SIGNAL dp_offload_rx_restored_src_out_arr : t_dp_sosi_arr(c_nof_10G_streams-1 DOWNTO 0) := (OTHERS=> c_dp_sosi_rst);
+ SIGNAL dp_offload_rx_snk_in_arr : t_dp_sosi_arr(c_nof_10G_streams-1 DOWNTO 0);
+ SIGNAL dp_offload_rx_snk_out_arr : t_dp_siso_arr(c_nof_10G_streams-1 DOWNTO 0);
+ SIGNAL dp_offload_rx_src_in_arr : t_dp_siso_arr(c_nof_10G_streams-1 DOWNTO 0);
+ SIGNAL dp_offload_rx_src_out_arr : t_dp_sosi_arr(c_nof_10G_streams-1 DOWNTO 0);
-- . Offload: TX
- SIGNAL dp_offload_tx_snk_in_arr : t_dp_sosi_arr(c_nof_10G_streams-1 DOWNTO 0);
- SIGNAL dp_offload_tx_snk_out_arr : t_dp_siso_arr(c_nof_10G_streams-1 DOWNTO 0);
- SIGNAL dp_offload_tx_src_in_arr : t_dp_siso_arr(c_nof_10G_streams-1 DOWNTO 0);
- SIGNAL dp_offload_tx_src_out_arr : t_dp_sosi_arr(c_nof_10G_streams-1 DOWNTO 0);
+ SIGNAL dp_offload_tx_snk_in_arr : t_dp_sosi_arr(c_nof_10G_streams-1 DOWNTO 0);
+ SIGNAL dp_offload_tx_snk_out_arr : t_dp_siso_arr(c_nof_10G_streams-1 DOWNTO 0);
+ SIGNAL dp_offload_tx_src_in_arr : t_dp_siso_arr(c_nof_10G_streams-1 DOWNTO 0);
+ SIGNAL dp_offload_tx_src_out_arr : t_dp_sosi_arr(c_nof_10G_streams-1 DOWNTO 0);
-- Terminal
SIGNAL term_tx_usr_siso_2arr : t_unb1_board_mesh_siso_2arr;
@@ -251,6 +254,10 @@ ARCHITECTURE str OF compaan_io_test_fn IS
SIGNAL TEST_FIFO_FULL : STD_LOGIC_VECTOR(1 DOWNTO 0);
SIGNAL TEST_BLOCK_RD : STD_LOGIC_VECTOR(2 DOWNTO 0);
+ -- BSN monitor
+ SIGNAL bsn_monitor_snk_in_arr : t_dp_sosi_arr(c_nof_bsn_mon_streams-1 DOWNTO 0);
+ SIGNAL bsn_monitor_snk_out_arr : t_dp_siso_arr(c_nof_bsn_mon_streams-1 DOWNTO 0) := (OTHERS=> c_dp_siso_rdy);
+
-- MM interface
-- . 10GbE
SIGNAL reg_tr_10GbE_mosi : t_mem_mosi;
@@ -272,7 +279,10 @@ ARCHITECTURE str OF compaan_io_test_fn IS
SIGNAL reg_diagnostics_miso : t_mem_miso;
-- . Compaan
SIGNAL reg_compaan_mosi : t_mem_mosi;
- SIGNAL reg_compaan_miso : t_mem_miso;
+ SIGNAL reg_compaan_miso : t_mem_miso;
+ -- . BSN Monitor
+ SIGNAL reg_bsn_monitor_mosi : t_mem_mosi;
+ SIGNAL reg_bsn_monitor_miso : t_mem_miso;
-- . UNB1 Cntrl
SIGNAL reg_wdi_mosi : t_mem_mosi;
SIGNAL reg_wdi_miso : t_mem_miso;
@@ -381,15 +391,19 @@ BEGIN
-- DP Interface
dp_rst => dp_rst,
dp_clk => dp_clk,
+
-- Data received by 10G
src_out_arr => dp_offload_rx_snk_in_arr,
src_in_arr => dp_offload_rx_snk_out_arr,
+
-- Data to be send by 10G
snk_out_arr => dp_offload_tx_src_in_arr,
snk_in_arr => dp_offload_tx_src_out_arr,
+
-- Serial XAUI I/O
xaui_tx_arr => xaui_tx_arr,
xaui_rx_arr => xaui_rx_arr,
+
-- MDIO Interface
mdio_rst => SI_FN_RSTN,
mdio_mdc_arr => mdio_mdc_arr,
@@ -443,7 +457,19 @@ BEGIN
hdr_fields_out_arr => hdr_fields_out_arr
);
-
+
+ -- Restore the sync and bsn signals to the offload_rx output
+ gen_restore_sync_bsn : FOR i IN 0 TO c_nof_10G_streams-1 GENERATE
+ dp_offload_rx_restored_src_out_arr(i).sync <= sl(hdr_fields_out_arr(i)(field_hi(c_hdr_field_arr, "usr_sync") DOWNTO field_lo(c_hdr_field_arr, "usr_sync" )));
+ dp_offload_rx_restored_src_out_arr(i).bsn <= RESIZE_UVEC(hdr_fields_out_arr(i)(field_hi(c_hdr_field_arr, "usr_bsn" ) DOWNTO field_lo(c_hdr_field_arr, "usr_bsn" )), c_dp_stream_bsn_w);
+
+ dp_offload_rx_restored_src_out_arr(i).data <= dp_offload_rx_src_out_arr(i).data;
+ dp_offload_rx_restored_src_out_arr(i).valid <= dp_offload_rx_src_out_arr(i).valid;
+ dp_offload_rx_restored_src_out_arr(i).sop <= dp_offload_rx_src_out_arr(i).sop;
+ dp_offload_rx_restored_src_out_arr(i).eop <= dp_offload_rx_src_out_arr(i).eop;
+ dp_offload_rx_restored_src_out_arr(i).err <= dp_offload_rx_src_out_arr(i).err;
+ END GENERATE;
+
-----------------------------------------------------------------------------
-- Terminal
-----------------------------------------------------------------------------
@@ -525,7 +551,8 @@ BEGIN
-----------------------------------------------------------------------------
u_compaan_design: ENTITY work.compaan_wrapper
GENERIC MAP(
- g_blocks_per_sync => c_block_size
+ g_blocks_per_sync => c_nof_blocks_per_sync,
+ g_blocksize => c_block_size
)
PORT MAP(
-- Streaming sink
@@ -555,7 +582,7 @@ BEGIN
compaan_src_in_arr(i) <= dp_fifo_sc_snk_out_arr(i);
dp_fifo_sc_snk_in_arr(i) <= compaan_src_out_arr(i);
- compaan_snk_in_arr(i) <= dp_offload_rx_src_out_arr(i);
+ compaan_snk_in_arr(i) <= dp_offload_rx_restored_src_out_arr(i);
dp_offload_rx_src_in_arr(i) <= compaan_snk_out_arr(i);
END GENERATE;
@@ -613,13 +640,52 @@ BEGIN
hdr_fields_in_arr(i)(field_hi(c_hdr_field_arr, "udp_src_port" ) DOWNTO field_lo(c_hdr_field_arr, "udp_src_port" )) <= TO_UVEC(4000+i, 16);
hdr_fields_in_arr(i)(field_hi(c_hdr_field_arr, "udp_dst_port" ) DOWNTO field_lo(c_hdr_field_arr, "udp_dst_port" )) <= TO_UVEC(4000+i, 16);
- hdr_fields_in_arr(i)(field_hi(c_hdr_field_arr, "usr_sync" ) DOWNTO field_lo(c_hdr_field_arr, "usr_sync" )) <= slv(block_gen_src_out_arr(i).sync);
- hdr_fields_in_arr(i)(field_hi(c_hdr_field_arr, "usr_bsn" ) DOWNTO field_lo(c_hdr_field_arr, "usr_bsn" )) <= block_gen_src_out_arr(i).bsn(59 DOWNTO 0);
+ hdr_fields_in_arr(i)(field_hi(c_hdr_field_arr, "usr_sync" ) DOWNTO field_lo(c_hdr_field_arr, "usr_sync" )) <= slv(dp_offload_tx_snk_in_arr(i).sync);
+ hdr_fields_in_arr(i)(field_hi(c_hdr_field_arr, "usr_bsn" ) DOWNTO field_lo(c_hdr_field_arr, "usr_bsn" )) <= dp_offload_tx_snk_in_arr(i).bsn(59 DOWNTO 0);
hdr_fields_in_arr(i)(field_hi(c_hdr_field_arr, "usr_hdr_word_align") DOWNTO field_lo(c_hdr_field_arr, "usr_hdr_word_align" )) <= TO_UVEC(0, 16);
hdr_fields_in_arr(i)(field_hi(c_hdr_field_arr, "ip_total_length" ) DOWNTO field_lo(c_hdr_field_arr, "ip_total_length" )) <= TO_UVEC(c_ip_length, 16);
END GENERATE;
+ -----------------------------------------------------------------------------
+ -- BSN monitor
+ -----------------------------------------------------------------------------
+ u_dp_bsn_monitor: ENTITY dp_lib.mms_dp_bsn_monitor
+ GENERIC MAP (
+ g_nof_streams => c_nof_bsn_mon_streams,
+ g_cross_clock_domain => TRUE,
+ g_sync_timeout => c_bsn_mon_timeout,
+ g_cnt_sop_w => ceil_log2(c_nof_blocks_per_sync+1),
+ g_cnt_valid_w => ceil_log2(c_nof_blocks_per_sync*c_block_size+1),
+ g_log_first_bsn => TRUE
+ )
+ PORT MAP (
+ mm_rst => mm_rst,
+ mm_clk => mm_clk,
+ reg_mosi => reg_bsn_monitor_mosi,
+ reg_miso => reg_bsn_monitor_miso,
+
+ dp_rst => dp_rst,
+ dp_clk => dp_clk,
+ in_siso_arr => bsn_monitor_snk_out_arr,
+ in_sosi_arr => bsn_monitor_snk_in_arr
+ );
+
+ bsn_monitor_snk_in_arr(0) <= compaan_snk_in_arr(0);
+ bsn_monitor_snk_out_arr(0) <= compaan_snk_out_arr(0);
+
+ bsn_monitor_snk_in_arr(1) <= compaan_src_out_arr(0);
+ bsn_monitor_snk_out_arr(1) <= compaan_src_in_arr(0);
+
+ bsn_monitor_snk_in_arr(2) <= compaan_snk_in_arr(3);
+ bsn_monitor_snk_out_arr(2) <= compaan_snk_out_arr(3);
+
+ bsn_monitor_snk_in_arr(3) <= compaan_src_out_arr(3);
+ bsn_monitor_snk_out_arr(3) <= compaan_src_in_arr(3);
+
+ bsn_monitor_snk_in_arr(4) <= dp_offload_rx_restored_src_out_arr(0);
+ bsn_monitor_snk_out_arr(4) <= dp_offload_rx_src_in_arr(0);
+
-----------------------------------------------------------------------------
-- UNB1 Control
-----------------------------------------------------------------------------
@@ -654,7 +720,7 @@ BEGIN
dp_rst => dp_rst,
dp_clk => dp_clk,
- dp_pps => OPEN,
+ dp_pps => dp_pps,
dp_rst_in => dp_rst,
dp_clk_in => dp_clk,
@@ -719,63 +785,65 @@ BEGIN
-- MM master
-----------------------------------------------------------------------------
u_inst_mmm_compaan_io_test_fn : ENTITY work.mmm_compaan_io_test_fn
- GENERIC MAP(
- g_sim => g_sim,
- g_sim_unb_nr => g_sim_unb_nr,
- g_sim_node_nr => g_sim_node_nr
- )
- PORT MAP(
- mm_clk => mm_clk,
- mm_rst => mm_rst,
- pout_wdi => pout_wdi,
- reg_wdi_mosi => reg_wdi_mosi,
- reg_wdi_miso => reg_wdi_miso,
- reg_unb_system_info_mosi => reg_unb_system_info_mosi,
- reg_unb_system_info_miso => reg_unb_system_info_miso,
- rom_unb_system_info_mosi => rom_unb_system_info_mosi,
- rom_unb_system_info_miso => rom_unb_system_info_miso,
- reg_unb_sens_mosi => reg_unb_sens_mosi,
- reg_unb_sens_miso => reg_unb_sens_miso,
- reg_ppsh_mosi => reg_ppsh_mosi,
- reg_ppsh_miso => reg_ppsh_miso,
- eth1g_mm_rst => eth1g_mm_rst,
- eth1g_reg_interrupt => eth1g_reg_interrupt,
- eth1g_ram_mosi => eth1g_ram_mosi,
- eth1g_ram_miso => eth1g_ram_miso,
- eth1g_reg_mosi => eth1g_reg_mosi,
- eth1g_reg_miso => eth1g_reg_miso,
- eth1g_tse_mosi => eth1g_tse_mosi,
- eth1g_tse_miso => eth1g_tse_miso,
- reg_epcs_mosi => reg_epcs_mosi,
- reg_epcs_miso => reg_epcs_miso,
- reg_remu_mosi => reg_remu_mosi,
- reg_remu_miso => reg_remu_miso,
- reg_dp_offload_tx_mosi => reg_dp_offload_tx_mosi,
- reg_dp_offload_tx_miso => reg_dp_offload_tx_miso,
- reg_dp_offload_tx_hdr_dat_mosi => reg_dp_offload_tx_hdr_dat_mosi,
- reg_dp_offload_tx_hdr_dat_miso => reg_dp_offload_tx_hdr_dat_miso,
- reg_dp_offload_tx_hdr_ovr_mosi => reg_dp_offload_tx_hdr_ovr_mosi,
- reg_dp_offload_tx_hdr_ovr_miso => reg_dp_offload_tx_hdr_ovr_miso,
- reg_dp_offload_rx_hdr_dat_mosi => reg_dp_offload_rx_hdr_dat_mosi,
- reg_dp_offload_rx_hdr_dat_miso => reg_dp_offload_rx_hdr_dat_miso,
- reg_mdio_0_mosi => reg_mdio_0_mosi,
- reg_mdio_0_miso => reg_mdio_0_miso,
- reg_mdio_1_mosi => reg_mdio_1_mosi,
- reg_mdio_1_miso => reg_mdio_1_miso,
- reg_mdio_2_mosi => reg_mdio_2_mosi,
- reg_mdio_2_miso => reg_mdio_2_miso,
- reg_tr_10gbe_mosi => reg_tr_10gbe_mosi,
- reg_tr_10gbe_miso => reg_tr_10gbe_miso,
- reg_tr_xaui_mosi => reg_tr_xaui_mosi,
- reg_tr_xaui_miso => reg_tr_xaui_miso,
- reg_diagnostics_mosi => reg_diagnostics_mosi,
- reg_diagnostics_miso => reg_diagnostics_miso,
- reg_tr_nonbonded_mosi => reg_tr_nonbonded_mosi,
- reg_tr_nonbonded_miso => reg_tr_nonbonded_miso,
- reg_compaan_mosi => reg_compaan_mosi,
- reg_compaan_miso => reg_compaan_miso
- );
-
+ GENERIC MAP(
+ g_sim => g_sim,
+ g_sim_unb_nr => g_sim_unb_nr,
+ g_sim_node_nr => g_sim_node_nr
+ )
+ PORT MAP(
+ mm_clk => mm_clk,
+ mm_rst => mm_rst,
+ pout_wdi => pout_wdi,
+ reg_wdi_mosi => reg_wdi_mosi,
+ reg_wdi_miso => reg_wdi_miso,
+ reg_unb_system_info_mosi => reg_unb_system_info_mosi,
+ reg_unb_system_info_miso => reg_unb_system_info_miso,
+ rom_unb_system_info_mosi => rom_unb_system_info_mosi,
+ rom_unb_system_info_miso => rom_unb_system_info_miso,
+ reg_unb_sens_mosi => reg_unb_sens_mosi,
+ reg_unb_sens_miso => reg_unb_sens_miso,
+ reg_ppsh_mosi => reg_ppsh_mosi,
+ reg_ppsh_miso => reg_ppsh_miso,
+ eth1g_mm_rst => eth1g_mm_rst,
+ eth1g_reg_interrupt => eth1g_reg_interrupt,
+ eth1g_ram_mosi => eth1g_ram_mosi,
+ eth1g_ram_miso => eth1g_ram_miso,
+ eth1g_reg_mosi => eth1g_reg_mosi,
+ eth1g_reg_miso => eth1g_reg_miso,
+ eth1g_tse_mosi => eth1g_tse_mosi,
+ eth1g_tse_miso => eth1g_tse_miso,
+ reg_epcs_mosi => reg_epcs_mosi,
+ reg_epcs_miso => reg_epcs_miso,
+ reg_remu_mosi => reg_remu_mosi,
+ reg_remu_miso => reg_remu_miso,
+ reg_bsn_monitor_mosi => reg_bsn_monitor_mosi,
+ reg_bsn_monitor_miso => reg_bsn_monitor_miso,
+ reg_dp_offload_tx_mosi => reg_dp_offload_tx_mosi,
+ reg_dp_offload_tx_miso => reg_dp_offload_tx_miso,
+ reg_dp_offload_tx_hdr_dat_mosi => reg_dp_offload_tx_hdr_dat_mosi,
+ reg_dp_offload_tx_hdr_dat_miso => reg_dp_offload_tx_hdr_dat_miso,
+ reg_dp_offload_tx_hdr_ovr_mosi => reg_dp_offload_tx_hdr_ovr_mosi,
+ reg_dp_offload_tx_hdr_ovr_miso => reg_dp_offload_tx_hdr_ovr_miso,
+ reg_dp_offload_rx_hdr_dat_mosi => reg_dp_offload_rx_hdr_dat_mosi,
+ reg_dp_offload_rx_hdr_dat_miso => reg_dp_offload_rx_hdr_dat_miso,
+ reg_mdio_0_mosi => reg_mdio_0_mosi,
+ reg_mdio_0_miso => reg_mdio_0_miso,
+ reg_mdio_1_mosi => reg_mdio_1_mosi,
+ reg_mdio_1_miso => reg_mdio_1_miso,
+ reg_mdio_2_mosi => reg_mdio_2_mosi,
+ reg_mdio_2_miso => reg_mdio_2_miso,
+ reg_tr_10gbe_mosi => reg_tr_10gbe_mosi,
+ reg_tr_10gbe_miso => reg_tr_10gbe_miso,
+ reg_tr_xaui_mosi => reg_tr_xaui_mosi,
+ reg_tr_xaui_miso => reg_tr_xaui_miso,
+ reg_diagnostics_mosi => reg_diagnostics_mosi,
+ reg_diagnostics_miso => reg_diagnostics_miso,
+ reg_tr_nonbonded_mosi => reg_tr_nonbonded_mosi,
+ reg_tr_nonbonded_miso => reg_tr_nonbonded_miso,
+ reg_compaan_mosi => reg_compaan_mosi,
+ reg_compaan_miso => reg_compaan_miso
+ );
+
reg_mdio_mosi_arr(0) <= reg_mdio_0_mosi;
reg_mdio_mosi_arr(1) <= reg_mdio_1_mosi;
reg_mdio_mosi_arr(2) <= reg_mdio_2_mosi;