diff --git a/applications/apertif/designs/apertif_unb1_correlator/src/vhdl/node_apertif_unb1_correlator_processing.vhd b/applications/apertif/designs/apertif_unb1_correlator/src/vhdl/node_apertif_unb1_correlator_processing.vhd
index bf1e4e9b92769dc7c1168d1d88ce44d83238e26a..71a2575b672aa4d6f4540e620482630cded707df 100644
--- a/applications/apertif/designs/apertif_unb1_correlator/src/vhdl/node_apertif_unb1_correlator_processing.vhd
+++ b/applications/apertif/designs/apertif_unb1_correlator/src/vhdl/node_apertif_unb1_correlator_processing.vhd
@@ -130,19 +130,20 @@ ARCHITECTURE str OF apertif_unb1_correlator_processing IS
-- . 8192 channels/sec = 128 * 64 channels * 300 visibilities
-- . No inter channel delay: 128 * (19200 valid cycles + 1543300 invalid cycles =) 1562500 cycles/sec = 200M cycles/sec
-- . With inter channel delay: 128 * 64 channels * (300 valid cycles + 24114 invalid cycles =) 24414 cycles/sec = 199.999.488 cycles/sec (less than 200M so we're fast enough)
- CONSTANT c_inter_channel_delay : NATURAL := sel_a_b(g_sim, sel_a_b(g_sim_fast, 0, 4400), 24114); -- ^^^^^--- 24414= 2*integration period.
- -- 4400=~5.5x faster than 157Mbps = 860Mbps burst for sim (but still 157Mbps on average)
- -- WPFB
- CONSTANT c_wpfb_wb_factor : NATURAL := 1; -- = default 1, wideband factor
- CONSTANT c_wpfb_nof_wb_streams : NATURAL := c_nof_interleaved_streams; -- = 1, the number of parallel wideband streams. The fi
- CONSTANT c_wpfb_nof_chan : NATURAL := 1; -- = default 0, defines the number of channels (=time-m
- CONSTANT c_wpfb_nof_points : NATURAL := 64; -- = 1024, N point FFT
- CONSTANT c_wpfb_nof_taps : NATURAL := 8; -- = 8 nof taps n the filter
- CONSTANT c_wpfb_coef_w : NATURAL := 16; --FIXME: 9b does not work; needs updated coefficient files.
- CONSTANT c_wpfb_in_dat_w : NATURAL := 8; --FIXME: should be 6b at some point
- CONSTANT c_wpfb_out_dat_w : NATURAL := 16; --FIXME: Could be wider but is currently 9b to avoid the need for quantization: 9b -> mult -> 18b -> accu -> 32b at the corr output.
- CONSTANT c_wpfb_use_separate : BOOLEAN := FALSE; -- = false for complex input, true for two real inputs
- CONSTANT c_wpfb_use_reorder : BOOLEAN := FALSE;
+ CONSTANT c_inter_channel_delay : NATURAL := sel_a_b(g_sim, sel_a_b(g_sim_fast, 0, 4400), 24114); -- ^^^^^--- 24414= 2*integration period.
+ -- 4400=~5.5x faster than 157Mbps = 860Mbps burst for sim (but still 157Mbps on average)
+ -- WPFB
+ CONSTANT c_wpfb_wb_factor : NATURAL := 1; -- = default 1, wideband factor
+ CONSTANT c_wpfb_nof_wb_streams : NATURAL := c_nof_interleaved_streams; -- = 1, the number of parallel wideband streams. The fi
+ CONSTANT c_wpfb_nof_chan : NATURAL := 1; -- = default 0, defines the number of channels (=time-m
+ CONSTANT c_wpfb_nof_points : NATURAL := 64; -- = 1024, N point FFT
+ CONSTANT c_wpfb_nof_taps : NATURAL := 8; -- = 8 nof taps n the filter
+ CONSTANT c_wpfb_coef_w : NATURAL := 16; --FIXME: 9b does not work; needs updated coefficient files.
+ CONSTANT c_wpfb_in_dat_w : NATURAL := 6; --FIXME: In simulation there are 6bit values used in the BG.
+ CONSTANT c_wpfb_out_dat_w : NATURAL := 16; --FIXME: Could be wider but is currently 9b to avoid the need for quantization: 9b -> mult -> 18b -> accu -> 32b at the corr output.
+ CONSTANT c_wpfb_out_dat_significant_w : NATURAL := sel_a_b(c_wpfb_in_dat_w = 6, 10, 12);
+ CONSTANT c_wpfb_use_separate : BOOLEAN := FALSE; -- = false for complex input, true for two real inputs
+ CONSTANT c_wpfb_use_reorder : BOOLEAN := FALSE;
CONSTANT c_wpfb : t_wpfb := (c_wpfb_wb_factor, c_wpfb_nof_points, c_wpfb_nof_chan, c_wpfb_nof_wb_streams,
c_wpfb_nof_taps, c_wpfb_in_dat_w, 16, c_wpfb_coef_w,
@@ -187,8 +188,11 @@ ARCHITECTURE str OF apertif_unb1_correlator_processing IS
-- SIGNAL deinterleaved_arr : t_dp_sosi_arr(c_nof_inputs-1 DOWNTO 0);
SIGNAL reinterleave_in_arr : t_dp_sosi_arr(c_nof_cor_inputs-1 DOWNTO 0);
SIGNAL reinterleave_out_arr : t_dp_sosi_arr(c_nof_interleaved_streams-1 DOWNTO 0);
+
+ SIGNAL dp_pipeline_src_out : t_dp_sosi;
- -- Filterbank and Correlator
+ -- Filterbank and Correlator
+ SIGNAL wpfb_eop : STD_LOGIC;
SIGNAL wpfb_snk_in_ctrl : t_dp_sosi;
SIGNAL wpfb_snk_in_arr : t_dp_sosi_arr(c_nof_interleaved_streams-1 DOWNTO 0);
SIGNAL wpfb_src_out_arr : t_dp_sosi_arr(c_nof_interleaved_streams-1 DOWNTO 0);
@@ -312,7 +316,7 @@ BEGIN
g_deint_block_size => 1,
g_nof_out => 1,
g_inter_block_size => 1,
- g_use_ctrl => FALSE,
+ g_use_ctrl => TRUE,
g_dat_w => g_usr_data_w,
g_use_complex => c_use_complex,
g_align_out => TRUE
@@ -324,15 +328,53 @@ BEGIN
src_out_arr => reinterleave_out_arr(I DOWNTO I)
);
END GENERATE;
+ ---------------------------------------------------------------------------------------------
+ -- FIXME: It would be nice if the control signals from the output of the dp_reinterleave unit
+ -- were OK. They are now not OK and therefor some trickery has to be done to generate
+ -- proper sosi-control signals for the wpfb.
+ --------------------------------------------------------------------------------------------
+
+ -----------------------------------------------------------------------------
+ -- DP Pipeline to recover the sosi-control signals after the reinterleaving
+ -----------------------------------------------------------------------------
+ u_st_ctrl_pipe : ENTITY dp_lib.dp_pipeline
+ GENERIC MAP(
+ g_pipeline => 1 -- 0 for wires, > 0 for registers,
+ )
+ PORT MAP (
+ rst => dp_rst,
+ clk => dp_clk,
+
+ snk_in => reinterleave_in_arr(0),
+ src_out => dp_pipeline_src_out
+ );
- p_add_st_ctrl : PROCESS(reinterleave_out_arr)
+ -- EOP should be one later then the other signals due to reinterleavinga
+ u_pipe_eop : ENTITY common_lib.common_pipeline
+ GENERIC MAP (
+ g_pipeline => 2,
+ g_in_dat_w => 1,
+ g_out_dat_w => 1
+ )
+ PORT MAP (
+ rst => dp_rst,
+ clk => dp_clk,
+ in_dat => slv(reinterleave_in_arr(0).eop),
+ sl(out_dat) => wpfb_eop
+ );
+
+ -----------------------------------------------------------------------------
+ -- Merge reinterleaved data again with pipelined sosi-control signals.
+ -----------------------------------------------------------------------------
+ p_add_st_ctrl : PROCESS(reinterleave_out_arr, dp_pipeline_src_out)
BEGIN
FOR I IN 0 TO c_nof_interleaved_streams-1 LOOP
- wpfb_snk_in_arr(I) <= reinterleave_out_arr(I);
--- wpfb_snk_in_arr(i) <= dp_pipeline_src_out; -- SOSI ctrl
--- wpfb_snk_in_arr(i).data <= reinterleave_out_arr(i).data;
--- wpfb_snk_in_arr(i).im <= reinterleave_out_arr(i).im;
--- wpfb_snk_in_arr(i).re <= reinterleave_out_arr(i).re;
+ wpfb_snk_in_arr(i) <= dp_pipeline_src_out; -- SOSI ctrl
+ wpfb_snk_in_arr(i).data <= reinterleave_out_arr(i).data;
+ wpfb_snk_in_arr(i).im <= reinterleave_out_arr(i).im;
+ wpfb_snk_in_arr(i).re <= reinterleave_out_arr(i).re;
+ wpfb_snk_in_arr(i).eop <= wpfb_eop;
+ wpfb_snk_in_arr(i).valid <= reinterleave_out_arr(i).valid;
END LOOP;
END PROCESS;
@@ -410,7 +452,7 @@ BEGIN
GENERIC MAP (
g_complex => TRUE,
g_representation => "SIGNED",
- g_lsb_w => c_wpfb_out_dat_w-c_cor_in_dat_w,
+ g_lsb_w => c_wpfb_out_dat_significant_w-c_cor_in_dat_w,
g_lsb_round => FALSE,
g_lsb_round_clip => FALSE,
g_msb_clip => FALSE,