From eead84352f1ac2ca9c86b736d812f3b8283e4ddd Mon Sep 17 00:00:00 2001
From: Pepping <pepping>
Date: Tue, 1 Nov 2016 17:23:20 +0000
Subject: [PATCH] Added dp_sync_checker
---
.../sopc_apertif_unb1_fn_beamformer.sopc | 230 ++++++++++--------
1 file changed, 134 insertions(+), 96 deletions(-)
diff --git a/applications/apertif/designs/apertif_unb1_fn_beamformer/quartus/sopc_apertif_unb1_fn_beamformer.sopc b/applications/apertif/designs/apertif_unb1_fn_beamformer/quartus/sopc_apertif_unb1_fn_beamformer.sopc
index 9875c90503..70df2bf929 100644
--- a/applications/apertif/designs/apertif_unb1_fn_beamformer/quartus/sopc_apertif_unb1_fn_beamformer.sopc
+++ b/applications/apertif/designs/apertif_unb1_fn_beamformer/quartus/sopc_apertif_unb1_fn_beamformer.sopc
@@ -14,7 +14,7 @@
{
datum baseAddress
{
- value = "1936";
+ value = "1984";
type = "long";
}
}
@@ -92,139 +92,144 @@
type = "String";
}
}
- element reg_diag_data_buffer_output.mem
+ element reg_dp_xonoff_output.mem
{
datum baseAddress
{
- value = "1152";
+ value = "2008";
type = "long";
}
}
- element reg_bsn_monitor.mem
+ element reg_tr_10GbE.mem
{
datum baseAddress
{
- value = "1344";
+ value = "786432";
type = "long";
}
}
- element ram_diag_data_buffer_terminal.mem
+ element reg_diag_bg.mem
{
datum baseAddress
{
- value = "65536";
+ value = "1664";
type = "long";
}
}
- element reg_dp_pkt_merge.mem
+ element ram_dp_ram_from_mm.mem
{
datum baseAddress
{
- value = "1760";
+ value = "512";
type = "long";
}
}
- element pio_pps.mem
+ element ram_diag_data_buffer_terminal.mem
{
datum baseAddress
{
- value = "1952";
+ value = "65536";
type = "long";
}
}
- element reg_dp_offload_tx_hdr_dat.mem
+ element reg_io_ddr.mem
{
datum baseAddress
{
- value = "1024";
+ value = "1536";
type = "long";
}
}
- element reg_diagnostics_mesh.mem
+ element reg_diag_bg_output.mem
{
datum baseAddress
{
- value = "256";
+ value = "1888";
type = "long";
}
}
- element reg_tr_nonbonded_mesh.mem
+ element rom_system_info.mem
{
+ datum _lockedAddress
+ {
+ value = "1";
+ type = "boolean";
+ }
datum baseAddress
{
- value = "1280";
+ value = "4096";
type = "long";
}
}
- element reg_diag_data_buffer_terminal.mem
+ element ram_diag_bg.mem
{
datum baseAddress
{
- value = "128";
+ value = "32768";
type = "long";
}
}
- element reg_mdio_1.mem
+ element reg_diagnostics_mesh.mem
{
datum baseAddress
{
- value = "1824";
+ value = "256";
type = "long";
}
}
- element reg_tr_10GbE.mem
+ element pio_pps.mem
{
datum baseAddress
{
- value = "786432";
+ value = "2000";
type = "long";
}
}
- element ram_diag_data_buffer_output.mem
+ element reg_dp_offload_tx.mem
{
datum baseAddress
{
- value = "864256";
+ value = "1992";
type = "long";
}
}
- element ram_st_sst.mem
+ element reg_dp_sync_checker.mem
{
datum baseAddress
{
- value = "16384";
+ value = "1968";
type = "long";
}
}
- element reg_mdio_2.mem
+ element reg_dp_ram_from_mm.mem
{
datum baseAddress
{
- value = "1856";
+ value = "1696";
type = "long";
}
}
- element ram_dp_ram_from_mm.mem
+ element ram_ss_ss_wide.mem
{
datum baseAddress
{
- value = "512";
+ value = "524288";
type = "long";
}
}
- element reg_diag_bg_output.mem
+ element reg_tr_xaui.mem
{
datum baseAddress
{
- value = "2048";
+ value = "851968";
type = "long";
}
}
- element ram_ss_ss_wide.mem
+ element reg_diag_data_buffer_output.mem
{
datum baseAddress
{
- value = "524288";
+ value = "1152";
type = "long";
}
}
@@ -236,35 +241,35 @@
type = "long";
}
}
- element reg_dp_xonoff_output.mem
+ element reg_mdio_1.mem
{
datum baseAddress
{
- value = "1960";
+ value = "1824";
type = "long";
}
}
- element reg_tr_xaui.mem
+ element reg_dp_split.mem
{
datum baseAddress
{
- value = "851968";
+ value = "1728";
type = "long";
}
}
- element reg_io_ddr.mem
+ element reg_unb_sens.mem
{
datum baseAddress
{
- value = "1536";
+ value = "1632";
type = "long";
}
}
- element reg_dp_switch.mem
+ element ram_ss_ss_wide_transp.mem
{
datum baseAddress
{
- value = "2176";
+ value = "819200";
type = "long";
}
}
@@ -276,11 +281,19 @@
type = "long";
}
}
- element ram_diag_bg.mem
+ element reg_diag_data_buffer_terminal.mem
{
datum baseAddress
{
- value = "32768";
+ value = "128";
+ type = "long";
+ }
+ }
+ element reg_dp_pkt_merge.mem
+ {
+ datum baseAddress
+ {
+ value = "1760";
type = "long";
}
}
@@ -297,31 +310,23 @@
type = "long";
}
}
- element reg_dp_offload_tx.mem
- {
- datum baseAddress
- {
- value = "1944";
- type = "long";
- }
- }
- element reg_dp_split.mem
+ element reg_mdio_2.mem
{
datum baseAddress
{
- value = "1728";
+ value = "1856";
type = "long";
}
}
- element reg_dp_ram_from_mm.mem
+ element ram_diag_data_buffer_output.mem
{
datum baseAddress
{
- value = "1696";
+ value = "864256";
type = "long";
}
}
- element rom_system_info.mem
+ element reg_wdi.mem
{
datum _lockedAddress
{
@@ -330,20 +335,15 @@
}
datum baseAddress
{
- value = "4096";
+ value = "12288";
type = "long";
}
}
- element reg_wdi.mem
+ element reg_st_sst.mem
{
- datum _lockedAddress
- {
- value = "1";
- type = "boolean";
- }
datum baseAddress
{
- value = "12288";
+ value = "1408";
type = "long";
}
}
@@ -355,35 +355,43 @@
type = "long";
}
}
- element reg_unb_sens.mem
+ element reg_bsn_monitor.mem
{
datum baseAddress
{
- value = "1632";
+ value = "1344";
type = "long";
}
}
- element reg_st_sst.mem
+ element reg_dp_offload_tx_hdr_dat.mem
{
datum baseAddress
{
- value = "1408";
+ value = "1024";
type = "long";
}
}
- element reg_diag_bg.mem
+ element ram_st_sst.mem
{
datum baseAddress
{
- value = "1664";
+ value = "16384";
type = "long";
}
}
- element ram_ss_ss_wide_transp.mem
+ element reg_dp_switch.mem
{
datum baseAddress
{
- value = "819200";
+ value = "2016";
+ type = "long";
+ }
+ }
+ element reg_tr_nonbonded_mesh.mem
+ {
+ datum baseAddress
+ {
+ value = "1280";
type = "long";
}
}
@@ -475,7 +483,7 @@
}
datum baseAddress
{
- value = "1888";
+ value = "1920";
type = "long";
}
}
@@ -647,6 +655,14 @@
type = "int";
}
}
+ element reg_dp_sync_checker
+ {
+ datum _sortIndex
+ {
+ value = "44";
+ type = "int";
+ }
+ }
element reg_dp_xonoff_output
{
datum _sortIndex
@@ -743,14 +759,6 @@
type = "int";
}
}
- element pio_debug_wave.s1
- {
- datum baseAddress
- {
- value = "1904";
- type = "long";
- }
- }
element timer_0.s1
{
datum baseAddress
@@ -781,7 +789,15 @@
}
datum baseAddress
{
- value = "1920";
+ value = "1952";
+ type = "long";
+ }
+ }
+ element pio_debug_wave.s1
+ {
+ datum baseAddress
+ {
+ value = "1936";
type = "long";
}
}
@@ -815,8 +831,8 @@
<parameter name="maxAdditionalLatency" value="0" />
<parameter name="projectName">apertif_unb1_fn_beamformer_trans.qpf</parameter>
<parameter name="sopcBorderPoints" value="true" />
- <parameter name="systemHash" value="-111392441286" />
- <parameter name="timeStamp" value="1477047058327" />
+ <parameter name="systemHash" value="-110415625660" />
+ <parameter name="timeStamp" value="1477494033765" />
<parameter name="useTestBenchNamingPattern" value="false" />
<module kind="clock_source" version="11.1" enabled="1" name="clk_0">
<parameter name="clockFrequency" value="25000000" />
@@ -917,7 +933,7 @@
<parameter name="dcache_numTCDM" value="_0" />
<parameter name="dcache_lineSize" value="_32" />
<parameter name="dcache_bursts" value="false" />
- <parameter name="dataSlaveMapParam"><![CDATA[<address-map><slave name='pio_system_info.mem' start='0x0' end='0x80' /><slave name='reg_diag_data_buffer_terminal.mem' start='0x80' end='0x100' /><slave name='reg_diagnostics_mesh.mem' start='0x100' end='0x200' /><slave name='ram_dp_ram_from_mm.mem' start='0x200' end='0x300' /><slave name='reg_bsn_monitor_output.mem' start='0x300' end='0x400' /><slave name='reg_dp_offload_tx_hdr_dat.mem' start='0x400' end='0x480' /><slave name='reg_diag_data_buffer_output.mem' start='0x480' end='0x500' /><slave name='reg_tr_nonbonded_mesh.mem' start='0x500' end='0x540' /><slave name='reg_bsn_monitor.mem' start='0x540' end='0x580' /><slave name='reg_st_sst.mem' start='0x580' end='0x5C0' /><slave name='avs_eth_0.mms_reg' start='0x5C0' end='0x600' /><slave name='reg_io_ddr.mem' start='0x600' end='0x640' /><slave name='timer_0.s1' start='0x640' end='0x660' /><slave name='reg_unb_sens.mem' start='0x660' end='0x680' /><slave name='reg_diag_bg.mem' start='0x680' end='0x6A0' /><slave name='reg_dp_ram_from_mm.mem' start='0x6A0' end='0x6C0' /><slave name='reg_dp_split.mem' start='0x6C0' end='0x6E0' /><slave name='reg_dp_pkt_merge.mem' start='0x6E0' end='0x700' /><slave name='reg_mdio_0.mem' start='0x700' end='0x720' /><slave name='reg_mdio_1.mem' start='0x720' end='0x740' /><slave name='reg_mdio_2.mem' start='0x740' end='0x760' /><slave name='altpll_0.pll_slave' start='0x760' end='0x770' /><slave name='pio_debug_wave.s1' start='0x770' end='0x780' /><slave name='pio_wdi.s1' start='0x780' end='0x790' /><slave name='jtag_uart_0.avalon_jtag_slave' start='0x790' end='0x798' /><slave name='reg_dp_offload_tx.mem' start='0x798' end='0x7A0' /><slave name='pio_pps.mem' start='0x7A0' end='0x7A8' /><slave name='reg_dp_xonoff_output.mem' start='0x7A8' end='0x7B0' /><slave name='reg_diag_bg_output.mem' start='0x800' end='0x820' /><slave name='reg_dp_switch.mem' start='0x880' end='0x888' /><slave name='rom_system_info.mem' start='0x1000' end='0x2000' /><slave name='avs_eth_0.mms_tse' start='0x2000' end='0x3000' /><slave name='reg_wdi.mem' start='0x3000' end='0x3008' /><slave name='cpu_0.jtag_debug_module' start='0x3800' end='0x4000' /><slave name='ram_st_sst.mem' start='0x4000' end='0x8000' /><slave name='ram_diag_bg.mem' start='0x8000' end='0x10000' /><slave name='ram_diag_data_buffer_terminal.mem' start='0x10000' end='0x20000' /><slave name='onchip_memory2_0.s1' start='0x20000' end='0x40000' /><slave name='ram_bf_weights.mem' start='0x40000' end='0x80000' /><slave name='ram_ss_ss_wide.mem' start='0x80000' end='0xC0000' /><slave name='reg_tr_10GbE.mem' start='0xC0000' end='0xC8000' /><slave name='ram_ss_ss_wide_transp.mem' start='0xC8000' end='0xD0000' /><slave name='reg_tr_xaui.mem' start='0xD0000' end='0xD2000' /><slave name='avs_eth_0.mms_ram' start='0xD2000' end='0xD3000' /><slave name='ram_diag_data_buffer_output.mem' start='0xD3000' end='0xD4000' /></address-map>]]></parameter>
+ <parameter name="dataSlaveMapParam"><![CDATA[<address-map><slave name='pio_system_info.mem' start='0x0' end='0x80' /><slave name='reg_diag_data_buffer_terminal.mem' start='0x80' end='0x100' /><slave name='reg_diagnostics_mesh.mem' start='0x100' end='0x200' /><slave name='ram_dp_ram_from_mm.mem' start='0x200' end='0x300' /><slave name='reg_bsn_monitor_output.mem' start='0x300' end='0x400' /><slave name='reg_dp_offload_tx_hdr_dat.mem' start='0x400' end='0x480' /><slave name='reg_diag_data_buffer_output.mem' start='0x480' end='0x500' /><slave name='reg_tr_nonbonded_mesh.mem' start='0x500' end='0x540' /><slave name='reg_bsn_monitor.mem' start='0x540' end='0x580' /><slave name='reg_st_sst.mem' start='0x580' end='0x5C0' /><slave name='avs_eth_0.mms_reg' start='0x5C0' end='0x600' /><slave name='reg_io_ddr.mem' start='0x600' end='0x640' /><slave name='timer_0.s1' start='0x640' end='0x660' /><slave name='reg_unb_sens.mem' start='0x660' end='0x680' /><slave name='reg_diag_bg.mem' start='0x680' end='0x6A0' /><slave name='reg_dp_ram_from_mm.mem' start='0x6A0' end='0x6C0' /><slave name='reg_dp_split.mem' start='0x6C0' end='0x6E0' /><slave name='reg_dp_pkt_merge.mem' start='0x6E0' end='0x700' /><slave name='reg_mdio_0.mem' start='0x700' end='0x720' /><slave name='reg_mdio_1.mem' start='0x720' end='0x740' /><slave name='reg_mdio_2.mem' start='0x740' end='0x760' /><slave name='reg_diag_bg_output.mem' start='0x760' end='0x780' /><slave name='altpll_0.pll_slave' start='0x780' end='0x790' /><slave name='pio_debug_wave.s1' start='0x790' end='0x7A0' /><slave name='pio_wdi.s1' start='0x7A0' end='0x7B0' /><slave name='reg_dp_sync_checker.mem' start='0x7B0' end='0x7C0' /><slave name='jtag_uart_0.avalon_jtag_slave' start='0x7C0' end='0x7C8' /><slave name='reg_dp_offload_tx.mem' start='0x7C8' end='0x7D0' /><slave name='pio_pps.mem' start='0x7D0' end='0x7D8' /><slave name='reg_dp_xonoff_output.mem' start='0x7D8' end='0x7E0' /><slave name='reg_dp_switch.mem' start='0x7E0' end='0x7E8' /><slave name='rom_system_info.mem' start='0x1000' end='0x2000' /><slave name='avs_eth_0.mms_tse' start='0x2000' end='0x3000' /><slave name='reg_wdi.mem' start='0x3000' end='0x3008' /><slave name='cpu_0.jtag_debug_module' start='0x3800' end='0x4000' /><slave name='ram_st_sst.mem' start='0x4000' end='0x8000' /><slave name='ram_diag_bg.mem' start='0x8000' end='0x10000' /><slave name='ram_diag_data_buffer_terminal.mem' start='0x10000' end='0x20000' /><slave name='onchip_memory2_0.s1' start='0x20000' end='0x40000' /><slave name='ram_bf_weights.mem' start='0x40000' end='0x80000' /><slave name='ram_ss_ss_wide.mem' start='0x80000' end='0xC0000' /><slave name='reg_tr_10GbE.mem' start='0xC0000' end='0xC8000' /><slave name='ram_ss_ss_wide_transp.mem' start='0xC8000' end='0xD0000' /><slave name='reg_tr_xaui.mem' start='0xD0000' end='0xD2000' /><slave name='avs_eth_0.mms_ram' start='0xD2000' end='0xD3000' /><slave name='ram_diag_data_buffer_output.mem' start='0xD3000' end='0xD4000' /></address-map>]]></parameter>
<parameter name="dataAddrWidth" value="20" />
<parameter name="customInstSlavesSystemInfo" value="<info/>" />
<parameter name="cpuReset" value="false" />
@@ -1426,6 +1442,15 @@ q]]></parameter>
<parameter name="g_dat_w" value="32" />
<parameter name="AUTO_SYSTEM_CLOCK_RATE" value="50000000" />
</module>
+ <module
+ kind="avs_common_mm"
+ version="1.0"
+ enabled="1"
+ name="reg_dp_sync_checker">
+ <parameter name="g_adr_w" value="2" />
+ <parameter name="g_dat_w" value="32" />
+ <parameter name="AUTO_SYSTEM_CLOCK_RATE" value="50000000" />
+ </module>
<connection
kind="avalon"
version="11.1"
@@ -1464,7 +1489,7 @@ q]]></parameter>
start="cpu_0.data_master"
end="jtag_uart_0.avalon_jtag_slave">
<parameter name="arbitrationPriority" value="1" />
- <parameter name="baseAddress" value="0x0790" />
+ <parameter name="baseAddress" value="0x07c0" />
</connection>
<connection
kind="interrupt"
@@ -1479,7 +1504,7 @@ q]]></parameter>
start="cpu_0.data_master"
end="altpll_0.pll_slave">
<parameter name="arbitrationPriority" value="1" />
- <parameter name="baseAddress" value="0x0760" />
+ <parameter name="baseAddress" value="0x0780" />
</connection>
<connection kind="clock" version="11.1" start="altpll_0.c0" end="cpu_0.clk" />
<connection kind="clock" version="11.1" start="altpll_0.c0" end="jtag_uart_0.clk" />
@@ -1499,7 +1524,7 @@ q]]></parameter>
start="cpu_0.data_master"
end="pio_debug_wave.s1">
<parameter name="arbitrationPriority" value="1" />
- <parameter name="baseAddress" value="0x0770" />
+ <parameter name="baseAddress" value="0x0790" />
</connection>
<connection kind="clock" version="11.1" start="altpll_0.c0" end="timer_0.clk" />
<connection
@@ -1520,7 +1545,7 @@ q]]></parameter>
start="cpu_0.data_master"
end="pio_wdi.s1">
<parameter name="arbitrationPriority" value="1" />
- <parameter name="baseAddress" value="0x0780" />
+ <parameter name="baseAddress" value="0x07a0" />
</connection>
<connection
kind="clock"
@@ -1794,7 +1819,7 @@ q]]></parameter>
start="cpu_0.data_master"
end="reg_dp_offload_tx.mem">
<parameter name="arbitrationPriority" value="1" />
- <parameter name="baseAddress" value="0x0798" />
+ <parameter name="baseAddress" value="0x07c8" />
</connection>
<connection
kind="clock"
@@ -1939,7 +1964,7 @@ q]]></parameter>
start="cpu_0.data_master"
end="pio_pps.mem">
<parameter name="arbitrationPriority" value="1" />
- <parameter name="baseAddress" value="0x07a0" />
+ <parameter name="baseAddress" value="0x07d0" />
</connection>
<connection
kind="clock"
@@ -1978,7 +2003,7 @@ q]]></parameter>
start="cpu_0.data_master"
end="reg_dp_xonoff_output.mem">
<parameter name="arbitrationPriority" value="1" />
- <parameter name="baseAddress" value="0x07a8" />
+ <parameter name="baseAddress" value="0x07d8" />
</connection>
<connection
kind="clock"
@@ -1991,7 +2016,7 @@ q]]></parameter>
start="cpu_0.data_master"
end="reg_diag_bg_output.mem">
<parameter name="arbitrationPriority" value="1" />
- <parameter name="baseAddress" value="0x0800" />
+ <parameter name="baseAddress" value="0x0760" />
</connection>
<connection
kind="clock"
@@ -2004,6 +2029,19 @@ q]]></parameter>
start="cpu_0.data_master"
end="reg_dp_switch.mem">
<parameter name="arbitrationPriority" value="1" />
- <parameter name="baseAddress" value="0x0880" />
+ <parameter name="baseAddress" value="0x07e0" />
+ </connection>
+ <connection
+ kind="clock"
+ version="11.1"
+ start="altpll_0.c0"
+ end="reg_dp_sync_checker.system" />
+ <connection
+ kind="avalon"
+ version="11.1"
+ start="cpu_0.data_master"
+ end="reg_dp_sync_checker.mem">
+ <parameter name="arbitrationPriority" value="1" />
+ <parameter name="baseAddress" value="0x07b0" />
</connection>
</system>
--
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