diff --git a/tools/oneclick/prestudy/YAML/mms_diag_data_buffer/peripheral.cfg b/tools/oneclick/prestudy/YAML/mms_diag_data_buffer/peripheral.cfg index 6986c78386a50df1262104d7c7a85213d2eddda2..2fbd03e1818c63ccaa81c6b7df32de3a790dd0f4 100644 --- a/tools/oneclick/prestudy/YAML/mms_diag_data_buffer/peripheral.cfg +++ b/tools/oneclick/prestudy/YAML/mms_diag_data_buffer/peripheral.cfg @@ -1,139 +1,139 @@ --- - peripheral_name: mms_diag_data_buffer +peripheral_name: mms_diag_data_buffer - nof_inst: 1 - - parameters: - g_nof_streams: 1 - g_data_w: 32 - g_buf_nof_data: 1024 +nof_inst: 1 - reg_diag_data_buffer: - - Sync_cnt: { width: 32, mode: "RO", offset: 0x0, default: 0, descr: "Sync_cnt contains the nof times the buffer (ST) has received a sync pulse since the last MM read (cleared when the last data word from the buffer is read)"} - - Word_cnt: { width: 32, mode: "RO", offset: 0x1, default: 0, descr: "Word_cnt indicates the number of word currently (ST) written in the buffer. Cleared on (ST) re-write of buffer."} - - Valid_cnt_arm_ena: { width: 32, mode: "RW", offset: 0x2, default: 0, descr: "Valid_cnt contains the number of valid cycles since the last sync pulse. Cleared on every sync pulse. Arm_enable: Write to this register to arm the system. After the system is armed the next syn pulse will trigger the acquisition of data."} - - Reg_sync_delay: { width: 32, mode: "RW", offset: 0x3, default: 0, descr: "Reg_sync_delay contains the number of valid cycles to delay/wait after an armed-syncpulse, before the data is written to the databuffer."} - - Version: { width: 32, mode: "RO", offset: 0x7, default: 0, descr: "Version contains the version number of the databuffer peripheral."} +parameters: + g_nof_streams: 1 + g_data_w: 32 + g_buf_nof_data: 1024 - ram_diag_data_buffer: - width: g_data_w - depth: g_nof_streams*2**ceil_log2(g_buf_nof_data) - mode: RW - descr: "Contains the data that is being captured." +reg_diag_data_buffer: + - Sync_cnt: { width: 32, mode: "RO", offset: 0x0, default: 0, descr: "Sync_cnt contains the nof times the buffer (ST) has received a sync pulse since the last MM read (cleared when the last data word from the buffer is read)"} + - Word_cnt: { width: 32, mode: "RO", offset: 0x1, default: 0, descr: "Word_cnt indicates the number of word currently (ST) written in the buffer. Cleared on (ST) re-write of buffer."} + - Valid_cnt_arm_ena: { width: 32, mode: "RW", offset: 0x2, default: 0, descr: "Valid_cnt contains the number of valid cycles since the last sync pulse. Cleared on every sync pulse. Arm_enable: Write to this register to arm the system. After the system is armed the next syn pulse will trigger the acquisition of data."} + - Reg_sync_delay: { width: 32, mode: "RW", offset: 0x3, default: 0, descr: "Reg_sync_delay contains the number of valid cycles to delay/wait after an armed-syncpulse, before the data is written to the databuffer."} + - Version: { width: 32, mode: "RO", offset: 0x7, default: 0, descr: "Version contains the version number of the databuffer peripheral."} - peripheral_description: "Peripheral diag_data_buffer - - Memory map RAM_DIAG_DATA_BUFFER - - If there is only one instance then the RAM name is RAM_DIAG_DATA_BUFFER, else it - gets an instanceName as post fix so RAM_DIAG_DATA_BUFFER_<instanceName>. - - The diag_data_buffer can store multiple streams in parallel. For example - 1024 data words for 16 streams the memory map becomes: 16 - - streamNr = 0: - - 31 0 wi - |-----------------|-----------------|-----------------|-----------------| - | data_0[31:0] | 0 - |-----------------------------------------------------------------------| - | data_1[31:0] | 1 - |-----------------------------------------------------------------------| - | ... | .. - |-----------------------------------------------------------------------| - | data_1023[31:0] | 1023 - |-----------------------------------------------------------------------| - - streamNr = 1: - - 31 0 wi - |-----------------|-----------------|-----------------|-----------------| - | data_0[31:0] | 1024 - |-----------------------------------------------------------------------| - | data_1[31:0] | 1025 - |-----------------------------------------------------------------------| - | ... | .. - |-----------------------------------------------------------------------| - | data_1023[31:0] | 2047 - |-----------------------------------------------------------------------| - - ... - - streamNr = 15: - - 31 0 wi - |-----------------|-----------------|-----------------|-----------------| - | data_0[31:0] | 15360 - |-----------------------------------------------------------------------| - | data_1[31:0] | 15361 - |-----------------------------------------------------------------------| - | ... | .. - |-----------------------------------------------------------------------| - | data_1023[31:0] | 16383 - |-----------------------------------------------------------------------| - - Remarks: - . The data buffer stores valid data samples until it is full. - . The data buffer fills again after an external sync pulse or after the - last data word was read via the MM bus, dependend on whether the generic - g_use_in_sync is TRUE or FALSE in diag_data_buffer.vhd. - . The actual data width depends on the generic g_data_w in - diag_data_buffer.vhd. The value of unused MSBits is undefined. - - Memory map REG_DIAG_DATA_BUFFER (one for each stream like the RAM above) - - 31 0 wi - |-----------------|-----------------|-----------------|-----------------| - | sync_cnt[31:0] | 0 RO (Version 0 and 1) - |-----------------------------------------------------------------------| - | word_cnt[31:0] | 1 RO (Version 0 and 1) - |-----------------------------------------------------------------------| - | R = valid_cnt[31:0] W = arm_enable | 2 RW (Version 1 only) - |-----------------------------------------------------------------------| - | reg_sync_delay[31:0] | 3 RW (Version 1 only) - |-----------------------------------------------------------------------| - | RESERVED | 4 (Version 1 only) - |-----------------------------------------------------------------------| - | RESERVED | 5 (Version 1 only) - |-----------------------------------------------------------------------| - | RESERVED | 6 (Version 1 only) - |-----------------------------------------------------------------------| - | version[31:0] | 7 RO (Version 1 only) - |-----------------------------------------------------------------------| - - There are 3 modes of operation of the data_buffer. - Version 0 supports Mode 1 and Mode 2 - Version 1 supports Mode 1, Mode 2 and Mode 3 - - (1) NON-SYNC MODE: g_use_in_sync = FALSE - In this mode the first g_nof_data valid data input words are stored in the - data buffer. A new set of data will be stored when the last word is read - from the buffer via the MM interface. - - (2) SYNC-MODE: g_use_in_sync = TRUE and reg_sync_delay = 0 - On every received sync pulse a number of g_nof_data valid words are written - to the databuffer. Data will be overwritten on every new sync pulse. It is - up to the user to read out the data in time in between two sync pulses - - (3) ARM-MODE: g_use_in_sync = TRUE and reg_sync_delay > 0 - First the reg_sync_delay should be written with a desired delay value. Then - the arm register must be written. After being armed the databuffer will wait - for the first sync pulse to arrive. When it has arrived it will wait for - reg_sync_delay valid cycles before g_nof_data valid words are written to the - databuffer. The data can then be read out through the MM interface. New data - will only be written if the databuffer is being armed again. - - - Sync_cnt contains the nof times the buffer (ST) has received a sync pulse - since the last MM read (cleared when the last data word from the buffer is - read); - - Word_cnt indicates the number of word currently (ST) written in the buffer. - Cleared on (ST) re-write of buffer. - - valid_cnt contains the number of valid cycles since the last sync pulse. - Cleared on every sync pulse. - - arm_enable. Write to this register to arm the system. After the system is - armed the next syn pulse will truigger the acquisition of data. - - reg_sync_delay contains the number of valid cycles to delay/wait after an armed-syncpulse, - before the data is written to the databuffer. - - version contains the version number of the databuffer peripheral. - +ram_diag_data_buffer: + width: g_data_w + depth: g_nof_streams*2**cm.ceil_log2(g_buf_nof_data) + mode: RW + descr: "Contains the data that is being captured." + +peripheral_description: "Peripheral diag_data_buffer + + Memory map RAM_DIAG_DATA_BUFFER + + If there is only one instance then the RAM name is RAM_DIAG_DATA_BUFFER, else it + gets an instanceName as post fix so RAM_DIAG_DATA_BUFFER_<instanceName>. + + The diag_data_buffer can store multiple streams in parallel. For example + 1024 data words for 16 streams the memory map becomes: 16 + + streamNr = 0: + + 31 0 wi + |-----------------|-----------------|-----------------|-----------------| + | data_0[31:0] | 0 + |-----------------------------------------------------------------------| + | data_1[31:0] | 1 + |-----------------------------------------------------------------------| + | ... | .. + |-----------------------------------------------------------------------| + | data_1023[31:0] | 1023 + |-----------------------------------------------------------------------| + + streamNr = 1: + + 31 0 wi + |-----------------|-----------------|-----------------|-----------------| + | data_0[31:0] | 1024 + |-----------------------------------------------------------------------| + | data_1[31:0] | 1025 + |-----------------------------------------------------------------------| + | ... | .. + |-----------------------------------------------------------------------| + | data_1023[31:0] | 2047 + |-----------------------------------------------------------------------| + + ... + + streamNr = 15: + + 31 0 wi + |-----------------|-----------------|-----------------|-----------------| + | data_0[31:0] | 15360 + |-----------------------------------------------------------------------| + | data_1[31:0] | 15361 + |-----------------------------------------------------------------------| + | ... | .. + |-----------------------------------------------------------------------| + | data_1023[31:0] | 16383 + |-----------------------------------------------------------------------| + + Remarks: + . The data buffer stores valid data samples until it is full. + . The data buffer fills again after an external sync pulse or after the + last data word was read via the MM bus, dependend on whether the generic + g_use_in_sync is TRUE or FALSE in diag_data_buffer.vhd. + . The actual data width depends on the generic g_data_w in + diag_data_buffer.vhd. The value of unused MSBits is undefined. + + Memory map REG_DIAG_DATA_BUFFER (one for each stream like the RAM above) + + 31 0 wi + |-----------------|-----------------|-----------------|-----------------| + | sync_cnt[31:0] | 0 RO (Version 0 and 1) + |-----------------------------------------------------------------------| + | word_cnt[31:0] | 1 RO (Version 0 and 1) + |-----------------------------------------------------------------------| + | R = valid_cnt[31:0] W = arm_enable | 2 RW (Version 1 only) + |-----------------------------------------------------------------------| + | reg_sync_delay[31:0] | 3 RW (Version 1 only) + |-----------------------------------------------------------------------| + | RESERVED | 4 (Version 1 only) + |-----------------------------------------------------------------------| + | RESERVED | 5 (Version 1 only) + |-----------------------------------------------------------------------| + | RESERVED | 6 (Version 1 only) + |-----------------------------------------------------------------------| + | version[31:0] | 7 RO (Version 1 only) + |-----------------------------------------------------------------------| + + There are 3 modes of operation of the data_buffer. + Version 0 supports Mode 1 and Mode 2 + Version 1 supports Mode 1, Mode 2 and Mode 3 + + (1) NON-SYNC MODE: g_use_in_sync = FALSE + In this mode the first g_nof_data valid data input words are stored in the + data buffer. A new set of data will be stored when the last word is read + from the buffer via the MM interface. + + (2) SYNC-MODE: g_use_in_sync = TRUE and reg_sync_delay = 0 + On every received sync pulse a number of g_nof_data valid words are written + to the databuffer. Data will be overwritten on every new sync pulse. It is + up to the user to read out the data in time in between two sync pulses + + (3) ARM-MODE: g_use_in_sync = TRUE and reg_sync_delay > 0 + First the reg_sync_delay should be written with a desired delay value. Then + the arm register must be written. After being armed the databuffer will wait + for the first sync pulse to arrive. When it has arrived it will wait for + reg_sync_delay valid cycles before g_nof_data valid words are written to the + databuffer. The data can then be read out through the MM interface. New data + will only be written if the databuffer is being armed again. + + - Sync_cnt contains the nof times the buffer (ST) has received a sync pulse + since the last MM read (cleared when the last data word from the buffer is + read); + - Word_cnt indicates the number of word currently (ST) written in the buffer. + Cleared on (ST) re-write of buffer. + - valid_cnt contains the number of valid cycles since the last sync pulse. + Cleared on every sync pulse. + - arm_enable. Write to this register to arm the system. After the system is + armed the next syn pulse will truigger the acquisition of data. + - reg_sync_delay contains the number of valid cycles to delay/wait after an armed-syncpulse, + before the data is written to the databuffer. + - version contains the version number of the databuffer peripheral. + " \ No newline at end of file