diff --git a/boards/uniboard1/designs/unb1_test/revisions/unb1_test_10GbE/unb1_test_10GbE.vhd b/boards/uniboard1/designs/unb1_test/revisions/unb1_test_10GbE/unb1_test_10GbE.vhd
index ee36e6b9e357f3d6ec9fd4a303bd85f97d15f933..785ac654bda06fa7348365dbd2a82f96c1a3e759 100644
--- a/boards/uniboard1/designs/unb1_test/revisions/unb1_test_10GbE/unb1_test_10GbE.vhd
+++ b/boards/uniboard1/designs/unb1_test/revisions/unb1_test_10GbE/unb1_test_10GbE.vhd
@@ -95,6 +95,7 @@ BEGIN
   u_revision : ENTITY unb1_test_lib.unb1_test
   GENERIC MAP (
     g_design_name => g_design_name,
+    g_design_note => g_design_note,
     g_sim         => g_sim,
     g_sim_unb_nr  => g_sim_unb_nr,
     g_sim_node_nr => g_sim_node_nr,
diff --git a/boards/uniboard1/designs/unb1_test/src/vhdl/mmm_unb1_test.vhd b/boards/uniboard1/designs/unb1_test/src/vhdl/mmm_unb1_test.vhd
index 3ed19db10b13250bff7926eb1f0aeba87913242f..db779b159b695afba479a7f6087be0b08618ca77 100644
--- a/boards/uniboard1/designs/unb1_test/src/vhdl/mmm_unb1_test.vhd
+++ b/boards/uniboard1/designs/unb1_test/src/vhdl/mmm_unb1_test.vhd
@@ -63,6 +63,7 @@ ENTITY mmm_unb1_test IS
 
 
     pout_wdi                       : OUT STD_LOGIC;
+    pout_debug_wave                : OUT STD_LOGIC_VECTOR(c_word_w-1 DOWNTO 0);
                              
     -- Manual WDI override
     reg_wdi_mosi                   : OUT t_mem_mosi;
@@ -449,7 +450,7 @@ BEGIN
       coe_writedata_export_from_the_reg_remu        => reg_remu_mosi.wrdata(c_word_w-1 DOWNTO 0),
 
       -- the_pio_debug_wave
-      out_port_from_the_pio_debug_wave              => OPEN,
+      out_port_from_the_pio_debug_wave              => pout_debug_wave,
   
       -- the_pio_pps
       coe_clk_export_from_the_pio_pps               => OPEN,
diff --git a/boards/uniboard1/designs/unb1_test/src/vhdl/unb1_test.vhd b/boards/uniboard1/designs/unb1_test/src/vhdl/unb1_test.vhd
index 7ebb5f42b8386c327bfb264e01682d8b22bc46fb..3017192c8a28bba99ef55546ba2fbb9b1fac1c13 100644
--- a/boards/uniboard1/designs/unb1_test/src/vhdl/unb1_test.vhd
+++ b/boards/uniboard1/designs/unb1_test/src/vhdl/unb1_test.vhd
@@ -216,6 +216,7 @@ ARCHITECTURE str OF unb1_test IS
   
   -- PIOs
   SIGNAL pout_wdi                   : STD_LOGIC;
+  SIGNAL pout_debug_wave            : STD_LOGIC_VECTOR(c_word_w-1 DOWNTO 0);
 
   -- WDI override
   SIGNAL reg_wdi_mosi               : t_mem_mosi;
@@ -378,6 +379,8 @@ BEGIN
     dp_clk_in                => dp_clk,
     
     -- PIOs
+    pout_debug_wave          => pout_debug_wave,
+
     -- Toggle WDI
     pout_wdi                 => pout_wdi,
 
@@ -485,6 +488,7 @@ BEGIN
 
     -- PIOs
     pout_wdi                       => pout_wdi,
+    pout_debug_wave                => pout_debug_wave,
 
     -- Manual WDI override
     reg_wdi_mosi                   => reg_wdi_mosi,