diff --git a/libraries/technology/jesd204b/tb_tech_jesd204b.vhd b/libraries/technology/jesd204b/tb_tech_jesd204b.vhd
index 19c37a937d43a6c425c6b5ce5f2c7dbfacc1830c..7b5bffd1a0cf32f33c9667b2f55f30c874017266 100644
--- a/libraries/technology/jesd204b/tb_tech_jesd204b.vhd
+++ b/libraries/technology/jesd204b/tb_tech_jesd204b.vhd
@@ -147,6 +147,8 @@ ARCHITECTURE tb OF tb_tech_jesd204b IS
   SIGNAL avs_readdata                : t_slv_32_arr(c_nof_streams_jesd204b-1 DOWNTO 0);
   SIGNAL avs_address                 : t_slv_8_arr(c_nof_streams_jesd204b-1 DOWNTO 0);
 
+  SIGNAL jesd204b_disable_arr        : STD_LOGIC_VECTOR(c_nof_streams_jesd204b-1 DOWNTO 0);
+
 BEGIN
 
 
@@ -157,6 +159,7 @@ BEGIN
   mm_clk <= not mm_clk after c_mm_clk_period/2;  
   mm_rst <= '1', '0' after 800 ns;
 
+  jesd204b_disable_arr <= (OTHERS => '0');
 
  
   ------------------------------------------------------------------------------
@@ -173,6 +176,9 @@ BEGIN
     jesd204b_sysref      => jesd204b_sysref_fpga,   
     jesd204b_sync_n_arr  => jesd204b_sync_n_fpga,   
   
+
+    jesd204b_disable_arr => jesd204b_disable_arr,
+
     rx_sosi_arr          => rx_sosi_arr,          
     rx_clk               => rx_clk,          
     rx_rst               => rx_rst,