diff --git a/libraries/dsp/correlator/src/vhdl/corr_multiplier.vhd b/libraries/dsp/correlator/src/vhdl/corr_multiplier.vhd
index eac1de49dd29368770dd8ef203a9088200efe27e..87de32ababd21a977e41b17cd4fbf919dcdbdf51 100644
--- a/libraries/dsp/correlator/src/vhdl/corr_multiplier.vhd
+++ b/libraries/dsp/correlator/src/vhdl/corr_multiplier.vhd
@@ -49,6 +49,8 @@ END corr_multiplier;
 
 ARCHITECTURE str OF corr_multiplier IS
 
+  SIGNAL common_complex_mult_src_out_arr : t_dp_sosi_arr(g_nof_inputs-1 DOWNTO 0);
+
 BEGIN
 
   gen_common_complex_mult : FOR i IN 0 TO g_nof_inputs-1 GENERATE
@@ -77,10 +79,15 @@ BEGIN
       in_br      => snk_in_2arr_2(i)(1).re(g_data_w-1 DOWNTO 0),
       in_bi      => snk_in_2arr_2(i)(1).im(g_data_w-1 DOWNTO 0),
       in_val     => snk_in_2arr_2(i)(0).valid,
-      out_pr     => src_out_arr(i).re(2*g_data_w-1 DOWNTO 0),
-      out_pi     => src_out_arr(i).im(2*g_data_w-1 DOWNTO 0),
-      out_val    => src_out_arr(i).valid
+      out_pr     => common_complex_mult_src_out_arr(i).re(2*g_data_w-1 DOWNTO 0),
+      out_pi     => common_complex_mult_src_out_arr(i).im(2*g_data_w-1 DOWNTO 0),
+      out_val    => common_complex_mult_src_out_arr(i).valid
     );     
+
+    src_out_arr(i).re    <= RESIZE_DP_DSP_DATA(common_complex_mult_src_out_arr(i).re(2*g_data_w-1 DOWNTO 0));
+    src_out_arr(i).im    <= RESIZE_DP_DSP_DATA(common_complex_mult_src_out_arr(i).im(2*g_data_w-1 DOWNTO 0));
+    src_out_arr(i).valid <= common_complex_mult_src_out_arr(i).valid;
+
   END GENERATE;
 
 END str;