From eafe5e79a787f3148494de1ed9dc3d640e81ba47 Mon Sep 17 00:00:00 2001 From: Eric Kooistra <kooistra@astron.nl> Date: Tue, 4 Apr 2023 13:48:03 +0200 Subject: [PATCH] Updated reference mmaps. --- .../lofar2_unb2b_sdp_station.mmap.gold | 15 +- .../lofar2_unb2b_sdp_station.mmap.qsys.gold | 625 +++++----- .../lofar2_unb2c_sdp_station.mmap.gold | 221 +++- .../lofar2_unb2c_sdp_station.mmap.qsys.gold | 1055 +++++++++-------- 4 files changed, 1113 insertions(+), 803 deletions(-) diff --git a/applications/lofar2/designs/lofar2_unb2b_sdp_station/lofar2_unb2b_sdp_station.mmap.gold b/applications/lofar2/designs/lofar2_unb2b_sdp_station/lofar2_unb2b_sdp_station.mmap.gold index 429fc17b1b..e4861ad9b6 100644 --- a/applications/lofar2/designs/lofar2_unb2b_sdp_station/lofar2_unb2b_sdp_station.mmap.gold +++ b/applications/lofar2/designs/lofar2_unb2b_sdp_station/lofar2_unb2b_sdp_station.mmap.gold @@ -177,7 +177,8 @@ number_of_columns = 13 - - - - nyquist_zone_index 0x00058004 1 RW uint32 b[1:0] - - - - - - - observation_id 0x00058005 1 RW uint32 b[31:0] - - - - - - - antenna_band_index 0x00058006 1 RW uint32 b[0:0] - - - - - - - - station_id 0x00058007 1 RW uint32 b[15:0] - - - + - - - - station_id 0x00058007 1 RW uint32 b[9:0] - - - + - - - - antenna_field_index 0x00058008 1 RW uint32 b[5:0] - - - REG_RING_INFO 1 1 REG use_cable_to_previous_rn 0x00060000 1 RW uint32 b[0:0] - - - - - - - use_cable_to_next_rn 0x00060001 1 RW uint32 b[0:0] - - - - - - - n_rn 0x00060002 1 RW uint32 b[7:0] - - - @@ -288,7 +289,8 @@ number_of_columns = 13 - - - - sdp_source_info_f_adc 0x000e800f 1 RW uint32 b[12:12] - - - - - - - sdp_source_info_nyquist_zone_index 0x000e8010 1 RW uint32 b[14:13] - - - - - - - sdp_source_info_antenna_band_index 0x000e8011 1 RW uint32 b[15:15] - - - - - - - - sdp_station_id 0x000e8012 1 RW uint32 b[15:0] - - - + - - - - sdp_station_info_station_id 0x000e8012 1 RW uint32 b[9:0] - - - + - - - - sdp_station_info_antenna_field_index 0x000e8012 1 RW uint32 b[15:10] - - - - - - - sdp_observation_id 0x000e8013 1 RW uint32 b[31:0] - - - - - - - sdp_version_id 0x000e8014 1 RW uint32 b[7:0] - - - - - - - sdp_marker 0x000e8015 1 RW uint32 b[7:0] - - - @@ -366,7 +368,8 @@ number_of_columns = 13 - - - - sdp_source_info_f_adc 0x0012800f 1 RW uint32 b[12:12] - - - - - - - sdp_source_info_nyquist_zone_index 0x00128010 1 RW uint32 b[14:13] - - - - - - - sdp_source_info_antenna_band_index 0x00128011 1 RW uint32 b[15:15] - - - - - - - - sdp_station_id 0x00128012 1 RW uint32 b[15:0] - - - + - - - - sdp_station_info_station_id 0x00128012 1 RW uint32 b[9:0] - - - + - - - - sdp_station_info_antenna_field_index 0x00128012 1 RW uint32 b[15:10] - - - - - - - sdp_observation_id 0x00128013 1 RW uint32 b[31:0] - - - - - - - sdp_version_id 0x00128014 1 RW uint32 b[7:0] - - - - - - - sdp_marker 0x00128015 1 RW uint32 b[7:0] - - - @@ -697,7 +700,8 @@ number_of_columns = 13 - - - - sdp_source_info_f_adc 0x001e000e 1 RW uint32 b[12:12] - - - - - - - sdp_source_info_nyquist_zone_index 0x001e000f 1 RW uint32 b[14:13] - - - - - - - sdp_source_info_antenna_band_index 0x001e0010 1 RW uint32 b[15:15] - - - - - - - - sdp_station_id 0x001e0011 1 RW uint32 b[15:0] - - - + - - - - sdp_station_info_station_id 0x001e0011 1 RW uint32 b[9:0] - - - + - - - - sdp_station_info_antenna_field_index 0x001e0011 1 RW uint32 b[15:10] - - - - - - - sdp_observation_id 0x001e0012 1 RW uint32 b[31:0] - - - - - - - sdp_version_id 0x001e0013 1 RW uint32 b[7:0] - - - - - - - sdp_marker 0x001e0014 1 RW uint32 b[7:0] - - - @@ -746,7 +750,8 @@ number_of_columns = 13 - - - - sdp_source_info_f_adc 0x0020000f 1 RW uint32 b[12:12] - - - - - - - sdp_source_info_nyquist_zone_index 0x00200010 1 RW uint32 b[14:13] - - - - - - - sdp_source_info_antenna_band_index 0x00200011 1 RW uint32 b[15:15] - - - - - - - - sdp_station_id 0x00200012 1 RW uint32 b[15:0] - - - + - - - - sdp_station_info_station_id 0x00200012 1 RW uint32 b[9:0] - - - + - - - - sdp_station_info_antenna_field_index 0x00200012 1 RW uint32 b[15:10] - - - - - - - sdp_observation_id 0x00200013 1 RW uint32 b[31:0] - - - - - - - sdp_version_id 0x00200014 1 RW uint32 b[7:0] - - - - - - - sdp_marker 0x00200015 1 RW uint32 b[7:0] - - - diff --git a/applications/lofar2/designs/lofar2_unb2b_sdp_station/lofar2_unb2b_sdp_station.mmap.qsys.gold b/applications/lofar2/designs/lofar2_unb2b_sdp_station/lofar2_unb2b_sdp_station.mmap.qsys.gold index 53598b995c..474b918cf6 100644 --- a/applications/lofar2/designs/lofar2_unb2b_sdp_station/lofar2_unb2b_sdp_station.mmap.qsys.gold +++ b/applications/lofar2/designs/lofar2_unb2b_sdp_station/lofar2_unb2b_sdp_station.mmap.qsys.gold @@ -36,10 +36,87 @@ number_of_columns = 13 - - - - stamp_commit 0x00000011 3 RO uint32 b[31:0] - - - - - - - design_note 0x00000014 48 RO char8 b[31:0] b[7:0] - - REG_WDI 1 1 REG wdi_override 0x00000c00 1 WO uint32 b[31:0] - - - - REG_FPGA_TEMP_SENS 1 1 REG temp 0x0004d2b8 1 RO uint32 b[31:0] - - - - REG_FPGA_VOLTAGE_SENS 1 1 REG voltages 0x0004d270 6 RO uint32 b[31:0] - - - + REG_FPGA_TEMP_SENS 1 1 REG temp 0x000512b8 1 RO uint32 b[31:0] - - - + REG_FPGA_VOLTAGE_SENS 1 1 REG voltages 0x00051270 6 RO uint32 b[31:0] - - - RAM_SCRAP 1 1 RAM data 0x00000200 512 RW uint32 b[31:0] - - - - AVS_ETH_0_TSE 1 1 REG registers 0x00000400 1024 RW uint32 b[31:0] - - - + AVS_ETH_0_TSE 1 1 REG rev 0x00000400 1 RO uint32 b[31:0] - - - + - - - - scratch 0x00000404 1 RW uint32 b[31:0] - - - + - - - - command_config 0x00000408 1 RW uint32 b[31:0] - - - + - - - - mac_0 0x0000040c 1 RW uint32 b[31:0] - - - + - - - - mac_1 0x00000410 1 RW uint32 b[31:0] - - - + - - - - frm_length 0x00000414 1 RW uint32 b[31:0] - - - + - - - - pause_quant 0x00000418 1 RW uint32 b[31:0] - - - + - - - - rx_section_empty 0x0000041c 1 RW uint32 b[31:0] - - - + - - - - rx_section_full 0x00000420 1 RW uint32 b[31:0] - - - + - - - - tx_section_empty 0x00000424 1 RW uint32 b[31:0] - - - + - - - - tx_section_full 0x00000428 1 RW uint32 b[31:0] - - - + - - - - rx_almost_empty 0x0000042c 1 RW uint32 b[31:0] - - - + - - - - rx_almost_full 0x00000430 1 RW uint32 b[31:0] - - - + - - - - tx_almost_empty 0x00000434 1 RW uint32 b[31:0] - - - + - - - - tx_almost_full 0x00000438 1 RW uint32 b[31:0] - - - + - - - - mdio_addr0 0x0000043c 1 RW uint32 b[31:0] - - - + - - - - mdio_addr1 0x00000440 1 RW uint32 b[31:0] - - - + - - - - holdoff_quant 0x00000444 1 RW uint32 b[31:0] - - - + - - - - tx_ipg_length 0x0000045c 1 RW uint32 b[31:0] - - - + - - - - amacid 0x00000460 1 RO uint64 b[31:0] b[31:0] - - + - - - - - 0x00000461 - - - b[31:0] b[63:32] - - + - - - - aframestransmittedok 0x00000468 1 RO uint32 b[31:0] - - - + - - - - aframesreceivedok 0x0000046c 1 RO uint32 b[31:0] - - - + - - - - aframechecksequenceerrors 0x00000470 1 RO uint32 b[31:0] - - - + - - - - aalignmenterrors 0x00000474 1 RO uint32 b[31:0] - - - + - - - - aoctetstransmittedok 0x00000478 1 RO uint32 b[31:0] - - - + - - - - aoctetsreceivedok 0x0000047c 1 RO uint32 b[31:0] - - - + - - - - atxpausemacctrlframes 0x00000480 1 RO uint32 b[31:0] - - - + - - - - arxpausemacctrlframes 0x00000484 1 RO uint32 b[31:0] - - - + - - - - ifinerrors 0x00000488 1 RO uint32 b[31:0] - - - + - - - - ifouterrors 0x0000048c 1 RO uint32 b[31:0] - - - + - - - - ifinucastpkts 0x00000490 1 RO uint32 b[31:0] - - - + - - - - ifinmulticastpkts 0x00000494 1 RO uint32 b[31:0] - - - + - - - - ifinbroadcastpkts 0x00000498 1 RO uint32 b[31:0] - - - + - - - - ifoutucastpkts 0x000004a0 1 RO uint32 b[31:0] - - - + - - - - ifoutmulticastpkts 0x000004a4 1 RO uint32 b[31:0] - - - + - - - - ifoutbroadcastpkts 0x000004a8 1 RO uint32 b[31:0] - - - + - - - - etherstatsdropevents 0x000004ac 1 RO uint32 b[31:0] - - - + - - - - etherstatsoctets 0x000004b0 1 RO uint32 b[31:0] - - - + - - - - etherstatspkts 0x000004b4 1 RO uint32 b[31:0] - - - + - - - - etherstatsundersizepkts 0x000004b8 1 RO uint32 b[31:0] - - - + - - - - etherstatsoversizepkts 0x000004bc 1 RO uint32 b[31:0] - - - + - - - - etherstatspkts64octets 0x000004c0 1 RO uint32 b[31:0] - - - + - - - - etherstatspkts65to127octets 0x000004c4 1 RO uint32 b[31:0] - - - + - - - - etherstatspkts128to255octets 0x000004c8 1 RO uint32 b[31:0] - - - + - - - - etherstatspkts256to511octets 0x000004cc 1 RO uint32 b[31:0] - - - + - - - - etherstatspkts512to1023octets 0x000004d0 1 RO uint32 b[31:0] - - - + - - - - etherstatspkts1024to1518octets 0x000004d4 1 RO uint32 b[31:0] - - - + - - - - etherstatspkts1519toxoctets 0x000004d8 1 RO uint32 b[31:0] - - - + - - - - etherstatsjabbers 0x000004dc 1 RO uint32 b[31:0] - - - + - - - - etherstatsfragments 0x000004e0 1 RO uint32 b[31:0] - - - + - - - - tx_cmd_stat 0x000004e8 1 RW uint32 b[31:0] - - - + - - - - rx_cmd_stat 0x000004ec 1 RW uint32 b[31:0] - - - + - - - - msb_aoctetstransmittedok 0x000004f0 1 RO uint32 b[31:0] - - - + - - - - msb_aoctetsreceivedok 0x000004f4 1 RO uint32 b[31:0] - - - + - - - - msb_etherstatsoctets 0x000004f8 1 RO uint32 b[31:0] - - - + - - - - pcs_control 0x00000600 1 RW uint32 b[15:0] - - - + - - - - pcs_status 0x00000604 1 RO uint32 b[15:0] - - - + - - - - pcs_phy_identifier_msb 0x00000608 1 RO uint32 b[15:0] - - - + - - - - pcs_phy_identifier_lsb 0x0000060c 1 RO uint32 b[15:0] - - - + - - - - pcs_dev_ability 0x00000610 1 RW uint32 b[15:0] - - - + - - - - pcs_partner_ability 0x00000614 1 RO uint32 b[15:0] - - - + - - - - pcs_an_expansion 0x00000618 1 RO uint32 b[15:0] - - - + - - - - pcs_scratch 0x00000640 1 RW uint32 b[15:0] - - - + - - - - pcs_rev 0x00000644 1 RO uint32 b[15:0] - - - + - - - - pcs_link_timer_lsb 0x00000648 1 RW uint32 b[15:0] - - - + - - - - pcs_link_timer_msb 0x0000064c 1 RW uint32 b[15:0] - - - + - - - - pcs_if_mode 0x00000650 1 RW uint32 b[15:0] - - - + - - - - tx_period 0x00000740 1 RW uint32 b[31:0] - - - + - - - - tx_adjust_fns 0x00000744 1 RW uint32 b[15:0] - - - + - - - - tx_adjust_ns 0x00000748 1 RW uint32 b[15:0] - - - + - - - - rx_period 0x0000074c 1 RW uint32 b[31:0] - - - + - - - - rx_adjust_fns 0x00000750 1 RW uint32 b[15:0] - - - + - - - - rx_adjust_ns 0x00000754 1 RW uint32 b[15:0] - - - + - - - - measure_valid 0x00000784 1 RO uint32 b[0:0] - - - + - - - - dl_reset 0x00000784 1 RW uint32 b[1:1] - - - + - - - - tx_delay 0x00000788 1 RO uint32 b[20:0] - - - + - - - - rx_delay 0x0000078c 1 RO uint32 b[20:0] - - - AVS_ETH_0_REG 1 1 REG demux 0x00000c10 4 RW uint32 b[16:0] - - - - - - - config_mac_address 0x00000c14 1 RO uint64 b[31:0] b[31:0] - - - - - - - 0x00000c15 - - - b[15:0] b[47:32] - - @@ -68,96 +145,97 @@ number_of_columns = 13 - - - - status_rx_empty 0x00000c1a 1 RO uint32 b[17:16] - - - - - - - status_rx_nof_words 0x00000c1a 1 RO uint32 b[29:18] - - - AVS_ETH_0_RAM 1 1 RAM data 0x00000800 1024 RO uint32 b[31:0] - - - - PIO_PPS 1 1 REG capture_cnt 0x0004d2e8 1 RO uint32 b[29:0] - - - - - - - - stable 0x0004d2e8 1 RO uint32 b[30:30] - - - - - - - - toggle 0x0004d2e8 1 RO uint32 b[31:31] - - - - - - - - expected_cnt 0x0004d2e9 1 RW uint32 b[27:0] - - - - - - - - edge 0x0004d2e9 1 RW uint32 b[31:31] - - - - - - - - offset_cnt 0x0004d2ea 1 RO uint32 b[27:0] - - - - REG_EPCS 1 1 REG addr 0x0004d2c0 1 WO uint32 b[31:0] - - - - - - - - rden 0x0004d2c1 1 WO uint32 b[0:0] - - - - - - - - read_bit 0x0004d2c2 1 WO uint32 b[0:0] - - - - - - - - write_bit 0x0004d2c3 1 WO uint32 b[0:0] - - - - - - - - sector_erase 0x0004d2c4 1 WO uint32 b[0:0] - - - - - - - - busy 0x0004d2c5 1 RO uint32 b[0:0] - - - - - - - - unprotect 0x0004d2c6 1 WO uint32 b[31:0] - - - - REG_DPMM_CTRL 1 1 REG rd_usedw 0x0004d302 1 RO uint32 b[31:0] - - - - REG_DPMM_DATA 1 1 FIFO data 0x0004d300 1 RO uint32 b[31:0] - - - - REG_MMDP_CTRL 1 1 REG wr_usedw 0x0004d2fe 1 RO uint32 b[31:0] - - - - - - - - wr_availw 0x0004d2ff 1 RO uint32 b[31:0] - - - - REG_MMDP_DATA 1 1 FIFO data 0x0004d2fc 1 WO uint32 b[31:0] - - - - REG_REMU 1 1 REG reconfigure 0x0004d2c8 1 WO uint32 b[31:0] - - - - - - - - param 0x0004d2c9 1 WO uint32 b[2:0] - - - - - - - - read_param 0x0004d2ca 1 WO uint32 b[0:0] - - - - - - - - write_param 0x0004d2cb 1 WO uint32 b[0:0] - - - - - - - - data_out 0x0004d2cc 1 RO uint32 b[31:0] - - - - - - - - data_in 0x0004d2cd 1 WO uint32 b[31:0] - - - - - - - - busy 0x0004d2ce 1 RO uint32 b[0:0] - - - - REG_SDP_INFO 1 1 REG block_period 0x0004d260 1 RO uint32 b[15:0] - - - - - - - - beam_repositioning_flag 0x0004d261 1 RW uint32 b[0:0] - - - - - - - - fsub_type 0x0004d262 1 RO uint32 b[0:0] - - - - - - - - f_adc 0x0004d263 1 RO uint32 b[0:0] - - - - - - - - nyquist_zone_index 0x0004d264 1 RW uint32 b[1:0] - - - - - - - - observation_id 0x0004d265 1 RW uint32 b[31:0] - - - - - - - - antenna_band_index 0x0004d266 1 RW uint32 b[0:0] - - - - - - - - station_id 0x0004d267 1 RW uint32 b[15:0] - - - - REG_RING_INFO 1 1 REG use_cable_to_previous_rn 0x0004d2d4 1 RW uint32 b[0:0] - - - - - - - - use_cable_to_next_rn 0x0004d2d5 1 RW uint32 b[0:0] - - - - - - - - n_rn 0x0004d2d6 1 RW uint32 b[7:0] - - - - - - - - o_rn 0x0004d2d7 1 RW uint32 b[7:0] - - - - PIO_JESD_CTRL 1 1 REG disable 0x0004d2f2 1 RW uint32 b[30:0] - - - - - - - - reset 0x0004d2f2 1 RW uint32 b[31:31] - - - - JESD204B 1 12 REG rx_lane_ctrl_common 0x0004c000 1 RW uint32 b[2:0] - - 256 - - - - - rx_lane_ctrl_0 0x0004c001 1 RW uint32 b[2:0] - - - - - - - - rx_lane_ctrl_1 0x0004c002 1 RW uint32 b[2:0] - - - - - - - - rx_lane_ctrl_2 0x0004c003 1 RW uint32 b[2:0] - - - - - - - - rx_lane_ctrl_3 0x0004c004 1 RW uint32 b[2:0] - - - - - - - - rx_lane_ctrl_4 0x0004c005 1 RW uint32 b[2:0] - - - - - - - - rx_lane_ctrl_5 0x0004c006 1 RW uint32 b[2:0] - - - - - - - - rx_lane_ctrl_6 0x0004c007 1 RW uint32 b[2:0] - - - - - - - - rx_lane_ctrl_7 0x0004c008 1 RW uint32 b[2:0] - - - - - - - - rx_dll_ctrl 0x0004c014 1 RW uint32 b[16:0] - - - - - - - - rx_syncn_sysref_ctrl 0x0004c015 1 RW uint32 b[24:0] - - - - - - - - rx_csr_link_reinit 0x0004c015 1 RW uint32 b[0:0] - - - - - - - - rx_csr_sysref_alwayson 0x0004c015 1 RW uint32 b[1:1] - - - - - - - - rx_csr_sysref_singled 0x0004c015 1 RW uint32 b[2:2] - - - - - - - - rx_csr_rbd_offset 0x0004c015 1 RW uint32 b[10:3] - - - - - - - - rx_csr_lmfc_offset 0x0004c015 1 RW uint32 b[19:12] - - - - - - - - ctrl_reserve 0x0004c016 1 RO uint32 b[31:0] - - - - - - - - rx_err0 0x0004c018 1 RW uint32 b[8:0] - - - - - - - - rx_err1 0x0004c019 1 RW uint32 b[9:0] - - - - - - - - rx_err_enable 0x0004c01d 1 RW uint32 b[31:0] - - - - - - - - rx_err_link_reinit 0x0004c01e 1 RW uint32 b[31:0] - - - - - - - - csr_dev_syncn 0x0004c020 1 RO uint32 b[0:0] - - - - - - - - csr_rbd_count 0x0004c020 1 RO uint32 b[10:3] - - - - - - - - rx_status1 0x0004c021 1 RW uint32 b[23:0] - - - - - - - - rx_status2 0x0004c022 1 RW uint32 b[23:0] - - - - - - - - rx_status3 0x0004c023 1 RW uint32 b[7:0] - - - - - - - - rx_ilas_csr_l 0x0004c025 1 RW uint32 b[4:0] - - - - - - - - rx_ilas_csr_f 0x0004c025 1 RW uint32 b[15:8] - - - - - - - - rx_ilas_csr_k 0x0004c025 1 RW uint32 b[20:16] - - - - - - - - rx_ilas_csr_m 0x0004c025 1 RW uint32 b[31:24] - - - - - - - - rx_ilas_csr_n 0x0004c026 1 RW uint32 b[4:0] - - - - - - - - rx_ilas_csr_cs 0x0004c026 1 RW uint32 b[7:6] - - - - - - - - rx_ilas_csr_np 0x0004c026 1 RW uint32 b[12:8] - - - - - - - - rx_ilas_csr_subclassv 0x0004c026 1 RW uint32 b[15:13] - - - - - - - - rx_ilas_csr_s 0x0004c026 1 RW uint32 b[20:16] - - - - - - - - rx_ilas_csr_jesdv 0x0004c026 1 RW uint32 b[23:21] - - - - - - - - rx_ilas_csr_cf 0x0004c026 1 RW uint32 b[28:24] - - - - - - - - rx_ilas_csr_hd 0x0004c026 1 RW uint32 b[31:31] - - - - - - - - rx_status4 0x0004c03c 1 RW uint32 b[15:0] - - - - - - - - rx_status5 0x0004c03d 1 RW uint32 b[15:0] - - - - - - - - rx_status6 0x0004c03e 1 RW uint32 b[23:0] - - - - - - - - rx_status7 0x0004c03f 1 RO uint32 b[31:0] - - - - REG_DP_SHIFTRAM 1 12 REG shift 0x0004d1c0 1 RW uint32 b[11:0] - - 2 - REG_BSN_SOURCE_V2 1 1 REG dp_on 0x0004d2b0 1 RW uint32 b[0:0] - - - - - - - - dp_on_pps 0x0004d2b0 1 RW uint32 b[1:1] - - - - - - - - nof_clk_per_sync 0x0004d2b1 1 RW uint32 b[31:0] - - - - - - - - bsn_init 0x0004d2b2 1 RW uint64 b[31:0] b[31:0] - - - - - - - - 0x0004d2b3 - - - b[31:0] b[63:32] - - - - - - - bsn_time_offset 0x0004d2b4 1 RW uint32 b[9:0] - - - - REG_BSN_SCHEDULER 1 1 REG scheduled_bsn 0x0004d2f8 1 RW uint64 b[31:0] b[31:0] - - - - - - - - 0x0004d2f9 - - - b[31:0] b[63:32] - - + PIO_PPS 1 1 REG capture_cnt 0x000512e8 1 RO uint32 b[29:0] - - - + - - - - stable 0x000512e8 1 RO uint32 b[30:30] - - - + - - - - toggle 0x000512e8 1 RO uint32 b[31:31] - - - + - - - - expected_cnt 0x000512e9 1 RW uint32 b[27:0] - - - + - - - - edge 0x000512e9 1 RW uint32 b[31:31] - - - + - - - - offset_cnt 0x000512ea 1 RO uint32 b[27:0] - - - + REG_EPCS 1 1 REG addr 0x000512c0 1 WO uint32 b[31:0] - - - + - - - - rden 0x000512c1 1 WO uint32 b[0:0] - - - + - - - - read_bit 0x000512c2 1 WO uint32 b[0:0] - - - + - - - - write_bit 0x000512c3 1 WO uint32 b[0:0] - - - + - - - - sector_erase 0x000512c4 1 WO uint32 b[0:0] - - - + - - - - busy 0x000512c5 1 RO uint32 b[0:0] - - - + - - - - unprotect 0x000512c6 1 WO uint32 b[31:0] - - - + REG_DPMM_CTRL 1 1 REG rd_usedw 0x00051302 1 RO uint32 b[31:0] - - - + REG_DPMM_DATA 1 1 FIFO data 0x00051300 1 RO uint32 b[31:0] - - - + REG_MMDP_CTRL 1 1 REG wr_usedw 0x000512fe 1 RO uint32 b[31:0] - - - + - - - - wr_availw 0x000512ff 1 RO uint32 b[31:0] - - - + REG_MMDP_DATA 1 1 FIFO data 0x000512fc 1 WO uint32 b[31:0] - - - + REG_REMU 1 1 REG reconfigure 0x000512c8 1 WO uint32 b[31:0] - - - + - - - - param 0x000512c9 1 WO uint32 b[2:0] - - - + - - - - read_param 0x000512ca 1 WO uint32 b[0:0] - - - + - - - - write_param 0x000512cb 1 WO uint32 b[0:0] - - - + - - - - data_out 0x000512cc 1 RO uint32 b[31:0] - - - + - - - - data_in 0x000512cd 1 WO uint32 b[31:0] - - - + - - - - busy 0x000512ce 1 RO uint32 b[0:0] - - - + REG_SDP_INFO 1 1 REG block_period 0x00051260 1 RO uint32 b[15:0] - - - + - - - - beam_repositioning_flag 0x00051261 1 RW uint32 b[0:0] - - - + - - - - fsub_type 0x00051262 1 RO uint32 b[0:0] - - - + - - - - f_adc 0x00051263 1 RO uint32 b[0:0] - - - + - - - - nyquist_zone_index 0x00051264 1 RW uint32 b[1:0] - - - + - - - - observation_id 0x00051265 1 RW uint32 b[31:0] - - - + - - - - antenna_band_index 0x00051266 1 RW uint32 b[0:0] - - - + - - - - station_id 0x00051267 1 RW uint32 b[9:0] - - - + - - - - antenna_field_index 0x00051268 1 RW uint32 b[5:0] - - - + REG_RING_INFO 1 1 REG use_cable_to_previous_rn 0x000512d4 1 RW uint32 b[0:0] - - - + - - - - use_cable_to_next_rn 0x000512d5 1 RW uint32 b[0:0] - - - + - - - - n_rn 0x000512d6 1 RW uint32 b[7:0] - - - + - - - - o_rn 0x000512d7 1 RW uint32 b[7:0] - - - + PIO_JESD_CTRL 1 1 REG disable 0x000512f2 1 RW uint32 b[30:0] - - - + - - - - reset 0x000512f2 1 RW uint32 b[31:31] - - - + JESD204B 1 12 REG rx_lane_ctrl_common 0x00050000 1 RW uint32 b[2:0] - - 256 + - - - - rx_lane_ctrl_0 0x00050001 1 RW uint32 b[2:0] - - - + - - - - rx_lane_ctrl_1 0x00050002 1 RW uint32 b[2:0] - - - + - - - - rx_lane_ctrl_2 0x00050003 1 RW uint32 b[2:0] - - - + - - - - rx_lane_ctrl_3 0x00050004 1 RW uint32 b[2:0] - - - + - - - - rx_lane_ctrl_4 0x00050005 1 RW uint32 b[2:0] - - - + - - - - rx_lane_ctrl_5 0x00050006 1 RW uint32 b[2:0] - - - + - - - - rx_lane_ctrl_6 0x00050007 1 RW uint32 b[2:0] - - - + - - - - rx_lane_ctrl_7 0x00050008 1 RW uint32 b[2:0] - - - + - - - - rx_dll_ctrl 0x00050014 1 RW uint32 b[16:0] - - - + - - - - rx_syncn_sysref_ctrl 0x00050015 1 RW uint32 b[24:0] - - - + - - - - rx_csr_link_reinit 0x00050015 1 RW uint32 b[0:0] - - - + - - - - rx_csr_sysref_alwayson 0x00050015 1 RW uint32 b[1:1] - - - + - - - - rx_csr_sysref_singled 0x00050015 1 RW uint32 b[2:2] - - - + - - - - rx_csr_rbd_offset 0x00050015 1 RW uint32 b[10:3] - - - + - - - - rx_csr_lmfc_offset 0x00050015 1 RW uint32 b[19:12] - - - + - - - - ctrl_reserve 0x00050016 1 RO uint32 b[31:0] - - - + - - - - rx_err0 0x00050018 1 RW uint32 b[8:0] - - - + - - - - rx_err1 0x00050019 1 RW uint32 b[9:0] - - - + - - - - rx_err_enable 0x0005001d 1 RW uint32 b[31:0] - - - + - - - - rx_err_link_reinit 0x0005001e 1 RW uint32 b[31:0] - - - + - - - - csr_dev_syncn 0x00050020 1 RO uint32 b[0:0] - - - + - - - - csr_rbd_count 0x00050020 1 RO uint32 b[10:3] - - - + - - - - rx_status1 0x00050021 1 RW uint32 b[23:0] - - - + - - - - rx_status2 0x00050022 1 RW uint32 b[23:0] - - - + - - - - rx_status3 0x00050023 1 RW uint32 b[7:0] - - - + - - - - rx_ilas_csr_l 0x00050025 1 RW uint32 b[4:0] - - - + - - - - rx_ilas_csr_f 0x00050025 1 RW uint32 b[15:8] - - - + - - - - rx_ilas_csr_k 0x00050025 1 RW uint32 b[20:16] - - - + - - - - rx_ilas_csr_m 0x00050025 1 RW uint32 b[31:24] - - - + - - - - rx_ilas_csr_n 0x00050026 1 RW uint32 b[4:0] - - - + - - - - rx_ilas_csr_cs 0x00050026 1 RW uint32 b[7:6] - - - + - - - - rx_ilas_csr_np 0x00050026 1 RW uint32 b[12:8] - - - + - - - - rx_ilas_csr_subclassv 0x00050026 1 RW uint32 b[15:13] - - - + - - - - rx_ilas_csr_s 0x00050026 1 RW uint32 b[20:16] - - - + - - - - rx_ilas_csr_jesdv 0x00050026 1 RW uint32 b[23:21] - - - + - - - - rx_ilas_csr_cf 0x00050026 1 RW uint32 b[28:24] - - - + - - - - rx_ilas_csr_hd 0x00050026 1 RW uint32 b[31:31] - - - + - - - - rx_status4 0x0005003c 1 RW uint32 b[15:0] - - - + - - - - rx_status5 0x0005003d 1 RW uint32 b[15:0] - - - + - - - - rx_status6 0x0005003e 1 RW uint32 b[23:0] - - - + - - - - rx_status7 0x0005003f 1 RO uint32 b[31:0] - - - + REG_DP_SHIFTRAM 1 12 REG shift 0x000511c0 1 RW uint32 b[11:0] - - 2 + REG_BSN_SOURCE_V2 1 1 REG dp_on 0x000512b0 1 RW uint32 b[0:0] - - - + - - - - dp_on_pps 0x000512b0 1 RW uint32 b[1:1] - - - + - - - - nof_clk_per_sync 0x000512b1 1 RW uint32 b[31:0] - - - + - - - - bsn_init 0x000512b2 1 RW uint64 b[31:0] b[31:0] - - + - - - - - 0x000512b3 - - - b[31:0] b[63:32] - - + - - - - bsn_time_offset 0x000512b4 1 RW uint32 b[9:0] - - - + REG_BSN_SCHEDULER 1 1 REG scheduled_bsn 0x000512f8 1 RW uint64 b[31:0] b[31:0] - - + - - - - - 0x000512f9 - - - b[31:0] b[63:32] - - REG_BSN_MONITOR_INPUT 1 1 REG xon_stable 0x00000100 1 RO uint32 b[0:0] - - - - - - - ready_stable 0x00000100 1 RO uint32 b[1:1] - - - - - - - sync_timeout 0x00000100 1 RO uint32 b[2:2] - - - @@ -169,27 +247,28 @@ number_of_columns = 13 - - - - bsn_first 0x00000106 1 RO uint64 b[31:0] b[31:0] - - - - - - - 0x00000107 - - - b[31:0] b[63:32] - - - - - - bsn_first_cycle_cnt 0x00000108 1 RO uint32 b[31:0] - - - - REG_WG 1 12 REG mode 0x0004d080 1 RW uint32 b[7:0] - - 4 - - - - - nof_samples 0x0004d080 1 RW uint32 b[31:16] - - - - - - - - phase 0x0004d081 1 RW uint32 b[15:0] - - - - - - - - freq 0x0004d082 1 RW uint32 b[30:0] - - - - - - - - ampl 0x0004d083 1 RW uint32 b[16:0] - - - - RAM_WG 1 12 RAM data 0x00048000 1024 RW uint32 b[17:0] - - 1024 + REG_WG 1 12 REG mode 0x00051080 1 RW uint32 b[7:0] - - 4 + - - - - nof_samples 0x00051080 1 RW uint32 b[31:16] - - - + - - - - phase 0x00051081 1 RW uint32 b[15:0] - - - + - - - - freq 0x00051082 1 RW uint32 b[30:0] - - - + - - - - ampl 0x00051083 1 RW uint32 b[16:0] - - - + RAM_WG 1 12 RAM data 0x0004c000 1024 RW uint32 b[17:0] - - 1024 RAM_ST_HISTOGRAM 1 12 RAM data 0x00002000 512 RW uint32 b[31:0] b[27:0] - 512 - REG_ADUH_MONITOR 1 12 REG mean_sum 0x0004d0c0 1 RO int64 b[31:0] b[31:0] - 4 - - - - - - 0x0004d0c1 - - - b[31:0] b[63:32] - - - - - - - power_sum 0x0004d0c2 1 RO int64 b[31:0] b[31:0] - - - - - - - - 0x0004d0c3 - - - b[31:0] b[63:32] - - - REG_DIAG_DATA_BUFFER_BSN 1 12 REG sync_cnt 0x0004d1a0 1 RO uint32 b[31:0] - - 2 - - - - - word_cnt 0x0004d1a1 1 RO uint32 b[31:0] - - - + REG_ADUH_MONITOR 1 12 REG mean_sum 0x000510c0 1 RO int64 b[31:0] b[31:0] - 4 + - - - - - 0x000510c1 - - - b[31:0] b[63:32] - - + - - - - power_sum 0x000510c2 1 RO int64 b[31:0] b[31:0] - - + - - - - - 0x000510c3 - - - b[31:0] b[63:32] - - + REG_DIAG_DATA_BUFFER_BSN 1 12 REG sync_cnt 0x000511a0 1 RO uint32 b[31:0] - - 2 + - - - - word_cnt 0x000511a1 1 RO uint32 b[31:0] - - - RAM_DIAG_DATA_BUFFER_BSN 1 12 RAM data 0x00200000 1024 RW uint32 b[31:0] b[15:0] - 1024 - REG_SI 1 1 REG enable 0x0004d2fa 1 RW uint32 b[11:0] - - - + REG_SI 1 1 REG enable 0x000512fa 1 RW uint32 b[11:0] - - - RAM_FIL_COEFS 2 16 RAM data 0x00030000 1024 RW uint32 b[15:0] - 16384 1024 - RAM_EQUALIZER_GAINS 1 12 RAM data 0x00040000 1024 RW cint16_ir b[31:0] - - 1024 - REG_DP_SELECTOR 1 1 REG input_select 0x0004d2f6 1 RW uint32 b[0:0] - - - + RAM_EQUALIZER_GAINS 1 12 RAM data 0x00044000 1024 RW cint16_ir b[31:0] - - 1024 + RAM_EQUALIZER_GAINS_CROSS 1 12 RAM data 0x00040000 1024 RW cint16_ir b[31:0] - - 1024 + REG_DP_SELECTOR 1 1 REG input_select 0x000512f6 1 RW uint32 b[0:0] - - - RAM_ST_SST 1 12 RAM data 0x00038000 1024 RW uint64 b[31:0] b[31:0] - 2048 - - - - - 0x00038001 - - - b[21:0] b[53:32] - - - REG_STAT_ENABLE_SST 1 1 REG enable 0x0004d2f0 1 RW uint32 b[0:0] - - - + REG_STAT_ENABLE_SST 1 1 REG enable 0x000512f0 1 RW uint32 b[0:0] - - - REG_STAT_HDR_DAT_SST 1 1 REG bsn 0x00000c40 1 RW uint64 b[31:0] b[31:0] - - - - - - - 0x00000c41 - - - b[31:0] b[63:32] - - - - - - sdp_block_period 0x00000c42 1 RW uint32 b[15:0] - - - @@ -210,7 +289,8 @@ number_of_columns = 13 - - - - sdp_source_info_f_adc 0x00000c4f 1 RW uint32 b[12:12] - - - - - - - sdp_source_info_nyquist_zone_index 0x00000c50 1 RW uint32 b[14:13] - - - - - - - sdp_source_info_antenna_band_index 0x00000c51 1 RW uint32 b[15:15] - - - - - - - - sdp_station_id 0x00000c52 1 RW uint32 b[15:0] - - - + - - - - sdp_station_info_station_id 0x00000c52 1 RW uint32 b[9:0] - - - + - - - - sdp_station_info_antenna_field_index 0x00000c52 1 RW uint32 b[15:10] - - - - - - - sdp_observation_id 0x00000c53 1 RW uint32 b[31:0] - - - - - - - sdp_version_id 0x00000c54 1 RW uint32 b[7:0] - - - - - - - sdp_marker 0x00000c55 1 RW uint32 b[7:0] - - - @@ -236,36 +316,36 @@ number_of_columns = 13 - - - - eth_destination_mac 0x00000c69 1 RW uint64 b[31:0] b[31:0] - - - - - - - 0x00000c6a - - - b[15:0] b[47:32] - - - - - - word_align 0x00000c6b 1 RW uint32 b[15:0] - - - - REG_BSN_MONITOR_V2_SST_OFFLOAD 1 1 REG xon_stable 0x0004d290 1 RO uint32 b[0:0] - - - - - - - - ready_stable 0x0004d290 1 RO uint32 b[1:1] - - - - - - - - sync_timeout 0x0004d290 1 RO uint32 b[2:2] - - - - - - - - bsn_at_sync 0x0004d291 1 RO uint64 b[31:0] b[31:0] - - - - - - - - 0x0004d292 - - - b[31:0] b[63:32] - - - - - - - nof_sop 0x0004d293 1 RO uint32 b[31:0] - - - - - - - - nof_valid 0x0004d294 1 RO uint32 b[31:0] - - - - - - - - nof_err 0x0004d295 1 RO uint32 b[31:0] - - - - - - - - latency 0x0004d296 1 RO uint32 b[31:0] - - - - REG_BSN_SYNC_SCHEDULER_XSUB 1 1 REG ctrl_enable 0x0004d240 1 RW uint32 b[0:0] - - - - - - - - ctrl_interval_size 0x0004d241 1 RW uint32 b[30:0] - - - - - - - - ctrl_start_bsn 0x0004d242 1 RW uint64 b[31:0] b[31:0] - - - - - - - - 0x0004d243 - - - b[31:0] b[63:32] - - - - - - - mon_current_input_bsn 0x0004d244 1 RO uint64 b[31:0] b[31:0] - - - - - - - - 0x0004d245 - - - b[31:0] b[63:32] - - - - - - - mon_input_bsn_at_sync 0x0004d246 1 RO uint64 b[31:0] b[31:0] - - - - - - - - 0x0004d247 - - - b[31:0] b[63:32] - - - - - - - mon_output_enable 0x0004d248 1 RO uint32 b[0:0] - - - - - - - - mon_output_sync_bsn 0x0004d249 1 RO uint64 b[31:0] b[31:0] - - - - - - - - 0x0004d24a - - - b[31:0] b[63:32] - - - - - - - block_size 0x0004d24b 1 RO uint32 b[31:0] - - - + REG_BSN_MONITOR_V2_SST_OFFLOAD 1 1 REG xon_stable 0x00051290 1 RO uint32 b[0:0] - - - + - - - - ready_stable 0x00051290 1 RO uint32 b[1:1] - - - + - - - - sync_timeout 0x00051290 1 RO uint32 b[2:2] - - - + - - - - bsn_at_sync 0x00051291 1 RO uint64 b[31:0] b[31:0] - - + - - - - - 0x00051292 - - - b[31:0] b[63:32] - - + - - - - nof_sop 0x00051293 1 RO uint32 b[31:0] - - - + - - - - nof_valid 0x00051294 1 RO uint32 b[31:0] - - - + - - - - nof_err 0x00051295 1 RO uint32 b[31:0] - - - + - - - - latency 0x00051296 1 RO uint32 b[31:0] - - - + REG_BSN_SYNC_SCHEDULER_XSUB 1 1 REG ctrl_enable 0x00051240 1 RW uint32 b[0:0] - - - + - - - - ctrl_interval_size 0x00051241 1 RW uint32 b[30:0] - - - + - - - - ctrl_start_bsn 0x00051242 1 RW uint64 b[31:0] b[31:0] - - + - - - - - 0x00051243 - - - b[31:0] b[63:32] - - + - - - - mon_current_input_bsn 0x00051244 1 RO uint64 b[31:0] b[31:0] - - + - - - - - 0x00051245 - - - b[31:0] b[63:32] - - + - - - - mon_input_bsn_at_sync 0x00051246 1 RO uint64 b[31:0] b[31:0] - - + - - - - - 0x00051247 - - - b[31:0] b[63:32] - - + - - - - mon_output_enable 0x00051248 1 RO uint32 b[0:0] - - - + - - - - mon_output_sync_bsn 0x00051249 1 RO uint64 b[31:0] b[31:0] - - + - - - - - 0x0005124a - - - b[31:0] b[63:32] - - + - - - - block_size 0x0005124b 1 RO uint32 b[31:0] - - - RAM_ST_XSQ 1 9 RAM data 0x00010000 1008 RW cint64_ir b[31:0] b[31:0] - 4096 - - - - - 0x00010001 - - - b[31:0] b[63:32] - - - - - - - 0x00010002 - - - b[31:0] b[95:64] - - - - - - - 0x00010003 - - - b[31:0] b[127:96] - - - REG_CROSSLETS_INFO 1 1 REG offset 0x0004d250 15 RW uint32 b[31:0] - - - - - - - - step 0x0004d25f 1 RW uint32 b[31:0] - - - - REG_NOF_CROSSLETS 1 1 REG nof_crosslets 0x0004d2ec 1 RW uint32 b[31:0] - - - - - - - - unused 0x0004d2ed 1 RW uint32 b[31:0] - - - - REG_STAT_ENABLE_XST 1 1 REG enable 0x0004d2ee 1 RW uint32 b[0:0] - - - + REG_CROSSLETS_INFO 1 1 REG offset 0x00051250 15 RW uint32 b[31:0] - - - + - - - - step 0x0005125f 1 RW uint32 b[31:0] - - - + REG_NOF_CROSSLETS 1 1 REG nof_crosslets 0x000512ec 1 RW uint32 b[31:0] - - - + - - - - unused 0x000512ed 1 RW uint32 b[31:0] - - - + REG_STAT_ENABLE_XST 1 1 REG enable 0x000512ee 1 RW uint32 b[0:0] - - - REG_STAT_HDR_DAT_XST 1 1 REG bsn 0x00000040 1 RW uint64 b[31:0] b[31:0] - - - - - - - 0x00000041 - - - b[31:0] b[63:32] - - - - - - block_period 0x00000042 1 RW uint32 b[15:0] - - - @@ -288,7 +368,8 @@ number_of_columns = 13 - - - - sdp_source_info_f_adc 0x0000004f 1 RW uint32 b[12:12] - - - - - - - sdp_source_info_nyquist_zone_index 0x00000050 1 RW uint32 b[14:13] - - - - - - - sdp_source_info_antenna_band_index 0x00000051 1 RW uint32 b[15:15] - - - - - - - - sdp_station_id 0x00000052 1 RW uint32 b[15:0] - - - + - - - - sdp_station_info_station_id 0x00000052 1 RW uint32 b[9:0] - - - + - - - - sdp_station_info_antenna_field_index 0x00000052 1 RW uint32 b[15:10] - - - - - - - sdp_observation_id 0x00000053 1 RW uint32 b[31:0] - - - - - - - sdp_version_id 0x00000054 1 RW uint32 b[7:0] - - - - - - - sdp_marker 0x00000055 1 RW uint32 b[7:0] - - - @@ -314,8 +395,8 @@ number_of_columns = 13 - - - - eth_destination_mac 0x00000069 1 RW uint64 b[31:0] b[31:0] - - - - - - - 0x0000006a - - - b[15:0] b[47:32] - - - - - - word_align 0x0000006b 1 RW uint32 b[15:0] - - - - REG_BSN_ALIGN_V2_XSUB 1 9 REG enable 0x0004d180 1 RW uint32 b[0:0] - - 2 - - - - - replaced_pkt_cnt 0x0004d181 1 RO uint32 b[31:0] - - - + REG_BSN_ALIGN_V2_XSUB 1 9 REG enable 0x00051180 1 RW uint32 b[0:0] - - 2 + - - - - replaced_pkt_cnt 0x00051181 1 RO uint32 b[31:0] - - - REG_BSN_MONITOR_V2_RX_ALIGN_XSUB 1 9 REG xon_stable 0x00000d00 1 RO uint32 b[0:0] - - 8 - - - - ready_stable 0x00000d00 1 RO uint32 b[1:1] - - - - - - - sync_timeout 0x00000d00 1 RO uint32 b[2:2] - - - @@ -325,24 +406,24 @@ number_of_columns = 13 - - - - nof_valid 0x00000d04 1 RO uint32 b[31:0] - - - - - - - nof_err 0x00000d05 1 RO uint32 b[31:0] - - - - - - - latency 0x00000d06 1 RO uint32 b[31:0] - - - - REG_BSN_MONITOR_V2_ALIGNED_XSUB 1 1 REG xon_stable 0x0004d2a8 1 RO uint32 b[0:0] - - - - - - - - ready_stable 0x0004d2a8 1 RO uint32 b[1:1] - - - - - - - - sync_timeout 0x0004d2a8 1 RO uint32 b[2:2] - - - - - - - - bsn_at_sync 0x0004d2a9 1 RO uint64 b[31:0] b[31:0] - - - - - - - - 0x0004d2aa - - - b[31:0] b[63:32] - - - - - - - nof_sop 0x0004d2ab 1 RO uint32 b[31:0] - - - - - - - - nof_valid 0x0004d2ac 1 RO uint32 b[31:0] - - - - - - - - nof_err 0x0004d2ad 1 RO uint32 b[31:0] - - - - - - - - latency 0x0004d2ae 1 RO uint32 b[31:0] - - - - REG_BSN_MONITOR_V2_XST_OFFLOAD 1 1 REG xon_stable 0x0004d2a0 1 RO uint32 b[0:0] - - - - - - - - ready_stable 0x0004d2a0 1 RO uint32 b[1:1] - - - - - - - - sync_timeout 0x0004d2a0 1 RO uint32 b[2:2] - - - - - - - - bsn_at_sync 0x0004d2a1 1 RO uint64 b[31:0] b[31:0] - - - - - - - - 0x0004d2a2 - - - b[31:0] b[63:32] - - - - - - - nof_sop 0x0004d2a3 1 RO uint32 b[31:0] - - - - - - - - nof_valid 0x0004d2a4 1 RO uint32 b[31:0] - - - - - - - - nof_err 0x0004d2a5 1 RO uint32 b[31:0] - - - - - - - - latency 0x0004d2a6 1 RO uint32 b[31:0] - - - + REG_BSN_MONITOR_V2_ALIGNED_XSUB 1 1 REG xon_stable 0x000512a8 1 RO uint32 b[0:0] - - - + - - - - ready_stable 0x000512a8 1 RO uint32 b[1:1] - - - + - - - - sync_timeout 0x000512a8 1 RO uint32 b[2:2] - - - + - - - - bsn_at_sync 0x000512a9 1 RO uint64 b[31:0] b[31:0] - - + - - - - - 0x000512aa - - - b[31:0] b[63:32] - - + - - - - nof_sop 0x000512ab 1 RO uint32 b[31:0] - - - + - - - - nof_valid 0x000512ac 1 RO uint32 b[31:0] - - - + - - - - nof_err 0x000512ad 1 RO uint32 b[31:0] - - - + - - - - latency 0x000512ae 1 RO uint32 b[31:0] - - - + REG_BSN_MONITOR_V2_XST_OFFLOAD 1 1 REG xon_stable 0x000512a0 1 RO uint32 b[0:0] - - - + - - - - ready_stable 0x000512a0 1 RO uint32 b[1:1] - - - + - - - - sync_timeout 0x000512a0 1 RO uint32 b[2:2] - - - + - - - - bsn_at_sync 0x000512a1 1 RO uint64 b[31:0] b[31:0] - - + - - - - - 0x000512a2 - - - b[31:0] b[63:32] - - + - - - - nof_sop 0x000512a3 1 RO uint32 b[31:0] - - - + - - - - nof_valid 0x000512a4 1 RO uint32 b[31:0] - - - + - - - - nof_err 0x000512a5 1 RO uint32 b[31:0] - - - + - - - - latency 0x000512a6 1 RO uint32 b[31:0] - - - REG_RING_LANE_INFO_XST 1 1 REG lane_direction 0x00000c02 1 RO uint32 b[0:0] - - - - - - - transport_nof_hops 0x00000c03 1 RW uint32 b[31:0] - - - REG_BSN_MONITOR_V2_RING_RX_XST 1 16 REG xon_stable 0x00000c80 1 RO uint32 b[0:0] - - 8 @@ -363,14 +444,14 @@ number_of_columns = 13 - - - - nof_valid 0x00000084 1 RO uint32 b[31:0] - - - - - - - nof_err 0x00000085 1 RO uint32 b[31:0] - - - - - - - latency 0x00000086 1 RO uint32 b[31:0] - - - - REG_DP_BLOCK_VALIDATE_ERR_XST 1 1 REG err_count_index 0x0004d230 8 RO uint32 b[31:0] - - - - - - - - total_discarded_blocks 0x0004d238 1 RO uint32 b[31:0] - - - - - - - - total_block_count 0x0004d239 1 RO uint64 b[31:0] b[31:0] - - - - - - - - 0x0004d23a - - - b[31:0] b[63:32] - - - - - - - clear 0x0004d23b 1 RW uint32 b[31:0] - - - - REG_DP_BLOCK_VALIDATE_BSN_AT_SYNC_XST 1 1 REG nof_sync_discarded 0x0004d2d8 1 RO uint32 b[31:0] - - - - - - - - nof_sync 0x0004d2d9 1 RO uint32 b[31:0] - - - - - - - - clear 0x0004d2da 1 RW uint32 b[31:0] - - - + REG_DP_BLOCK_VALIDATE_ERR_XST 1 1 REG err_count_index 0x00051230 8 RO uint32 b[31:0] - - - + - - - - total_discarded_blocks 0x00051238 1 RO uint32 b[31:0] - - - + - - - - total_block_count 0x00051239 1 RO uint64 b[31:0] b[31:0] - - + - - - - - 0x0005123a - - - b[31:0] b[63:32] - - + - - - - clear 0x0005123b 1 RW uint32 b[31:0] - - - + REG_DP_BLOCK_VALIDATE_BSN_AT_SYNC_XST 1 1 REG nof_sync_discarded 0x000512d8 1 RO uint32 b[31:0] - - - + - - - - nof_sync 0x000512d9 1 RO uint32 b[31:0] - - - + - - - - clear 0x000512da 1 RW uint32 b[31:0] - - - REG_TR_10GBE_MAC 1 3 REG rx_transfer_control 0x00028000 1 RW uint32 b[0:0] - - 1 - - - - rx_transfer_status 0x00028001 1 RO uint32 b[0:0] - - - - - - - tx_transfer_control 0x00028002 1 RW uint32 b[0:0] - - - @@ -547,13 +628,13 @@ number_of_columns = 13 - - - - - 0x00029c3b - - - b[31:0] b[31:0] - - - - - - tx_stats_pfcmacctrlframes 0x00029c3c 1 RO uint64 b[3:0] b[35:32] - - - - - - - 0x00029c3d - - - b[31:0] b[31:0] - - - REG_TR_10GBE_ETH10G 1 3 REG tx_snk_out_xon 0x0004d298 1 RO uint32 b[0:0] - - 1 - - - - - xgmii_tx_ready 0x0004d298 1 RO uint32 b[1:1] - - - - - - - - xgmii_link_status 0x0004d298 1 RO uint32 b[3:2] - - - - RAM_SS_SS_WIDE 2 6 RAM data 0x00044000 976 RW uint32 b[9:0] - 8192 1024 + REG_TR_10GBE_ETH10G 1 3 REG tx_snk_out_xon 0x00051298 1 RO uint32 b[0:0] - - 1 + - - - - xgmii_tx_ready 0x00051298 1 RO uint32 b[1:1] - - - + - - - - xgmii_link_status 0x00051298 1 RO uint32 b[3:2] - - - + RAM_SS_SS_WIDE 2 6 RAM data 0x00048000 976 RW uint32 b[9:0] - 8192 1024 RAM_BF_WEIGHTS 2 12 RAM data 0x00020000 976 RW cint16_ir b[31:0] - 16384 1024 - REG_BSN_ALIGN_V2_BF 2 2 REG enable 0x0004d288 1 RW uint32 b[0:0] - 4 2 - - - - - replaced_pkt_cnt 0x0004d289 1 RO uint32 b[31:0] - - - + REG_BSN_ALIGN_V2_BF 2 2 REG enable 0x00051288 1 RW uint32 b[0:0] - 4 2 + - - - - replaced_pkt_cnt 0x00051289 1 RO uint32 b[31:0] - - - REG_BSN_MONITOR_V2_RX_ALIGN_BF 2 2 REG xon_stable 0x00000c20 1 RO uint32 b[0:0] - 16 8 - - - - ready_stable 0x00000c20 1 RO uint32 b[1:1] - - - - - - - sync_timeout 0x00000c20 1 RO uint32 b[2:2] - - - @@ -563,91 +644,92 @@ number_of_columns = 13 - - - - nof_valid 0x00000c24 1 RO uint32 b[31:0] - - - - - - - nof_err 0x00000c25 1 RO uint32 b[31:0] - - - - - - - latency 0x00000c26 1 RO uint32 b[31:0] - - - - REG_BSN_MONITOR_V2_ALIGNED_BF 2 1 REG xon_stable 0x0004d200 1 RO uint32 b[0:0] - 8 8 - - - - - ready_stable 0x0004d200 1 RO uint32 b[1:1] - - - - - - - - sync_timeout 0x0004d200 1 RO uint32 b[2:2] - - - - - - - - bsn_at_sync 0x0004d201 1 RO uint64 b[31:0] b[31:0] - - - - - - - - 0x0004d202 - - - b[31:0] b[63:32] - - - - - - - nof_sop 0x0004d203 1 RO uint32 b[31:0] - - - - - - - - nof_valid 0x0004d204 1 RO uint32 b[31:0] - - - - - - - - nof_err 0x0004d205 1 RO uint32 b[31:0] - - - - - - - - latency 0x0004d206 1 RO uint32 b[31:0] - - - - REG_RING_LANE_INFO_BF 2 1 REG lane_direction 0x0004d2d0 1 RO uint32 b[0:0] - 2 2 - - - - - transport_nof_hops 0x0004d2d1 1 RW uint32 b[31:0] - - - - REG_BSN_MONITOR_V2_RING_RX_BF 2 1 REG xon_stable 0x0004d1f0 1 RO uint32 b[0:0] - 8 8 - - - - - ready_stable 0x0004d1f0 1 RO uint32 b[1:1] - - - - - - - - sync_timeout 0x0004d1f0 1 RO uint32 b[2:2] - - - - - - - - bsn_at_sync 0x0004d1f1 1 RO uint64 b[31:0] b[31:0] - - - - - - - - 0x0004d1f2 - - - b[31:0] b[63:32] - - - - - - - nof_sop 0x0004d1f3 1 RO uint32 b[31:0] - - - - - - - - nof_valid 0x0004d1f4 1 RO uint32 b[31:0] - - - - - - - - nof_err 0x0004d1f5 1 RO uint32 b[31:0] - - - - - - - - latency 0x0004d1f6 1 RO uint32 b[31:0] - - - - REG_BSN_MONITOR_V2_RING_TX_BF 2 1 REG xon_stable 0x0004d1e0 1 RO uint32 b[0:0] - 8 8 - - - - - ready_stable 0x0004d1e0 1 RO uint32 b[1:1] - - - - - - - - sync_timeout 0x0004d1e0 1 RO uint32 b[2:2] - - - - - - - - bsn_at_sync 0x0004d1e1 1 RO uint64 b[31:0] b[31:0] - - - - - - - - 0x0004d1e2 - - - b[31:0] b[63:32] - - - - - - - nof_sop 0x0004d1e3 1 RO uint32 b[31:0] - - - - - - - - nof_valid 0x0004d1e4 1 RO uint32 b[31:0] - - - - - - - - nof_err 0x0004d1e5 1 RO uint32 b[31:0] - - - - - - - - latency 0x0004d1e6 1 RO uint32 b[31:0] - - - + REG_BSN_MONITOR_V2_ALIGNED_BF 2 1 REG xon_stable 0x00051200 1 RO uint32 b[0:0] - 8 8 + - - - - ready_stable 0x00051200 1 RO uint32 b[1:1] - - - + - - - - sync_timeout 0x00051200 1 RO uint32 b[2:2] - - - + - - - - bsn_at_sync 0x00051201 1 RO uint64 b[31:0] b[31:0] - - + - - - - - 0x00051202 - - - b[31:0] b[63:32] - - + - - - - nof_sop 0x00051203 1 RO uint32 b[31:0] - - - + - - - - nof_valid 0x00051204 1 RO uint32 b[31:0] - - - + - - - - nof_err 0x00051205 1 RO uint32 b[31:0] - - - + - - - - latency 0x00051206 1 RO uint32 b[31:0] - - - + REG_RING_LANE_INFO_BF 2 1 REG lane_direction 0x000512d0 1 RO uint32 b[0:0] - 2 2 + - - - - transport_nof_hops 0x000512d1 1 RW uint32 b[31:0] - - - + REG_BSN_MONITOR_V2_RING_RX_BF 2 1 REG xon_stable 0x000511f0 1 RO uint32 b[0:0] - 8 8 + - - - - ready_stable 0x000511f0 1 RO uint32 b[1:1] - - - + - - - - sync_timeout 0x000511f0 1 RO uint32 b[2:2] - - - + - - - - bsn_at_sync 0x000511f1 1 RO uint64 b[31:0] b[31:0] - - + - - - - - 0x000511f2 - - - b[31:0] b[63:32] - - + - - - - nof_sop 0x000511f3 1 RO uint32 b[31:0] - - - + - - - - nof_valid 0x000511f4 1 RO uint32 b[31:0] - - - + - - - - nof_err 0x000511f5 1 RO uint32 b[31:0] - - - + - - - - latency 0x000511f6 1 RO uint32 b[31:0] - - - + REG_BSN_MONITOR_V2_RING_TX_BF 2 1 REG xon_stable 0x000511e0 1 RO uint32 b[0:0] - 8 8 + - - - - ready_stable 0x000511e0 1 RO uint32 b[1:1] - - - + - - - - sync_timeout 0x000511e0 1 RO uint32 b[2:2] - - - + - - - - bsn_at_sync 0x000511e1 1 RO uint64 b[31:0] b[31:0] - - + - - - - - 0x000511e2 - - - b[31:0] b[63:32] - - + - - - - nof_sop 0x000511e3 1 RO uint32 b[31:0] - - - + - - - - nof_valid 0x000511e4 1 RO uint32 b[31:0] - - - + - - - - nof_err 0x000511e5 1 RO uint32 b[31:0] - - - + - - - - latency 0x000511e6 1 RO uint32 b[31:0] - - - REG_DP_BLOCK_VALIDATE_ERR_BF 2 1 REG err_count_index 0x00000020 8 RO uint32 b[31:0] - 16 16 - - - - total_discarded_blocks 0x00000028 1 RO uint32 b[31:0] - - - - - - - total_block_count 0x00000029 1 RO uint64 b[31:0] b[31:0] - - - - - - - 0x0000002a - - - b[31:0] b[63:32] - - - - - - clear 0x0000002b 1 RW uint32 b[31:0] - - - - REG_DP_BLOCK_VALIDATE_BSN_AT_SYNC_BF 2 1 REG nof_sync_discarded 0x0004d280 1 RO uint32 b[31:0] - 4 4 - - - - - nof_sync 0x0004d281 1 RO uint32 b[31:0] - - - - - - - - clear 0x0004d282 1 RW uint32 b[31:0] - - - - REG_BF_SCALE 2 1 REG scale 0x0004d2e4 1 RW uint32 b[15:0] - 2 2 - - - - - unused 0x0004d2e5 1 RW uint32 b[31:0] - - - - REG_HDR_DAT 2 1 REG bsn 0x0004d000 1 RW uint64 b[31:0] b[31:0] 64 64 - - - - - - 0x0004d001 - - - b[31:0] b[63:32] - - - - - - - sdp_block_period 0x0004d002 1 RW uint32 b[15:0] - - - - - - - - sdp_nof_beamlets_per_block 0x0004d003 1 RW uint32 b[15:0] - - - - - - - - sdp_nof_blocks_per_packet 0x0004d004 1 RW uint32 b[7:0] - - - - - - - - sdp_beamlet_index 0x0004d005 1 RW uint32 b[15:0] - - - - - - - - sdp_beamlet_scale 0x0004d006 1 RW uint32 b[15:0] - - - - - - - - sdp_reserved 0x0004d007 1 RW uint64 b[31:0] b[31:0] - - - - - - - - 0x0004d008 - - - b[7:0] b[39:32] - - - - - - - sdp_source_info_gn_index 0x0004d009 1 RW uint32 b[4:0] - - - - - - - - sdp_source_info_beamlet_width 0x0004d00a 1 RW uint32 b[7:5] - - - - - - - - sdp_source_info_repositioning_flag 0x0004d00b 1 RW uint32 b[9:9] - - - - - - - - sdp_source_info_payload_error 0x0004d00c 1 RW uint32 b[10:10] - - - - - - - - sdp_source_info_fsub_type 0x0004d00d 1 RW uint32 b[11:11] - - - - - - - - sdp_source_info_f_adc 0x0004d00e 1 RW uint32 b[12:12] - - - - - - - - sdp_source_info_nyquist_zone_index 0x0004d00f 1 RW uint32 b[14:13] - - - - - - - - sdp_source_info_antenna_band_index 0x0004d010 1 RW uint32 b[15:15] - - - - - - - - sdp_station_id 0x0004d011 1 RW uint32 b[15:0] - - - - - - - - sdp_observation_id 0x0004d012 1 RW uint32 b[31:0] - - - - - - - - sdp_version_id 0x0004d013 1 RW uint32 b[7:0] - - - - - - - - sdp_marker 0x0004d014 1 RW uint32 b[7:0] - - - - - - - - udp_checksum 0x0004d015 1 RW uint32 b[15:0] - - - - - - - - udp_length 0x0004d016 1 RW uint32 b[15:0] - - - - - - - - udp_destination_port 0x0004d017 1 RW uint32 b[15:0] - - - - - - - - udp_source_port 0x0004d018 1 RW uint32 b[15:0] - - - - - - - - ip_destination_address 0x0004d019 1 RW uint32 b[31:0] - - - - - - - - ip_source_address 0x0004d01a 1 RW uint32 b[31:0] - - - - - - - - ip_header_checksum 0x0004d01b 1 RW uint32 b[15:0] - - - - - - - - ip_protocol 0x0004d01c 1 RW uint32 b[7:0] - - - - - - - - ip_time_to_live 0x0004d01d 1 RW uint32 b[7:0] - - - - - - - - ip_fragment_offset 0x0004d01e 1 RW uint32 b[12:0] - - - - - - - - ip_flags 0x0004d01f 1 RW uint32 b[2:0] - - - - - - - - ip_identification 0x0004d020 1 RW uint32 b[15:0] - - - - - - - - ip_total_length 0x0004d021 1 RW uint32 b[15:0] - - - - - - - - ip_services 0x0004d022 1 RW uint32 b[7:0] - - - - - - - - ip_header_length 0x0004d023 1 RW uint32 b[3:0] - - - - - - - - ip_version 0x0004d024 1 RW uint32 b[3:0] - - - - - - - - eth_type 0x0004d025 1 RW uint32 b[15:0] - - - - - - - - eth_source_mac 0x0004d026 1 RW uint64 b[31:0] b[31:0] - - - - - - - - 0x0004d027 - - - b[15:0] b[47:32] - - - - - - - eth_destination_mac 0x0004d028 1 RW uint64 b[31:0] b[31:0] - - - - - - - - 0x0004d029 - - - b[15:0] b[47:32] - - - REG_DP_XONOFF 2 1 REG enable_stream 0x0004d2e0 1 RW uint32 b[0:0] - 2 2 + REG_DP_BLOCK_VALIDATE_BSN_AT_SYNC_BF 2 1 REG nof_sync_discarded 0x00051280 1 RO uint32 b[31:0] - 4 4 + - - - - nof_sync 0x00051281 1 RO uint32 b[31:0] - - - + - - - - clear 0x00051282 1 RW uint32 b[31:0] - - - + REG_BF_SCALE 2 1 REG scale 0x000512e4 1 RW uint32 b[15:0] - 2 2 + - - - - unused 0x000512e5 1 RW uint32 b[31:0] - - - + REG_HDR_DAT 2 1 REG bsn 0x00051000 1 RW uint64 b[31:0] b[31:0] 64 64 + - - - - - 0x00051001 - - - b[31:0] b[63:32] - - + - - - - sdp_block_period 0x00051002 1 RW uint32 b[15:0] - - - + - - - - sdp_nof_beamlets_per_block 0x00051003 1 RW uint32 b[15:0] - - - + - - - - sdp_nof_blocks_per_packet 0x00051004 1 RW uint32 b[7:0] - - - + - - - - sdp_beamlet_index 0x00051005 1 RW uint32 b[15:0] - - - + - - - - sdp_beamlet_scale 0x00051006 1 RW uint32 b[15:0] - - - + - - - - sdp_reserved 0x00051007 1 RW uint64 b[31:0] b[31:0] - - + - - - - - 0x00051008 - - - b[7:0] b[39:32] - - + - - - - sdp_source_info_gn_index 0x00051009 1 RW uint32 b[4:0] - - - + - - - - sdp_source_info_beamlet_width 0x0005100a 1 RW uint32 b[7:5] - - - + - - - - sdp_source_info_repositioning_flag 0x0005100b 1 RW uint32 b[9:9] - - - + - - - - sdp_source_info_payload_error 0x0005100c 1 RW uint32 b[10:10] - - - + - - - - sdp_source_info_fsub_type 0x0005100d 1 RW uint32 b[11:11] - - - + - - - - sdp_source_info_f_adc 0x0005100e 1 RW uint32 b[12:12] - - - + - - - - sdp_source_info_nyquist_zone_index 0x0005100f 1 RW uint32 b[14:13] - - - + - - - - sdp_source_info_antenna_band_index 0x00051010 1 RW uint32 b[15:15] - - - + - - - - sdp_station_info_station_id 0x00051011 1 RW uint32 b[9:0] - - - + - - - - sdp_station_info_antenna_field_index 0x00051011 1 RW uint32 b[15:10] - - - + - - - - sdp_observation_id 0x00051012 1 RW uint32 b[31:0] - - - + - - - - sdp_version_id 0x00051013 1 RW uint32 b[7:0] - - - + - - - - sdp_marker 0x00051014 1 RW uint32 b[7:0] - - - + - - - - udp_checksum 0x00051015 1 RW uint32 b[15:0] - - - + - - - - udp_length 0x00051016 1 RW uint32 b[15:0] - - - + - - - - udp_destination_port 0x00051017 1 RW uint32 b[15:0] - - - + - - - - udp_source_port 0x00051018 1 RW uint32 b[15:0] - - - + - - - - ip_destination_address 0x00051019 1 RW uint32 b[31:0] - - - + - - - - ip_source_address 0x0005101a 1 RW uint32 b[31:0] - - - + - - - - ip_header_checksum 0x0005101b 1 RW uint32 b[15:0] - - - + - - - - ip_protocol 0x0005101c 1 RW uint32 b[7:0] - - - + - - - - ip_time_to_live 0x0005101d 1 RW uint32 b[7:0] - - - + - - - - ip_fragment_offset 0x0005101e 1 RW uint32 b[12:0] - - - + - - - - ip_flags 0x0005101f 1 RW uint32 b[2:0] - - - + - - - - ip_identification 0x00051020 1 RW uint32 b[15:0] - - - + - - - - ip_total_length 0x00051021 1 RW uint32 b[15:0] - - - + - - - - ip_services 0x00051022 1 RW uint32 b[7:0] - - - + - - - - ip_header_length 0x00051023 1 RW uint32 b[3:0] - - - + - - - - ip_version 0x00051024 1 RW uint32 b[3:0] - - - + - - - - eth_type 0x00051025 1 RW uint32 b[15:0] - - - + - - - - eth_source_mac 0x00051026 1 RW uint64 b[31:0] b[31:0] - - + - - - - - 0x00051027 - - - b[15:0] b[47:32] - - + - - - - eth_destination_mac 0x00051028 1 RW uint64 b[31:0] b[31:0] - - + - - - - - 0x00051029 - - - b[15:0] b[47:32] - - + REG_DP_XONOFF 2 1 REG enable_stream 0x000512e0 1 RW uint32 b[0:0] - 2 2 RAM_ST_BST 2 1 RAM data 0x00001000 976 RW uint64 b[31:0] b[31:0] 2048 2048 - - - - - 0x00001001 - - - b[21:0] b[53:32] - - - REG_STAT_ENABLE_BST 2 1 REG enable 0x0004d2dc 1 RW uint32 b[0:0] - 2 2 + REG_STAT_ENABLE_BST 2 1 REG enable 0x000512dc 1 RW uint32 b[0:0] - 2 2 REG_STAT_HDR_DAT_BST 2 1 REG bsn 0x00000d80 1 RW uint64 b[31:0] b[31:0] 64 64 - - - - - 0x00000d81 - - - b[31:0] b[63:32] - - - - - - block_period 0x00000d82 1 RW uint32 b[15:0] - - - @@ -668,7 +750,8 @@ number_of_columns = 13 - - - - sdp_source_info_f_adc 0x00000d8f 1 RW uint32 b[12:12] - - - - - - - sdp_source_info_nyquist_zone_index 0x00000d90 1 RW uint32 b[14:13] - - - - - - - sdp_source_info_antenna_band_index 0x00000d91 1 RW uint32 b[15:15] - - - - - - - - sdp_station_id 0x00000d92 1 RW uint32 b[15:0] - - - + - - - - sdp_station_info_station_id 0x00000d92 1 RW uint32 b[9:0] - - - + - - - - sdp_station_info_antenna_field_index 0x00000d92 1 RW uint32 b[15:10] - - - - - - - sdp_observation_id 0x00000d93 1 RW uint32 b[31:0] - - - - - - - sdp_version_id 0x00000d94 1 RW uint32 b[7:0] - - - - - - - sdp_marker 0x00000d95 1 RW uint32 b[7:0] - - - @@ -694,24 +777,24 @@ number_of_columns = 13 - - - - eth_destination_mac 0x00000da9 1 RW uint64 b[31:0] b[31:0] - - - - - - - 0x00000daa - - - b[15:0] b[47:32] - - - - - - word_align 0x00000dab 1 RW uint32 b[15:0] - - - - REG_BSN_MONITOR_V2_BST_OFFLOAD 2 1 REG xon_stable 0x0004d220 1 RO uint32 b[0:0] - 8 8 - - - - - ready_stable 0x0004d220 1 RO uint32 b[1:1] - - - - - - - - sync_timeout 0x0004d220 1 RO uint32 b[2:2] - - - - - - - - bsn_at_sync 0x0004d221 1 RO uint64 b[31:0] b[31:0] - - - - - - - - 0x0004d222 - - - b[31:0] b[63:32] - - - - - - - nof_sop 0x0004d223 1 RO uint32 b[31:0] - - - - - - - - nof_valid 0x0004d224 1 RO uint32 b[31:0] - - - - - - - - nof_err 0x0004d225 1 RO uint32 b[31:0] - - - - - - - - latency 0x0004d226 1 RO uint32 b[31:0] - - - - REG_BSN_MONITOR_V2_BEAMLET_OUTPUT 2 1 REG xon_stable 0x0004d210 1 RO uint32 b[0:0] - 8 8 - - - - - ready_stable 0x0004d210 1 RO uint32 b[1:1] - - - - - - - - sync_timeout 0x0004d210 1 RO uint32 b[2:2] - - - - - - - - bsn_at_sync 0x0004d211 1 RO uint64 b[31:0] b[31:0] - - - - - - - - 0x0004d212 - - - b[31:0] b[63:32] - - - - - - - nof_sop 0x0004d213 1 RO uint32 b[31:0] - - - - - - - - nof_valid 0x0004d214 1 RO uint32 b[31:0] - - - - - - - - nof_err 0x0004d215 1 RO uint32 b[31:0] - - - - - - - - latency 0x0004d216 1 RO uint32 b[31:0] - - - + REG_BSN_MONITOR_V2_BST_OFFLOAD 2 1 REG xon_stable 0x00051220 1 RO uint32 b[0:0] - 8 8 + - - - - ready_stable 0x00051220 1 RO uint32 b[1:1] - - - + - - - - sync_timeout 0x00051220 1 RO uint32 b[2:2] - - - + - - - - bsn_at_sync 0x00051221 1 RO uint64 b[31:0] b[31:0] - - + - - - - - 0x00051222 - - - b[31:0] b[63:32] - - + - - - - nof_sop 0x00051223 1 RO uint32 b[31:0] - - - + - - - - nof_valid 0x00051224 1 RO uint32 b[31:0] - - - + - - - - nof_err 0x00051225 1 RO uint32 b[31:0] - - - + - - - - latency 0x00051226 1 RO uint32 b[31:0] - - - + REG_BSN_MONITOR_V2_BEAMLET_OUTPUT 2 1 REG xon_stable 0x00051210 1 RO uint32 b[0:0] - 8 8 + - - - - ready_stable 0x00051210 1 RO uint32 b[1:1] - - - + - - - - sync_timeout 0x00051210 1 RO uint32 b[2:2] - - - + - - - - bsn_at_sync 0x00051211 1 RO uint64 b[31:0] b[31:0] - - + - - - - - 0x00051212 - - - b[31:0] b[63:32] - - + - - - - nof_sop 0x00051213 1 RO uint32 b[31:0] - - - + - - - - nof_valid 0x00051214 1 RO uint32 b[31:0] - - - + - - - - nof_err 0x00051215 1 RO uint32 b[31:0] - - - + - - - - latency 0x00051216 1 RO uint32 b[31:0] - - - REG_NW_10GBE_MAC 1 1 REG rx_transfer_control 0x00006000 1 RW uint32 b[0:0] - - - - - - - rx_transfer_status 0x00006001 1 RO uint32 b[0:0] - - - - - - - tx_transfer_control 0x00006002 1 RW uint32 b[0:0] - - - @@ -888,6 +971,6 @@ number_of_columns = 13 - - - - - 0x00007c3b - - - b[31:0] b[31:0] - - - - - - tx_stats_pfcmacctrlframes 0x00007c3c 1 RO uint64 b[3:0] b[35:32] - - - - - - - 0x00007c3d - - - b[31:0] b[31:0] - - - REG_NW_10GBE_ETH10G 1 1 REG tx_snk_out_xon 0x0004d2f4 1 RO uint32 b[0:0] - - - - - - - - xgmii_tx_ready 0x0004d2f4 1 RO uint32 b[1:1] - - - - - - - - xgmii_link_status 0x0004d2f4 1 RO uint32 b[3:2] - - - \ No newline at end of file + REG_NW_10GBE_ETH10G 1 1 REG tx_snk_out_xon 0x000512f4 1 RO uint32 b[0:0] - - - + - - - - xgmii_tx_ready 0x000512f4 1 RO uint32 b[1:1] - - - + - - - - xgmii_link_status 0x000512f4 1 RO uint32 b[3:2] - - - \ No newline at end of file diff --git a/applications/lofar2/designs/lofar2_unb2c_sdp_station/lofar2_unb2c_sdp_station.mmap.gold b/applications/lofar2/designs/lofar2_unb2c_sdp_station/lofar2_unb2c_sdp_station.mmap.gold index 619efda88a..3c8e9319a7 100644 --- a/applications/lofar2/designs/lofar2_unb2c_sdp_station/lofar2_unb2c_sdp_station.mmap.gold +++ b/applications/lofar2/designs/lofar2_unb2c_sdp_station/lofar2_unb2c_sdp_station.mmap.gold @@ -39,9 +39,112 @@ number_of_columns = 13 REG_FPGA_TEMP_SENS 1 1 REG temp 0x00018000 1 RO uint32 b[31:0] - - - REG_FPGA_VOLTAGE_SENS 1 1 REG voltages 0x00018000 6 RO uint32 b[31:0] - - - RAM_SCRAP 1 1 RAM data 0x00020000 512 RW uint32 b[31:0] - - - - AVS_ETH_0_TSE 1 1 REG status 0x00028000 1024 RO uint32 b[31:0] - - - - AVS_ETH_0_REG 1 1 REG status 0x00028000 12 RO uint32 b[31:0] - - - - AVS_ETH_0_RAM 1 1 RAM data 0x00028400 1024 RW uint32 b[31:0] - - - + AVS_ETH_0_TSE 1 1 REG rev 0x00028000 1 RO uint32 b[31:0] - - - + - - - - scratch 0x00028004 1 RW uint32 b[31:0] - - - + - - - - command_config 0x00028008 1 RW uint32 b[31:0] - - - + - - - - mac_0 0x0002800c 1 RW uint32 b[31:0] - - - + - - - - mac_1 0x00028010 1 RW uint32 b[31:0] - - - + - - - - frm_length 0x00028014 1 RW uint32 b[31:0] - - - + - - - - pause_quant 0x00028018 1 RW uint32 b[31:0] - - - + - - - - rx_section_empty 0x0002801c 1 RW uint32 b[31:0] - - - + - - - - rx_section_full 0x00028020 1 RW uint32 b[31:0] - - - + - - - - tx_section_empty 0x00028024 1 RW uint32 b[31:0] - - - + - - - - tx_section_full 0x00028028 1 RW uint32 b[31:0] - - - + - - - - rx_almost_empty 0x0002802c 1 RW uint32 b[31:0] - - - + - - - - rx_almost_full 0x00028030 1 RW uint32 b[31:0] - - - + - - - - tx_almost_empty 0x00028034 1 RW uint32 b[31:0] - - - + - - - - tx_almost_full 0x00028038 1 RW uint32 b[31:0] - - - + - - - - mdio_addr0 0x0002803c 1 RW uint32 b[31:0] - - - + - - - - mdio_addr1 0x00028040 1 RW uint32 b[31:0] - - - + - - - - holdoff_quant 0x00028044 1 RW uint32 b[31:0] - - - + - - - - tx_ipg_length 0x0002805c 1 RW uint32 b[31:0] - - - + - - - - amacid 0x00028060 1 RO uint64 b[31:0] b[31:0] - - + - - - - - 0x00028061 - - - b[31:0] b[63:32] - - + - - - - aframestransmittedok 0x00028068 1 RO uint32 b[31:0] - - - + - - - - aframesreceivedok 0x0002806c 1 RO uint32 b[31:0] - - - + - - - - aframechecksequenceerrors 0x00028070 1 RO uint32 b[31:0] - - - + - - - - aalignmenterrors 0x00028074 1 RO uint32 b[31:0] - - - + - - - - aoctetstransmittedok 0x00028078 1 RO uint32 b[31:0] - - - + - - - - aoctetsreceivedok 0x0002807c 1 RO uint32 b[31:0] - - - + - - - - atxpausemacctrlframes 0x00028080 1 RO uint32 b[31:0] - - - + - - - - arxpausemacctrlframes 0x00028084 1 RO uint32 b[31:0] - - - + - - - - ifinerrors 0x00028088 1 RO uint32 b[31:0] - - - + - - - - ifouterrors 0x0002808c 1 RO uint32 b[31:0] - - - + - - - - ifinucastpkts 0x00028090 1 RO uint32 b[31:0] - - - + - - - - ifinmulticastpkts 0x00028094 1 RO uint32 b[31:0] - - - + - - - - ifinbroadcastpkts 0x00028098 1 RO uint32 b[31:0] - - - + - - - - ifoutucastpkts 0x000280a0 1 RO uint32 b[31:0] - - - + - - - - ifoutmulticastpkts 0x000280a4 1 RO uint32 b[31:0] - - - + - - - - ifoutbroadcastpkts 0x000280a8 1 RO uint32 b[31:0] - - - + - - - - etherstatsdropevents 0x000280ac 1 RO uint32 b[31:0] - - - + - - - - etherstatsoctets 0x000280b0 1 RO uint32 b[31:0] - - - + - - - - etherstatspkts 0x000280b4 1 RO uint32 b[31:0] - - - + - - - - etherstatsundersizepkts 0x000280b8 1 RO uint32 b[31:0] - - - + - - - - etherstatsoversizepkts 0x000280bc 1 RO uint32 b[31:0] - - - + - - - - etherstatspkts64octets 0x000280c0 1 RO uint32 b[31:0] - - - + - - - - etherstatspkts65to127octets 0x000280c4 1 RO uint32 b[31:0] - - - + - - - - etherstatspkts128to255octets 0x000280c8 1 RO uint32 b[31:0] - - - + - - - - etherstatspkts256to511octets 0x000280cc 1 RO uint32 b[31:0] - - - + - - - - etherstatspkts512to1023octets 0x000280d0 1 RO uint32 b[31:0] - - - + - - - - etherstatspkts1024to1518octets 0x000280d4 1 RO uint32 b[31:0] - - - + - - - - etherstatspkts1519toxoctets 0x000280d8 1 RO uint32 b[31:0] - - - + - - - - etherstatsjabbers 0x000280dc 1 RO uint32 b[31:0] - - - + - - - - etherstatsfragments 0x000280e0 1 RO uint32 b[31:0] - - - + - - - - tx_cmd_stat 0x000280e8 1 RW uint32 b[31:0] - - - + - - - - rx_cmd_stat 0x000280ec 1 RW uint32 b[31:0] - - - + - - - - msb_aoctetstransmittedok 0x000280f0 1 RO uint32 b[31:0] - - - + - - - - msb_aoctetsreceivedok 0x000280f4 1 RO uint32 b[31:0] - - - + - - - - msb_etherstatsoctets 0x000280f8 1 RO uint32 b[31:0] - - - + - - - - pcs_control 0x00028200 1 RW uint32 b[15:0] - - - + - - - - pcs_status 0x00028204 1 RO uint32 b[15:0] - - - + - - - - pcs_phy_identifier_msb 0x00028208 1 RO uint32 b[15:0] - - - + - - - - pcs_phy_identifier_lsb 0x0002820c 1 RO uint32 b[15:0] - - - + - - - - pcs_dev_ability 0x00028210 1 RW uint32 b[15:0] - - - + - - - - pcs_partner_ability 0x00028214 1 RO uint32 b[15:0] - - - + - - - - pcs_an_expansion 0x00028218 1 RO uint32 b[15:0] - - - + - - - - pcs_scratch 0x00028240 1 RW uint32 b[15:0] - - - + - - - - pcs_rev 0x00028244 1 RO uint32 b[15:0] - - - + - - - - pcs_link_timer_lsb 0x00028248 1 RW uint32 b[15:0] - - - + - - - - pcs_link_timer_msb 0x0002824c 1 RW uint32 b[15:0] - - - + - - - - pcs_if_mode 0x00028250 1 RW uint32 b[15:0] - - - + - - - - tx_period 0x00028340 1 RW uint32 b[31:0] - - - + - - - - tx_adjust_fns 0x00028344 1 RW uint32 b[15:0] - - - + - - - - tx_adjust_ns 0x00028348 1 RW uint32 b[15:0] - - - + - - - - rx_period 0x0002834c 1 RW uint32 b[31:0] - - - + - - - - rx_adjust_fns 0x00028350 1 RW uint32 b[15:0] - - - + - - - - rx_adjust_ns 0x00028354 1 RW uint32 b[15:0] - - - + - - - - measure_valid 0x00028384 1 RO uint32 b[0:0] - - - + - - - - dl_reset 0x00028384 1 RW uint32 b[1:1] - - - + - - - - tx_delay 0x00028388 1 RO uint32 b[20:0] - - - + - - - - rx_delay 0x0002838c 1 RO uint32 b[20:0] - - - + AVS_ETH_0_REG 1 1 REG demux 0x00028000 4 RW uint32 b[16:0] - - - + - - - - config_mac_address 0x00028004 1 RO uint64 b[31:0] b[31:0] - - + - - - - - 0x00028005 - - - b[15:0] b[47:32] - - + - - - - config_ip_address 0x00028006 1 RO uint32 b[31:0] - - - + - - - - config_udp_ctrl_port 0x00028007 1 RO uint32 b[15:0] - - - + - - - - control 0x00028008 1 RO uint32 b[31:0] - - - + - - - - control_rx_en 0x00028008 1 RO uint32 b[0:0] - - - + - - - - control_tx_en 0x00028008 1 RO uint32 b[1:1] - - - + - - - - control_tx_request 0x00028008 1 RO uint32 b[2:2] - - - + - - - - control_tx_empty 0x00028008 1 RO uint32 b[17:16] - - - + - - - - control_tx_nof_words 0x00028008 1 RO uint32 b[29:18] - - - + - - - - frame 0x00028009 1 RO uint32 b[31:0] - - - + - - - - frame_eth_mac_error 0x00028009 1 RO uint32 b[5:0] - - - + - - - - frame_mac_address_match 0x00028009 1 RO uint32 b[7:7] - - - + - - - - frame_is_arp 0x00028009 1 RO uint32 b[8:8] - - - + - - - - frame_is_ip 0x00028009 1 RO uint32 b[9:9] - - - + - - - - frame_ip_checksum_ok 0x00028009 1 RO uint32 b[10:10] - - - + - - - - frame_ip_address_match 0x00028009 1 RO uint32 b[11:11] - - - + - - - - frame_is_icmp 0x00028009 1 RO uint32 b[12:12] - - - + - - - - frame_is_udp 0x00028009 1 RO uint32 b[13:13] - - - + - - - - frame_is_udp_ctrl_port 0x00028009 1 RO uint32 b[14:14] - - - + - - - - status 0x0002800a 1 RO uint32 b[31:0] - - - + - - - - status_rx_avail 0x0002800a 1 RO uint32 b[0:0] - - - + - - - - status_tx_done 0x0002800a 1 RO uint32 b[1:1] - - - + - - - - status_tx_avail 0x0002800a 1 RO uint32 b[2:2] - - - + - - - - status_rx_empty 0x0002800a 1 RO uint32 b[17:16] - - - + - - - - status_rx_nof_words 0x0002800a 1 RO uint32 b[29:18] - - - + AVS_ETH_0_RAM 1 1 RAM data 0x00028400 1024 RO uint32 b[31:0] - - - PIO_PPS 1 1 REG capture_cnt 0x00030000 1 RO uint32 b[29:0] - - - - - - - stable 0x00030000 1 RO uint32 b[30:30] - - - - - - - toggle 0x00030000 1 RO uint32 b[31:31] - - - @@ -74,12 +177,13 @@ number_of_columns = 13 - - - - nyquist_zone_index 0x00058004 1 RW uint32 b[1:0] - - - - - - - observation_id 0x00058005 1 RW uint32 b[31:0] - - - - - - - antenna_band_index 0x00058006 1 RW uint32 b[0:0] - - - - - - - - station_id 0x00058007 1 RW uint32 b[15:0] - - - + - - - - station_id 0x00058007 1 RW uint32 b[9:0] - - - + - - - - antenna_field_index 0x00058008 1 RW uint32 b[5:0] - - - REG_RING_INFO 1 1 REG use_cable_to_previous_rn 0x00060000 1 RW uint32 b[0:0] - - - - - - - use_cable_to_next_rn 0x00060001 1 RW uint32 b[0:0] - - - - - - - n_rn 0x00060002 1 RW uint32 b[7:0] - - - - - - - o_rn 0x00060003 1 RW uint32 b[7:0] - - - - PIO_JESD_CTRL 1 1 REG enable 0x00068000 1 RW uint32 b[30:0] - - - + PIO_JESD_CTRL 1 1 REG disable 0x00068000 1 RW uint32 b[30:0] - - - - - - - reset 0x00068000 1 RW uint32 b[31:31] - - - JESD204B 1 12 REG rx_lane_ctrl_common 0x00070000 1 RW uint32 b[2:0] - - 256 - - - - rx_lane_ctrl_0 0x00070001 1 RW uint32 b[2:0] - - - @@ -157,11 +261,12 @@ number_of_columns = 13 REG_DIAG_DATA_BUFFER_BSN 1 12 REG sync_cnt 0x000b0000 1 RO uint32 b[31:0] - - 2 - - - - word_cnt 0x000b0001 1 RO uint32 b[31:0] - - - RAM_DIAG_DATA_BUFFER_BSN 1 12 RAM data 0x000b4000 1024 RW uint32 b[31:0] b[15:0] - 1024 - REG_SI 1 1 REG enable 0x000b8000 1 RW uint32 b[0:0] - - - - RAM_FIL_COEFS 1 16 RAM data 0x000c0000 1024 RW uint32 b[15:0] - - 1024 - RAM_EQUALIZER_GAINS 1 6 RAM data 0x000c8000 1024 RW cint16_ir b[31:0] - - 1024 + REG_SI 1 1 REG enable 0x000b8000 1 RW uint32 b[11:0] - - - + RAM_FIL_COEFS 2 16 RAM data 0x000c0000 1024 RW uint32 b[15:0] - 16384 1024 + RAM_EQUALIZER_GAINS 1 12 RAM data 0x000c8000 1024 RW cint16_ir b[31:0] - - 1024 + RAM_EQUALIZER_GAINS_CROSS 1 12 RAM data 0x000cc000 1024 RW cint16_ir b[31:0] - - 1024 REG_DP_SELECTOR 1 1 REG input_select 0x000d0000 1 RW uint32 b[0:0] - - - - RAM_ST_SST 1 6 RAM data 0x000d8000 1024 RW uint64 b[31:0] b[31:0] - 2048 + RAM_ST_SST 1 12 RAM data 0x000d8000 1024 RW uint64 b[31:0] b[31:0] - 2048 - - - - - 0x000d8001 - - - b[21:0] b[53:32] - - REG_STAT_ENABLE_SST 1 1 REG enable 0x000e0000 1 RW uint32 b[0:0] - - - REG_STAT_HDR_DAT_SST 1 1 REG bsn 0x000e8000 1 RW uint64 b[31:0] b[31:0] - - @@ -184,10 +289,11 @@ number_of_columns = 13 - - - - sdp_source_info_f_adc 0x000e800f 1 RW uint32 b[12:12] - - - - - - - sdp_source_info_nyquist_zone_index 0x000e8010 1 RW uint32 b[14:13] - - - - - - - sdp_source_info_antenna_band_index 0x000e8011 1 RW uint32 b[15:15] - - - - - - - - sdp_station_id 0x000e8012 1 RW uint32 b[15:0] - - - + - - - - sdp_station_info_station_id 0x000e8012 1 RW uint32 b[9:0] - - - + - - - - sdp_station_info_antenna_field_index 0x000e8012 1 RW uint32 b[15:10] - - - - - - - sdp_observation_id 0x000e8013 1 RW uint32 b[31:0] - - - - - - - - sdp_version_id 0x000e8014 1 RO uint32 b[7:0] - - - - - - - - sdp_marker 0x000e8015 1 RO uint32 b[7:0] - - - + - - - - sdp_version_id 0x000e8014 1 RW uint32 b[7:0] - - - + - - - - sdp_marker 0x000e8015 1 RW uint32 b[7:0] - - - - - - - udp_checksum 0x000e8016 1 RW uint32 b[15:0] - - - - - - - udp_length 0x000e8017 1 RW uint32 b[15:0] - - - - - - - udp_destination_port 0x000e8018 1 RW uint32 b[15:0] - - - @@ -204,8 +310,8 @@ number_of_columns = 13 - - - - ip_services 0x000e8023 1 RW uint32 b[7:0] - - - - - - - ip_header_length 0x000e8024 1 RW uint32 b[3:0] - - - - - - - ip_version 0x000e8025 1 RW uint32 b[3:0] - - - - - - - - eth_type 0x000e8026 1 RO uint32 b[15:0] - - - - - - - - eth_source_mac 0x000e8027 1 RO uint64 b[31:0] b[31:0] - - + - - - - eth_type 0x000e8026 1 RW uint32 b[15:0] - - - + - - - - eth_source_mac 0x000e8027 1 RW uint64 b[31:0] b[31:0] - - - - - - - 0x000e8028 - - - b[15:0] b[47:32] - - - - - - eth_destination_mac 0x000e8029 1 RW uint64 b[31:0] b[31:0] - - - - - - - 0x000e802a - - - b[15:0] b[47:32] - - @@ -218,7 +324,7 @@ number_of_columns = 13 - - - - nof_sop 0x000f0003 1 RO uint32 b[31:0] - - - - - - - nof_valid 0x000f0004 1 RO uint32 b[31:0] - - - - - - - nof_err 0x000f0005 1 RO uint32 b[31:0] - - - - - - - - latency 0x000f0008 1 RO uint32 b[31:0] - - - + - - - - latency 0x000f0006 1 RO uint32 b[31:0] - - - REG_BSN_SYNC_SCHEDULER_XSUB 1 1 REG ctrl_enable 0x000f8000 1 RW uint32 b[0:0] - - - - - - - ctrl_interval_size 0x000f8001 1 RW uint32 b[30:0] - - - - - - - ctrl_start_bsn 0x000f8002 1 RW uint64 b[31:0] b[31:0] - - @@ -262,10 +368,11 @@ number_of_columns = 13 - - - - sdp_source_info_f_adc 0x0012800f 1 RW uint32 b[12:12] - - - - - - - sdp_source_info_nyquist_zone_index 0x00128010 1 RW uint32 b[14:13] - - - - - - - sdp_source_info_antenna_band_index 0x00128011 1 RW uint32 b[15:15] - - - - - - - - sdp_station_id 0x00128012 1 RW uint32 b[15:0] - - - + - - - - sdp_station_info_station_id 0x00128012 1 RW uint32 b[9:0] - - - + - - - - sdp_station_info_antenna_field_index 0x00128012 1 RW uint32 b[15:10] - - - - - - - sdp_observation_id 0x00128013 1 RW uint32 b[31:0] - - - - - - - - sdp_version_id 0x00128014 1 RO uint32 b[7:0] - - - - - - - - sdp_marker 0x00128015 1 RO uint32 b[7:0] - - - + - - - - sdp_version_id 0x00128014 1 RW uint32 b[7:0] - - - + - - - - sdp_marker 0x00128015 1 RW uint32 b[7:0] - - - - - - - udp_checksum 0x00128016 1 RW uint32 b[15:0] - - - - - - - udp_length 0x00128017 1 RW uint32 b[15:0] - - - - - - - udp_destination_port 0x00128018 1 RW uint32 b[15:0] - - - @@ -282,8 +389,8 @@ number_of_columns = 13 - - - - ip_services 0x00128023 1 RW uint32 b[7:0] - - - - - - - ip_header_length 0x00128024 1 RW uint32 b[3:0] - - - - - - - ip_version 0x00128025 1 RW uint32 b[3:0] - - - - - - - - eth_type 0x00128026 1 RO uint32 b[15:0] - - - - - - - - eth_source_mac 0x00128027 1 RO uint64 b[31:0] b[31:0] - - + - - - - eth_type 0x00128026 1 RW uint32 b[15:0] - - - + - - - - eth_source_mac 0x00128027 1 RW uint64 b[31:0] b[31:0] - - - - - - - 0x00128028 - - - b[15:0] b[47:32] - - - - - - eth_destination_mac 0x00128029 1 RW uint64 b[31:0] b[31:0] - - - - - - - 0x0012802a - - - b[15:0] b[47:32] - - @@ -298,7 +405,7 @@ number_of_columns = 13 - - - - nof_sop 0x00138003 1 RO uint32 b[31:0] - - - - - - - nof_valid 0x00138004 1 RO uint32 b[31:0] - - - - - - - nof_err 0x00138005 1 RO uint32 b[31:0] - - - - - - - - latency 0x00138008 1 RO uint32 b[31:0] - - - + - - - - latency 0x00138006 1 RO uint32 b[31:0] - - - REG_BSN_MONITOR_V2_ALIGNED_XSUB 1 1 REG xon_stable 0x00140000 1 RO uint32 b[0:0] - - - - - - - ready_stable 0x00140000 1 RO uint32 b[1:1] - - - - - - - sync_timeout 0x00140000 1 RO uint32 b[2:2] - - - @@ -307,7 +414,7 @@ number_of_columns = 13 - - - - nof_sop 0x00140003 1 RO uint32 b[31:0] - - - - - - - nof_valid 0x00140004 1 RO uint32 b[31:0] - - - - - - - nof_err 0x00140005 1 RO uint32 b[31:0] - - - - - - - - latency 0x00140008 1 RO uint32 b[31:0] - - - + - - - - latency 0x00140006 1 RO uint32 b[31:0] - - - REG_BSN_MONITOR_V2_XST_OFFLOAD 1 1 REG xon_stable 0x00148000 1 RO uint32 b[0:0] - - - - - - - ready_stable 0x00148000 1 RO uint32 b[1:1] - - - - - - - sync_timeout 0x00148000 1 RO uint32 b[2:2] - - - @@ -316,7 +423,7 @@ number_of_columns = 13 - - - - nof_sop 0x00148003 1 RO uint32 b[31:0] - - - - - - - nof_valid 0x00148004 1 RO uint32 b[31:0] - - - - - - - nof_err 0x00148005 1 RO uint32 b[31:0] - - - - - - - - latency 0x00148008 1 RO uint32 b[31:0] - - - + - - - - latency 0x00148006 1 RO uint32 b[31:0] - - - REG_RING_LANE_INFO_XST 1 1 REG lane_direction 0x00150000 1 RO uint32 b[0:0] - - - - - - - transport_nof_hops 0x00150001 1 RW uint32 b[31:0] - - - REG_BSN_MONITOR_V2_RING_RX_XST 1 16 REG xon_stable 0x00158000 1 RO uint32 b[0:0] - - 8 @@ -327,7 +434,7 @@ number_of_columns = 13 - - - - nof_sop 0x00158003 1 RO uint32 b[31:0] - - - - - - - nof_valid 0x00158004 1 RO uint32 b[31:0] - - - - - - - nof_err 0x00158005 1 RO uint32 b[31:0] - - - - - - - - latency 0x00158008 1 RO uint32 b[31:0] - - - + - - - - latency 0x00158006 1 RO uint32 b[31:0] - - - REG_BSN_MONITOR_V2_RING_TX_XST 1 16 REG xon_stable 0x00160000 1 RO uint32 b[0:0] - - 8 - - - - ready_stable 0x00160000 1 RO uint32 b[1:1] - - - - - - - sync_timeout 0x00160000 1 RO uint32 b[2:2] - - - @@ -336,11 +443,12 @@ number_of_columns = 13 - - - - nof_sop 0x00160003 1 RO uint32 b[31:0] - - - - - - - nof_valid 0x00160004 1 RO uint32 b[31:0] - - - - - - - nof_err 0x00160005 1 RO uint32 b[31:0] - - - - - - - - latency 0x00160008 1 RO uint32 b[31:0] - - - + - - - - latency 0x00160006 1 RO uint32 b[31:0] - - - REG_DP_BLOCK_VALIDATE_ERR_XST 1 1 REG err_count_index 0x00168000 8 RO uint32 b[31:0] - - - - - - - total_discarded_blocks 0x00168008 1 RO uint32 b[31:0] - - - - - - - - total_block_count 0x00168009 1 RO uint32 b[31:0] - - - - - - - - clear 0x0016800a 1 RW uint32 b[31:0] - - - + - - - - total_block_count 0x00168009 1 RO uint64 b[31:0] b[31:0] - - + - - - - - 0x0016800a - - - b[31:0] b[63:32] - - + - - - - clear 0x0016800b 1 RW uint32 b[31:0] - - - REG_DP_BLOCK_VALIDATE_BSN_AT_SYNC_XST 1 1 REG nof_sync_discarded 0x00170000 1 RO uint32 b[31:0] - - - - - - - nof_sync 0x00170001 1 RO uint32 b[31:0] - - - - - - - clear 0x00170002 1 RW uint32 b[31:0] - - - @@ -525,9 +633,9 @@ number_of_columns = 13 - - - - xgmii_link_status 0x00180000 1 RO uint32 b[3:2] - - - RAM_SS_SS_WIDE 2 6 RAM data 0x00188000 976 RW uint32 b[9:0] - 8192 1024 RAM_BF_WEIGHTS 2 12 RAM data 0x00190000 976 RW cint16_ir b[31:0] - 16384 1024 - REG_BSN_ALIGN_V2_BF 2 2 REG enable 0x00198000 1 RW uint32 b[0:0] - 1 2 + REG_BSN_ALIGN_V2_BF 2 2 REG enable 0x00198000 1 RW uint32 b[0:0] - 4 2 - - - - replaced_pkt_cnt 0x00198001 1 RO uint32 b[31:0] - - - - REG_BSN_MONITOR_V2_RX_ALIGN_BF 2 2 REG xon_stable 0x001a0000 1 RO uint32 b[0:0] - 1 8 + REG_BSN_MONITOR_V2_RX_ALIGN_BF 2 2 REG xon_stable 0x001a0000 1 RO uint32 b[0:0] - 16 8 - - - - ready_stable 0x001a0000 1 RO uint32 b[1:1] - - - - - - - sync_timeout 0x001a0000 1 RO uint32 b[2:2] - - - - - - - bsn_at_sync 0x001a0001 1 RO uint64 b[31:0] b[31:0] - - @@ -535,8 +643,8 @@ number_of_columns = 13 - - - - nof_sop 0x001a0003 1 RO uint32 b[31:0] - - - - - - - nof_valid 0x001a0004 1 RO uint32 b[31:0] - - - - - - - nof_err 0x001a0005 1 RO uint32 b[31:0] - - - - - - - - latency 0x001a0008 1 RO uint32 b[31:0] - - - - REG_BSN_MONITOR_V2_ALIGNED_BF 2 1 REG xon_stable 0x001a8000 1 RO uint32 b[0:0] - 1 8 + - - - - latency 0x001a0006 1 RO uint32 b[31:0] - - - + REG_BSN_MONITOR_V2_ALIGNED_BF 2 1 REG xon_stable 0x001a8000 1 RO uint32 b[0:0] - 8 8 - - - - ready_stable 0x001a8000 1 RO uint32 b[1:1] - - - - - - - sync_timeout 0x001a8000 1 RO uint32 b[2:2] - - - - - - - bsn_at_sync 0x001a8001 1 RO uint64 b[31:0] b[31:0] - - @@ -544,10 +652,10 @@ number_of_columns = 13 - - - - nof_sop 0x001a8003 1 RO uint32 b[31:0] - - - - - - - nof_valid 0x001a8004 1 RO uint32 b[31:0] - - - - - - - nof_err 0x001a8005 1 RO uint32 b[31:0] - - - - - - - - latency 0x001a8008 1 RO uint32 b[31:0] - - - - REG_RING_LANE_INFO_BF 2 1 REG lane_direction 0x001b0000 1 RO uint32 b[0:0] - 1 2 + - - - - latency 0x001a8006 1 RO uint32 b[31:0] - - - + REG_RING_LANE_INFO_BF 2 1 REG lane_direction 0x001b0000 1 RO uint32 b[0:0] - 2 2 - - - - transport_nof_hops 0x001b0001 1 RW uint32 b[31:0] - - - - REG_BSN_MONITOR_V2_RING_RX_BF 2 1 REG xon_stable 0x001b8000 1 RO uint32 b[0:0] - 1 8 + REG_BSN_MONITOR_V2_RING_RX_BF 2 1 REG xon_stable 0x001b8000 1 RO uint32 b[0:0] - 8 8 - - - - ready_stable 0x001b8000 1 RO uint32 b[1:1] - - - - - - - sync_timeout 0x001b8000 1 RO uint32 b[2:2] - - - - - - - bsn_at_sync 0x001b8001 1 RO uint64 b[31:0] b[31:0] - - @@ -555,8 +663,8 @@ number_of_columns = 13 - - - - nof_sop 0x001b8003 1 RO uint32 b[31:0] - - - - - - - nof_valid 0x001b8004 1 RO uint32 b[31:0] - - - - - - - nof_err 0x001b8005 1 RO uint32 b[31:0] - - - - - - - - latency 0x001b8008 1 RO uint32 b[31:0] - - - - REG_BSN_MONITOR_V2_RING_TX_BF 2 1 REG xon_stable 0x001c0000 1 RO uint32 b[0:0] - 1 8 + - - - - latency 0x001b8006 1 RO uint32 b[31:0] - - - + REG_BSN_MONITOR_V2_RING_TX_BF 2 1 REG xon_stable 0x001c0000 1 RO uint32 b[0:0] - 8 8 - - - - ready_stable 0x001c0000 1 RO uint32 b[1:1] - - - - - - - sync_timeout 0x001c0000 1 RO uint32 b[2:2] - - - - - - - bsn_at_sync 0x001c0001 1 RO uint64 b[31:0] b[31:0] - - @@ -564,12 +672,13 @@ number_of_columns = 13 - - - - nof_sop 0x001c0003 1 RO uint32 b[31:0] - - - - - - - nof_valid 0x001c0004 1 RO uint32 b[31:0] - - - - - - - nof_err 0x001c0005 1 RO uint32 b[31:0] - - - - - - - - latency 0x001c0008 1 RO uint32 b[31:0] - - - - REG_DP_BLOCK_VALIDATE_ERR_BF 2 1 REG err_count_index 0x001c8000 8 RO uint32 b[31:0] - 1 16 + - - - - latency 0x001c0006 1 RO uint32 b[31:0] - - - + REG_DP_BLOCK_VALIDATE_ERR_BF 2 1 REG err_count_index 0x001c8000 8 RO uint32 b[31:0] - 16 16 - - - - total_discarded_blocks 0x001c8008 1 RO uint32 b[31:0] - - - - - - - - total_block_count 0x001c8009 1 RO uint32 b[31:0] - - - - - - - - clear 0x001c800a 1 RW uint32 b[31:0] - - - - REG_DP_BLOCK_VALIDATE_BSN_AT_SYNC_BF 2 1 REG nof_sync_discarded 0x001d0000 1 RO uint32 b[31:0] - 1 4 + - - - - total_block_count 0x001c8009 1 RO uint64 b[31:0] b[31:0] - - + - - - - - 0x001c800a - - - b[31:0] b[63:32] - - + - - - - clear 0x001c800b 1 RW uint32 b[31:0] - - - + REG_DP_BLOCK_VALIDATE_BSN_AT_SYNC_BF 2 1 REG nof_sync_discarded 0x001d0000 1 RO uint32 b[31:0] - 4 4 - - - - nof_sync 0x001d0001 1 RO uint32 b[31:0] - - - - - - - clear 0x001d0002 1 RW uint32 b[31:0] - - - REG_BF_SCALE 2 1 REG scale 0x001d8000 1 RW uint32 b[15:0] - 2 2 @@ -591,10 +700,11 @@ number_of_columns = 13 - - - - sdp_source_info_f_adc 0x001e000e 1 RW uint32 b[12:12] - - - - - - - sdp_source_info_nyquist_zone_index 0x001e000f 1 RW uint32 b[14:13] - - - - - - - sdp_source_info_antenna_band_index 0x001e0010 1 RW uint32 b[15:15] - - - - - - - - sdp_station_id 0x001e0011 1 RW uint32 b[15:0] - - - + - - - - sdp_station_info_station_id 0x001e0011 1 RW uint32 b[9:0] - - - + - - - - sdp_station_info_antenna_field_index 0x001e0011 1 RW uint32 b[15:10] - - - - - - - sdp_observation_id 0x001e0012 1 RW uint32 b[31:0] - - - - - - - - sdp_version_id 0x001e0013 1 RO uint32 b[7:0] - - - - - - - - sdp_marker 0x001e0014 1 RO uint32 b[7:0] - - - + - - - - sdp_version_id 0x001e0013 1 RW uint32 b[7:0] - - - + - - - - sdp_marker 0x001e0014 1 RW uint32 b[7:0] - - - - - - - udp_checksum 0x001e0015 1 RW uint32 b[15:0] - - - - - - - udp_length 0x001e0016 1 RW uint32 b[15:0] - - - - - - - udp_destination_port 0x001e0017 1 RW uint32 b[15:0] - - - @@ -611,8 +721,8 @@ number_of_columns = 13 - - - - ip_services 0x001e0022 1 RW uint32 b[7:0] - - - - - - - ip_header_length 0x001e0023 1 RW uint32 b[3:0] - - - - - - - ip_version 0x001e0024 1 RW uint32 b[3:0] - - - - - - - - eth_type 0x001e0025 1 RO uint32 b[15:0] - - - - - - - - eth_source_mac 0x001e0026 1 RO uint64 b[31:0] b[31:0] - - + - - - - eth_type 0x001e0025 1 RW uint32 b[15:0] - - - + - - - - eth_source_mac 0x001e0026 1 RW uint64 b[31:0] b[31:0] - - - - - - - 0x001e0027 - - - b[15:0] b[47:32] - - - - - - eth_destination_mac 0x001e0028 1 RW uint64 b[31:0] b[31:0] - - - - - - - 0x001e0029 - - - b[15:0] b[47:32] - - @@ -640,10 +750,11 @@ number_of_columns = 13 - - - - sdp_source_info_f_adc 0x0020000f 1 RW uint32 b[12:12] - - - - - - - sdp_source_info_nyquist_zone_index 0x00200010 1 RW uint32 b[14:13] - - - - - - - sdp_source_info_antenna_band_index 0x00200011 1 RW uint32 b[15:15] - - - - - - - - sdp_station_id 0x00200012 1 RW uint32 b[15:0] - - - + - - - - sdp_station_info_station_id 0x00200012 1 RW uint32 b[9:0] - - - + - - - - sdp_station_info_antenna_field_index 0x00200012 1 RW uint32 b[15:10] - - - - - - - sdp_observation_id 0x00200013 1 RW uint32 b[31:0] - - - - - - - - sdp_version_id 0x00200014 1 RO uint32 b[7:0] - - - - - - - - sdp_marker 0x00200015 1 RO uint32 b[7:0] - - - + - - - - sdp_version_id 0x00200014 1 RW uint32 b[7:0] - - - + - - - - sdp_marker 0x00200015 1 RW uint32 b[7:0] - - - - - - - udp_checksum 0x00200016 1 RW uint32 b[15:0] - - - - - - - udp_length 0x00200017 1 RW uint32 b[15:0] - - - - - - - udp_destination_port 0x00200018 1 RW uint32 b[15:0] - - - @@ -660,13 +771,13 @@ number_of_columns = 13 - - - - ip_services 0x00200023 1 RW uint32 b[7:0] - - - - - - - ip_header_length 0x00200024 1 RW uint32 b[3:0] - - - - - - - ip_version 0x00200025 1 RW uint32 b[3:0] - - - - - - - - eth_type 0x00200026 1 RO uint32 b[15:0] - - - - - - - - eth_source_mac 0x00200027 1 RO uint64 b[31:0] b[31:0] - - + - - - - eth_type 0x00200026 1 RW uint32 b[15:0] - - - + - - - - eth_source_mac 0x00200027 1 RW uint64 b[31:0] b[31:0] - - - - - - - 0x00200028 - - - b[15:0] b[47:32] - - - - - - eth_destination_mac 0x00200029 1 RW uint64 b[31:0] b[31:0] - - - - - - - 0x0020002a - - - b[15:0] b[47:32] - - - - - - word_align 0x0020002b 1 RW uint32 b[15:0] - - - - REG_BSN_MONITOR_V2_BST_OFFLOAD 2 1 REG xon_stable 0x00208000 1 RO uint32 b[0:0] - 1 8 + REG_BSN_MONITOR_V2_BST_OFFLOAD 2 1 REG xon_stable 0x00208000 1 RO uint32 b[0:0] - 8 8 - - - - ready_stable 0x00208000 1 RO uint32 b[1:1] - - - - - - - sync_timeout 0x00208000 1 RO uint32 b[2:2] - - - - - - - bsn_at_sync 0x00208001 1 RO uint64 b[31:0] b[31:0] - - @@ -674,8 +785,8 @@ number_of_columns = 13 - - - - nof_sop 0x00208003 1 RO uint32 b[31:0] - - - - - - - nof_valid 0x00208004 1 RO uint32 b[31:0] - - - - - - - nof_err 0x00208005 1 RO uint32 b[31:0] - - - - - - - - latency 0x00208008 1 RO uint32 b[31:0] - - - - REG_BSN_MONITOR_V2_BEAMLET_OUTPUT 2 1 REG xon_stable 0x00210000 1 RO uint32 b[0:0] - 1 8 + - - - - latency 0x00208006 1 RO uint32 b[31:0] - - - + REG_BSN_MONITOR_V2_BEAMLET_OUTPUT 2 1 REG xon_stable 0x00210000 1 RO uint32 b[0:0] - 8 8 - - - - ready_stable 0x00210000 1 RO uint32 b[1:1] - - - - - - - sync_timeout 0x00210000 1 RO uint32 b[2:2] - - - - - - - bsn_at_sync 0x00210001 1 RO uint64 b[31:0] b[31:0] - - @@ -683,7 +794,7 @@ number_of_columns = 13 - - - - nof_sop 0x00210003 1 RO uint32 b[31:0] - - - - - - - nof_valid 0x00210004 1 RO uint32 b[31:0] - - - - - - - nof_err 0x00210005 1 RO uint32 b[31:0] - - - - - - - - latency 0x00210008 1 RO uint32 b[31:0] - - - + - - - - latency 0x00210006 1 RO uint32 b[31:0] - - - REG_NW_10GBE_MAC 1 1 REG rx_transfer_control 0x00218000 1 RW uint32 b[0:0] - - - - - - - rx_transfer_status 0x00218001 1 RO uint32 b[0:0] - - - - - - - tx_transfer_control 0x00218002 1 RW uint32 b[0:0] - - - diff --git a/applications/lofar2/designs/lofar2_unb2c_sdp_station/lofar2_unb2c_sdp_station.mmap.qsys.gold b/applications/lofar2/designs/lofar2_unb2c_sdp_station/lofar2_unb2c_sdp_station.mmap.qsys.gold index 082553d43a..7e0acf4429 100644 --- a/applications/lofar2/designs/lofar2_unb2c_sdp_station/lofar2_unb2c_sdp_station.mmap.qsys.gold +++ b/applications/lofar2/designs/lofar2_unb2c_sdp_station/lofar2_unb2c_sdp_station.mmap.qsys.gold @@ -36,102 +36,206 @@ number_of_columns = 13 - - - - stamp_commit 0x00000011 3 RO uint32 b[31:0] - - - - - - - design_note 0x00000014 48 RO char8 b[31:0] b[7:0] - - REG_WDI 1 1 REG wdi_override 0x00000c00 1 WO uint32 b[31:0] - - - - REG_FPGA_TEMP_SENS 1 1 REG temp 0x00043238 1 RO uint32 b[31:0] - - - - REG_FPGA_VOLTAGE_SENS 1 1 REG voltages 0x000431f0 6 RO uint32 b[31:0] - - - + REG_FPGA_TEMP_SENS 1 1 REG temp 0x00051238 1 RO uint32 b[31:0] - - - + REG_FPGA_VOLTAGE_SENS 1 1 REG voltages 0x000511f0 6 RO uint32 b[31:0] - - - RAM_SCRAP 1 1 RAM data 0x00000200 512 RW uint32 b[31:0] - - - - AVS_ETH_0_TSE 1 1 REG status 0x00000400 1024 RO uint32 b[31:0] - - - - AVS_ETH_0_REG 1 1 REG status 0x00000c10 12 RO uint32 b[31:0] - - - - AVS_ETH_0_RAM 1 1 RAM data 0x00000800 1024 RW uint32 b[31:0] - - - - PIO_PPS 1 1 REG capture_cnt 0x00043268 1 RO uint32 b[29:0] - - - - - - - - stable 0x00043268 1 RO uint32 b[30:30] - - - - - - - - toggle 0x00043268 1 RO uint32 b[31:31] - - - - - - - - expected_cnt 0x00043269 1 RW uint32 b[27:0] - - - - - - - - edge 0x00043269 1 RW uint32 b[31:31] - - - - - - - - offset_cnt 0x0004326a 1 RO uint32 b[27:0] - - - - REG_EPCS 1 1 REG addr 0x00043240 1 WO uint32 b[31:0] - - - - - - - - rden 0x00043241 1 WO uint32 b[0:0] - - - - - - - - read_bit 0x00043242 1 WO uint32 b[0:0] - - - - - - - - write_bit 0x00043243 1 WO uint32 b[0:0] - - - - - - - - sector_erase 0x00043244 1 WO uint32 b[0:0] - - - - - - - - busy 0x00043245 1 RO uint32 b[0:0] - - - - - - - - unprotect 0x00043246 1 WO uint32 b[31:0] - - - - REG_DPMM_CTRL 1 1 REG rd_usedw 0x00043282 1 RO uint32 b[31:0] - - - - REG_DPMM_DATA 1 1 FIFO data 0x00043280 1 RO uint32 b[31:0] - - - - REG_MMDP_CTRL 1 1 REG wr_usedw 0x0004327e 1 RO uint32 b[31:0] - - - - - - - - wr_availw 0x0004327f 1 RO uint32 b[31:0] - - - - REG_MMDP_DATA 1 1 FIFO data 0x0004327c 1 WO uint32 b[31:0] - - - - REG_REMU 1 1 REG reconfigure 0x00043248 1 WO uint32 b[31:0] - - - - - - - - param 0x00043249 1 WO uint32 b[2:0] - - - - - - - - read_param 0x0004324a 1 WO uint32 b[0:0] - - - - - - - - write_param 0x0004324b 1 WO uint32 b[0:0] - - - - - - - - data_out 0x0004324c 1 RO uint32 b[31:0] - - - - - - - - data_in 0x0004324d 1 WO uint32 b[31:0] - - - - - - - - busy 0x0004324e 1 RO uint32 b[0:0] - - - - REG_SDP_INFO 1 1 REG block_period 0x000431e0 1 RO uint32 b[15:0] - - - - - - - - beam_repositioning_flag 0x000431e1 1 RW uint32 b[0:0] - - - - - - - - fsub_type 0x000431e2 1 RO uint32 b[0:0] - - - - - - - - f_adc 0x000431e3 1 RO uint32 b[0:0] - - - - - - - - nyquist_zone_index 0x000431e4 1 RW uint32 b[1:0] - - - - - - - - observation_id 0x000431e5 1 RW uint32 b[31:0] - - - - - - - - antenna_band_index 0x000431e6 1 RW uint32 b[0:0] - - - - - - - - station_id 0x000431e7 1 RW uint32 b[15:0] - - - - REG_RING_INFO 1 1 REG use_cable_to_previous_rn 0x00043254 1 RW uint32 b[0:0] - - - - - - - - use_cable_to_next_rn 0x00043255 1 RW uint32 b[0:0] - - - - - - - - n_rn 0x00043256 1 RW uint32 b[7:0] - - - - - - - - o_rn 0x00043257 1 RW uint32 b[7:0] - - - - PIO_JESD_CTRL 1 1 REG enable 0x00043272 1 RW uint32 b[30:0] - - - - - - - - reset 0x00043272 1 RW uint32 b[31:31] - - - - JESD204B 1 12 REG rx_lane_ctrl_common 0x00042000 1 RW uint32 b[2:0] - - 256 - - - - - rx_lane_ctrl_0 0x00042001 1 RW uint32 b[2:0] - - - - - - - - rx_lane_ctrl_1 0x00042002 1 RW uint32 b[2:0] - - - - - - - - rx_lane_ctrl_2 0x00042003 1 RW uint32 b[2:0] - - - - - - - - rx_lane_ctrl_3 0x00042004 1 RW uint32 b[2:0] - - - - - - - - rx_lane_ctrl_4 0x00042005 1 RW uint32 b[2:0] - - - - - - - - rx_lane_ctrl_5 0x00042006 1 RW uint32 b[2:0] - - - - - - - - rx_lane_ctrl_6 0x00042007 1 RW uint32 b[2:0] - - - - - - - - rx_lane_ctrl_7 0x00042008 1 RW uint32 b[2:0] - - - - - - - - rx_dll_ctrl 0x00042014 1 RW uint32 b[16:0] - - - - - - - - rx_syncn_sysref_ctrl 0x00042015 1 RW uint32 b[24:0] - - - - - - - - rx_csr_link_reinit 0x00042015 1 RW uint32 b[0:0] - - - - - - - - rx_csr_sysref_alwayson 0x00042015 1 RW uint32 b[1:1] - - - - - - - - rx_csr_sysref_singled 0x00042015 1 RW uint32 b[2:2] - - - - - - - - rx_csr_rbd_offset 0x00042015 1 RW uint32 b[10:3] - - - - - - - - rx_csr_lmfc_offset 0x00042015 1 RW uint32 b[19:12] - - - - - - - - ctrl_reserve 0x00042016 1 RO uint32 b[31:0] - - - - - - - - rx_err0 0x00042018 1 RW uint32 b[8:0] - - - - - - - - rx_err1 0x00042019 1 RW uint32 b[9:0] - - - - - - - - rx_err_enable 0x0004201d 1 RW uint32 b[31:0] - - - - - - - - rx_err_link_reinit 0x0004201e 1 RW uint32 b[31:0] - - - - - - - - csr_dev_syncn 0x00042020 1 RO uint32 b[0:0] - - - - - - - - csr_rbd_count 0x00042020 1 RO uint32 b[10:3] - - - - - - - - rx_status1 0x00042021 1 RW uint32 b[23:0] - - - - - - - - rx_status2 0x00042022 1 RW uint32 b[23:0] - - - - - - - - rx_status3 0x00042023 1 RW uint32 b[7:0] - - - - - - - - rx_ilas_csr_l 0x00042025 1 RW uint32 b[4:0] - - - - - - - - rx_ilas_csr_f 0x00042025 1 RW uint32 b[15:8] - - - - - - - - rx_ilas_csr_k 0x00042025 1 RW uint32 b[20:16] - - - - - - - - rx_ilas_csr_m 0x00042025 1 RW uint32 b[31:24] - - - - - - - - rx_ilas_csr_n 0x00042026 1 RW uint32 b[4:0] - - - - - - - - rx_ilas_csr_cs 0x00042026 1 RW uint32 b[7:6] - - - - - - - - rx_ilas_csr_np 0x00042026 1 RW uint32 b[12:8] - - - - - - - - rx_ilas_csr_subclassv 0x00042026 1 RW uint32 b[15:13] - - - - - - - - rx_ilas_csr_s 0x00042026 1 RW uint32 b[20:16] - - - - - - - - rx_ilas_csr_jesdv 0x00042026 1 RW uint32 b[23:21] - - - - - - - - rx_ilas_csr_cf 0x00042026 1 RW uint32 b[28:24] - - - - - - - - rx_ilas_csr_hd 0x00042026 1 RW uint32 b[31:31] - - - - - - - - rx_status4 0x0004203c 1 RW uint32 b[15:0] - - - - - - - - rx_status5 0x0004203d 1 RW uint32 b[15:0] - - - - - - - - rx_status6 0x0004203e 1 RW uint32 b[23:0] - - - - - - - - rx_status7 0x0004203f 1 RO uint32 b[31:0] - - - - REG_DP_SHIFTRAM 1 12 REG shift 0x00043140 1 RW uint32 b[11:0] - - 2 - REG_BSN_SOURCE_V2 1 1 REG dp_on 0x00043230 1 RW uint32 b[0:0] - - - - - - - - dp_on_pps 0x00043230 1 RW uint32 b[1:1] - - - - - - - - nof_clk_per_sync 0x00043231 1 RW uint32 b[31:0] - - - - - - - - bsn_init 0x00043232 1 RW uint64 b[31:0] b[31:0] - - - - - - - - 0x00043233 - - - b[31:0] b[63:32] - - - - - - - bsn_time_offset 0x00043234 1 RW uint32 b[9:0] - - - - REG_BSN_SCHEDULER 1 1 REG scheduled_bsn 0x00043278 1 RW uint64 b[31:0] b[31:0] - - - - - - - - 0x00043279 - - - b[31:0] b[63:32] - - + AVS_ETH_0_TSE 1 1 REG rev 0x00000400 1 RO uint32 b[31:0] - - - + - - - - scratch 0x00000404 1 RW uint32 b[31:0] - - - + - - - - command_config 0x00000408 1 RW uint32 b[31:0] - - - + - - - - mac_0 0x0000040c 1 RW uint32 b[31:0] - - - + - - - - mac_1 0x00000410 1 RW uint32 b[31:0] - - - + - - - - frm_length 0x00000414 1 RW uint32 b[31:0] - - - + - - - - pause_quant 0x00000418 1 RW uint32 b[31:0] - - - + - - - - rx_section_empty 0x0000041c 1 RW uint32 b[31:0] - - - + - - - - rx_section_full 0x00000420 1 RW uint32 b[31:0] - - - + - - - - tx_section_empty 0x00000424 1 RW uint32 b[31:0] - - - + - - - - tx_section_full 0x00000428 1 RW uint32 b[31:0] - - - + - - - - rx_almost_empty 0x0000042c 1 RW uint32 b[31:0] - - - + - - - - rx_almost_full 0x00000430 1 RW uint32 b[31:0] - - - + - - - - tx_almost_empty 0x00000434 1 RW uint32 b[31:0] - - - + - - - - tx_almost_full 0x00000438 1 RW uint32 b[31:0] - - - + - - - - mdio_addr0 0x0000043c 1 RW uint32 b[31:0] - - - + - - - - mdio_addr1 0x00000440 1 RW uint32 b[31:0] - - - + - - - - holdoff_quant 0x00000444 1 RW uint32 b[31:0] - - - + - - - - tx_ipg_length 0x0000045c 1 RW uint32 b[31:0] - - - + - - - - amacid 0x00000460 1 RO uint64 b[31:0] b[31:0] - - + - - - - - 0x00000461 - - - b[31:0] b[63:32] - - + - - - - aframestransmittedok 0x00000468 1 RO uint32 b[31:0] - - - + - - - - aframesreceivedok 0x0000046c 1 RO uint32 b[31:0] - - - + - - - - aframechecksequenceerrors 0x00000470 1 RO uint32 b[31:0] - - - + - - - - aalignmenterrors 0x00000474 1 RO uint32 b[31:0] - - - + - - - - aoctetstransmittedok 0x00000478 1 RO uint32 b[31:0] - - - + - - - - aoctetsreceivedok 0x0000047c 1 RO uint32 b[31:0] - - - + - - - - atxpausemacctrlframes 0x00000480 1 RO uint32 b[31:0] - - - + - - - - arxpausemacctrlframes 0x00000484 1 RO uint32 b[31:0] - - - + - - - - ifinerrors 0x00000488 1 RO uint32 b[31:0] - - - + - - - - ifouterrors 0x0000048c 1 RO uint32 b[31:0] - - - + - - - - ifinucastpkts 0x00000490 1 RO uint32 b[31:0] - - - + - - - - ifinmulticastpkts 0x00000494 1 RO uint32 b[31:0] - - - + - - - - ifinbroadcastpkts 0x00000498 1 RO uint32 b[31:0] - - - + - - - - ifoutucastpkts 0x000004a0 1 RO uint32 b[31:0] - - - + - - - - ifoutmulticastpkts 0x000004a4 1 RO uint32 b[31:0] - - - + - - - - ifoutbroadcastpkts 0x000004a8 1 RO uint32 b[31:0] - - - + - - - - etherstatsdropevents 0x000004ac 1 RO uint32 b[31:0] - - - + - - - - etherstatsoctets 0x000004b0 1 RO uint32 b[31:0] - - - + - - - - etherstatspkts 0x000004b4 1 RO uint32 b[31:0] - - - + - - - - etherstatsundersizepkts 0x000004b8 1 RO uint32 b[31:0] - - - + - - - - etherstatsoversizepkts 0x000004bc 1 RO uint32 b[31:0] - - - + - - - - etherstatspkts64octets 0x000004c0 1 RO uint32 b[31:0] - - - + - - - - etherstatspkts65to127octets 0x000004c4 1 RO uint32 b[31:0] - - - + - - - - etherstatspkts128to255octets 0x000004c8 1 RO uint32 b[31:0] - - - + - - - - etherstatspkts256to511octets 0x000004cc 1 RO uint32 b[31:0] - - - + - - - - etherstatspkts512to1023octets 0x000004d0 1 RO uint32 b[31:0] - - - + - - - - etherstatspkts1024to1518octets 0x000004d4 1 RO uint32 b[31:0] - - - + - - - - etherstatspkts1519toxoctets 0x000004d8 1 RO uint32 b[31:0] - - - + - - - - etherstatsjabbers 0x000004dc 1 RO uint32 b[31:0] - - - + - - - - etherstatsfragments 0x000004e0 1 RO uint32 b[31:0] - - - + - - - - tx_cmd_stat 0x000004e8 1 RW uint32 b[31:0] - - - + - - - - rx_cmd_stat 0x000004ec 1 RW uint32 b[31:0] - - - + - - - - msb_aoctetstransmittedok 0x000004f0 1 RO uint32 b[31:0] - - - + - - - - msb_aoctetsreceivedok 0x000004f4 1 RO uint32 b[31:0] - - - + - - - - msb_etherstatsoctets 0x000004f8 1 RO uint32 b[31:0] - - - + - - - - pcs_control 0x00000600 1 RW uint32 b[15:0] - - - + - - - - pcs_status 0x00000604 1 RO uint32 b[15:0] - - - + - - - - pcs_phy_identifier_msb 0x00000608 1 RO uint32 b[15:0] - - - + - - - - pcs_phy_identifier_lsb 0x0000060c 1 RO uint32 b[15:0] - - - + - - - - pcs_dev_ability 0x00000610 1 RW uint32 b[15:0] - - - + - - - - pcs_partner_ability 0x00000614 1 RO uint32 b[15:0] - - - + - - - - pcs_an_expansion 0x00000618 1 RO uint32 b[15:0] - - - + - - - - pcs_scratch 0x00000640 1 RW uint32 b[15:0] - - - + - - - - pcs_rev 0x00000644 1 RO uint32 b[15:0] - - - + - - - - pcs_link_timer_lsb 0x00000648 1 RW uint32 b[15:0] - - - + - - - - pcs_link_timer_msb 0x0000064c 1 RW uint32 b[15:0] - - - + - - - - pcs_if_mode 0x00000650 1 RW uint32 b[15:0] - - - + - - - - tx_period 0x00000740 1 RW uint32 b[31:0] - - - + - - - - tx_adjust_fns 0x00000744 1 RW uint32 b[15:0] - - - + - - - - tx_adjust_ns 0x00000748 1 RW uint32 b[15:0] - - - + - - - - rx_period 0x0000074c 1 RW uint32 b[31:0] - - - + - - - - rx_adjust_fns 0x00000750 1 RW uint32 b[15:0] - - - + - - - - rx_adjust_ns 0x00000754 1 RW uint32 b[15:0] - - - + - - - - measure_valid 0x00000784 1 RO uint32 b[0:0] - - - + - - - - dl_reset 0x00000784 1 RW uint32 b[1:1] - - - + - - - - tx_delay 0x00000788 1 RO uint32 b[20:0] - - - + - - - - rx_delay 0x0000078c 1 RO uint32 b[20:0] - - - + AVS_ETH_0_REG 1 1 REG demux 0x00000c10 4 RW uint32 b[16:0] - - - + - - - - config_mac_address 0x00000c14 1 RO uint64 b[31:0] b[31:0] - - + - - - - - 0x00000c15 - - - b[15:0] b[47:32] - - + - - - - config_ip_address 0x00000c16 1 RO uint32 b[31:0] - - - + - - - - config_udp_ctrl_port 0x00000c17 1 RO uint32 b[15:0] - - - + - - - - control 0x00000c18 1 RO uint32 b[31:0] - - - + - - - - control_rx_en 0x00000c18 1 RO uint32 b[0:0] - - - + - - - - control_tx_en 0x00000c18 1 RO uint32 b[1:1] - - - + - - - - control_tx_request 0x00000c18 1 RO uint32 b[2:2] - - - + - - - - control_tx_empty 0x00000c18 1 RO uint32 b[17:16] - - - + - - - - control_tx_nof_words 0x00000c18 1 RO uint32 b[29:18] - - - + - - - - frame 0x00000c19 1 RO uint32 b[31:0] - - - + - - - - frame_eth_mac_error 0x00000c19 1 RO uint32 b[5:0] - - - + - - - - frame_mac_address_match 0x00000c19 1 RO uint32 b[7:7] - - - + - - - - frame_is_arp 0x00000c19 1 RO uint32 b[8:8] - - - + - - - - frame_is_ip 0x00000c19 1 RO uint32 b[9:9] - - - + - - - - frame_ip_checksum_ok 0x00000c19 1 RO uint32 b[10:10] - - - + - - - - frame_ip_address_match 0x00000c19 1 RO uint32 b[11:11] - - - + - - - - frame_is_icmp 0x00000c19 1 RO uint32 b[12:12] - - - + - - - - frame_is_udp 0x00000c19 1 RO uint32 b[13:13] - - - + - - - - frame_is_udp_ctrl_port 0x00000c19 1 RO uint32 b[14:14] - - - + - - - - status 0x00000c1a 1 RO uint32 b[31:0] - - - + - - - - status_rx_avail 0x00000c1a 1 RO uint32 b[0:0] - - - + - - - - status_tx_done 0x00000c1a 1 RO uint32 b[1:1] - - - + - - - - status_tx_avail 0x00000c1a 1 RO uint32 b[2:2] - - - + - - - - status_rx_empty 0x00000c1a 1 RO uint32 b[17:16] - - - + - - - - status_rx_nof_words 0x00000c1a 1 RO uint32 b[29:18] - - - + AVS_ETH_0_RAM 1 1 RAM data 0x00000800 1024 RO uint32 b[31:0] - - - + PIO_PPS 1 1 REG capture_cnt 0x00051268 1 RO uint32 b[29:0] - - - + - - - - stable 0x00051268 1 RO uint32 b[30:30] - - - + - - - - toggle 0x00051268 1 RO uint32 b[31:31] - - - + - - - - expected_cnt 0x00051269 1 RW uint32 b[27:0] - - - + - - - - edge 0x00051269 1 RW uint32 b[31:31] - - - + - - - - offset_cnt 0x0005126a 1 RO uint32 b[27:0] - - - + REG_EPCS 1 1 REG addr 0x00051240 1 WO uint32 b[31:0] - - - + - - - - rden 0x00051241 1 WO uint32 b[0:0] - - - + - - - - read_bit 0x00051242 1 WO uint32 b[0:0] - - - + - - - - write_bit 0x00051243 1 WO uint32 b[0:0] - - - + - - - - sector_erase 0x00051244 1 WO uint32 b[0:0] - - - + - - - - busy 0x00051245 1 RO uint32 b[0:0] - - - + - - - - unprotect 0x00051246 1 WO uint32 b[31:0] - - - + REG_DPMM_CTRL 1 1 REG rd_usedw 0x00051282 1 RO uint32 b[31:0] - - - + REG_DPMM_DATA 1 1 FIFO data 0x00051280 1 RO uint32 b[31:0] - - - + REG_MMDP_CTRL 1 1 REG wr_usedw 0x0005127e 1 RO uint32 b[31:0] - - - + - - - - wr_availw 0x0005127f 1 RO uint32 b[31:0] - - - + REG_MMDP_DATA 1 1 FIFO data 0x0005127c 1 WO uint32 b[31:0] - - - + REG_REMU 1 1 REG reconfigure 0x00051248 1 WO uint32 b[31:0] - - - + - - - - param 0x00051249 1 WO uint32 b[2:0] - - - + - - - - read_param 0x0005124a 1 WO uint32 b[0:0] - - - + - - - - write_param 0x0005124b 1 WO uint32 b[0:0] - - - + - - - - data_out 0x0005124c 1 RO uint32 b[31:0] - - - + - - - - data_in 0x0005124d 1 WO uint32 b[31:0] - - - + - - - - busy 0x0005124e 1 RO uint32 b[0:0] - - - + REG_SDP_INFO 1 1 REG block_period 0x000511e0 1 RO uint32 b[15:0] - - - + - - - - beam_repositioning_flag 0x000511e1 1 RW uint32 b[0:0] - - - + - - - - fsub_type 0x000511e2 1 RO uint32 b[0:0] - - - + - - - - f_adc 0x000511e3 1 RO uint32 b[0:0] - - - + - - - - nyquist_zone_index 0x000511e4 1 RW uint32 b[1:0] - - - + - - - - observation_id 0x000511e5 1 RW uint32 b[31:0] - - - + - - - - antenna_band_index 0x000511e6 1 RW uint32 b[0:0] - - - + - - - - station_id 0x000511e7 1 RW uint32 b[9:0] - - - + - - - - antenna_field_index 0x000511e8 1 RW uint32 b[5:0] - - - + REG_RING_INFO 1 1 REG use_cable_to_previous_rn 0x00051254 1 RW uint32 b[0:0] - - - + - - - - use_cable_to_next_rn 0x00051255 1 RW uint32 b[0:0] - - - + - - - - n_rn 0x00051256 1 RW uint32 b[7:0] - - - + - - - - o_rn 0x00051257 1 RW uint32 b[7:0] - - - + PIO_JESD_CTRL 1 1 REG disable 0x00051272 1 RW uint32 b[30:0] - - - + - - - - reset 0x00051272 1 RW uint32 b[31:31] - - - + JESD204B 1 12 REG rx_lane_ctrl_common 0x00050000 1 RW uint32 b[2:0] - - 256 + - - - - rx_lane_ctrl_0 0x00050001 1 RW uint32 b[2:0] - - - + - - - - rx_lane_ctrl_1 0x00050002 1 RW uint32 b[2:0] - - - + - - - - rx_lane_ctrl_2 0x00050003 1 RW uint32 b[2:0] - - - + - - - - rx_lane_ctrl_3 0x00050004 1 RW uint32 b[2:0] - - - + - - - - rx_lane_ctrl_4 0x00050005 1 RW uint32 b[2:0] - - - + - - - - rx_lane_ctrl_5 0x00050006 1 RW uint32 b[2:0] - - - + - - - - rx_lane_ctrl_6 0x00050007 1 RW uint32 b[2:0] - - - + - - - - rx_lane_ctrl_7 0x00050008 1 RW uint32 b[2:0] - - - + - - - - rx_dll_ctrl 0x00050014 1 RW uint32 b[16:0] - - - + - - - - rx_syncn_sysref_ctrl 0x00050015 1 RW uint32 b[24:0] - - - + - - - - rx_csr_link_reinit 0x00050015 1 RW uint32 b[0:0] - - - + - - - - rx_csr_sysref_alwayson 0x00050015 1 RW uint32 b[1:1] - - - + - - - - rx_csr_sysref_singled 0x00050015 1 RW uint32 b[2:2] - - - + - - - - rx_csr_rbd_offset 0x00050015 1 RW uint32 b[10:3] - - - + - - - - rx_csr_lmfc_offset 0x00050015 1 RW uint32 b[19:12] - - - + - - - - ctrl_reserve 0x00050016 1 RO uint32 b[31:0] - - - + - - - - rx_err0 0x00050018 1 RW uint32 b[8:0] - - - + - - - - rx_err1 0x00050019 1 RW uint32 b[9:0] - - - + - - - - rx_err_enable 0x0005001d 1 RW uint32 b[31:0] - - - + - - - - rx_err_link_reinit 0x0005001e 1 RW uint32 b[31:0] - - - + - - - - csr_dev_syncn 0x00050020 1 RO uint32 b[0:0] - - - + - - - - csr_rbd_count 0x00050020 1 RO uint32 b[10:3] - - - + - - - - rx_status1 0x00050021 1 RW uint32 b[23:0] - - - + - - - - rx_status2 0x00050022 1 RW uint32 b[23:0] - - - + - - - - rx_status3 0x00050023 1 RW uint32 b[7:0] - - - + - - - - rx_ilas_csr_l 0x00050025 1 RW uint32 b[4:0] - - - + - - - - rx_ilas_csr_f 0x00050025 1 RW uint32 b[15:8] - - - + - - - - rx_ilas_csr_k 0x00050025 1 RW uint32 b[20:16] - - - + - - - - rx_ilas_csr_m 0x00050025 1 RW uint32 b[31:24] - - - + - - - - rx_ilas_csr_n 0x00050026 1 RW uint32 b[4:0] - - - + - - - - rx_ilas_csr_cs 0x00050026 1 RW uint32 b[7:6] - - - + - - - - rx_ilas_csr_np 0x00050026 1 RW uint32 b[12:8] - - - + - - - - rx_ilas_csr_subclassv 0x00050026 1 RW uint32 b[15:13] - - - + - - - - rx_ilas_csr_s 0x00050026 1 RW uint32 b[20:16] - - - + - - - - rx_ilas_csr_jesdv 0x00050026 1 RW uint32 b[23:21] - - - + - - - - rx_ilas_csr_cf 0x00050026 1 RW uint32 b[28:24] - - - + - - - - rx_ilas_csr_hd 0x00050026 1 RW uint32 b[31:31] - - - + - - - - rx_status4 0x0005003c 1 RW uint32 b[15:0] - - - + - - - - rx_status5 0x0005003d 1 RW uint32 b[15:0] - - - + - - - - rx_status6 0x0005003e 1 RW uint32 b[23:0] - - - + - - - - rx_status7 0x0005003f 1 RO uint32 b[31:0] - - - + REG_DP_SHIFTRAM 1 12 REG shift 0x00051140 1 RW uint32 b[11:0] - - 2 + REG_BSN_SOURCE_V2 1 1 REG dp_on 0x00051230 1 RW uint32 b[0:0] - - - + - - - - dp_on_pps 0x00051230 1 RW uint32 b[1:1] - - - + - - - - nof_clk_per_sync 0x00051231 1 RW uint32 b[31:0] - - - + - - - - bsn_init 0x00051232 1 RW uint64 b[31:0] b[31:0] - - + - - - - - 0x00051233 - - - b[31:0] b[63:32] - - + - - - - bsn_time_offset 0x00051234 1 RW uint32 b[9:0] - - - + REG_BSN_SCHEDULER 1 1 REG scheduled_bsn 0x00051278 1 RW uint64 b[31:0] b[31:0] - - + - - - - - 0x00051279 - - - b[31:0] b[63:32] - - REG_BSN_MONITOR_INPUT 1 1 REG xon_stable 0x00000100 1 RO uint32 b[0:0] - - - - - - - ready_stable 0x00000100 1 RO uint32 b[1:1] - - - - - - - sync_timeout 0x00000100 1 RO uint32 b[2:2] - - - @@ -143,27 +247,28 @@ number_of_columns = 13 - - - - bsn_first 0x00000106 1 RO uint64 b[31:0] b[31:0] - - - - - - - 0x00000107 - - - b[31:0] b[63:32] - - - - - - bsn_first_cycle_cnt 0x00000108 1 RO uint32 b[31:0] - - - - REG_WG 1 12 REG mode 0x00043080 1 RW uint32 b[7:0] - - 4 - - - - - nof_samples 0x00043080 1 RW uint32 b[31:16] - - - - - - - - phase 0x00043081 1 RW uint32 b[15:0] - - - - - - - - freq 0x00043082 1 RW uint32 b[30:0] - - - - - - - - ampl 0x00043083 1 RW uint32 b[16:0] - - - - RAM_WG 1 12 RAM data 0x00034000 1024 RW uint32 b[17:0] - - 1024 + REG_WG 1 12 REG mode 0x00051080 1 RW uint32 b[7:0] - - 4 + - - - - nof_samples 0x00051080 1 RW uint32 b[31:16] - - - + - - - - phase 0x00051081 1 RW uint32 b[15:0] - - - + - - - - freq 0x00051082 1 RW uint32 b[30:0] - - - + - - - - ampl 0x00051083 1 RW uint32 b[16:0] - - - + RAM_WG 1 12 RAM data 0x0004c000 1024 RW uint32 b[17:0] - - 1024 RAM_ST_HISTOGRAM 1 12 RAM data 0x00002000 512 RW uint32 b[31:0] b[27:0] - 512 - REG_ADUH_MONITOR 1 12 REG mean_sum 0x000430c0 1 RO int64 b[31:0] b[31:0] - 4 - - - - - - 0x000430c1 - - - b[31:0] b[63:32] - - - - - - - power_sum 0x000430c2 1 RO int64 b[31:0] b[31:0] - - - - - - - - 0x000430c3 - - - b[31:0] b[63:32] - - - REG_DIAG_DATA_BUFFER_BSN 1 12 REG sync_cnt 0x00043120 1 RO uint32 b[31:0] - - 2 - - - - - word_cnt 0x00043121 1 RO uint32 b[31:0] - - - + REG_ADUH_MONITOR 1 12 REG mean_sum 0x000510c0 1 RO int64 b[31:0] b[31:0] - 4 + - - - - - 0x000510c1 - - - b[31:0] b[63:32] - - + - - - - power_sum 0x000510c2 1 RO int64 b[31:0] b[31:0] - - + - - - - - 0x000510c3 - - - b[31:0] b[63:32] - - + REG_DIAG_DATA_BUFFER_BSN 1 12 REG sync_cnt 0x00051120 1 RO uint32 b[31:0] - - 2 + - - - - word_cnt 0x00051121 1 RO uint32 b[31:0] - - - RAM_DIAG_DATA_BUFFER_BSN 1 12 RAM data 0x00200000 1024 RW uint32 b[31:0] b[15:0] - 1024 - REG_SI 1 1 REG enable 0x0004327a 1 RW uint32 b[0:0] - - - - RAM_FIL_COEFS 1 16 RAM data 0x00038000 1024 RW uint32 b[15:0] - - 1024 - RAM_EQUALIZER_GAINS 1 6 RAM data 0x00040000 1024 RW cint16_ir b[31:0] - - 1024 - REG_DP_SELECTOR 1 1 REG input_select 0x00043276 1 RW uint32 b[0:0] - - - - RAM_ST_SST 1 6 RAM data 0x0003c000 1024 RW uint64 b[31:0] b[31:0] - 2048 - - - - - - 0x0003c001 - - - b[21:0] b[53:32] - - - REG_STAT_ENABLE_SST 1 1 REG enable 0x00043270 1 RW uint32 b[0:0] - - - + REG_SI 1 1 REG enable 0x0005127a 1 RW uint32 b[11:0] - - - + RAM_FIL_COEFS 2 16 RAM data 0x00030000 1024 RW uint32 b[15:0] - 16384 1024 + RAM_EQUALIZER_GAINS 1 12 RAM data 0x00044000 1024 RW cint16_ir b[31:0] - - 1024 + RAM_EQUALIZER_GAINS_CROSS 1 12 RAM data 0x00040000 1024 RW cint16_ir b[31:0] - - 1024 + REG_DP_SELECTOR 1 1 REG input_select 0x00051276 1 RW uint32 b[0:0] - - - + RAM_ST_SST 1 12 RAM data 0x00038000 1024 RW uint64 b[31:0] b[31:0] - 2048 + - - - - - 0x00038001 - - - b[21:0] b[53:32] - - + REG_STAT_ENABLE_SST 1 1 REG enable 0x00051270 1 RW uint32 b[0:0] - - - REG_STAT_HDR_DAT_SST 1 1 REG bsn 0x00000c40 1 RW uint64 b[31:0] b[31:0] - - - - - - - 0x00000c41 - - - b[31:0] b[63:32] - - - - - - sdp_block_period 0x00000c42 1 RW uint32 b[15:0] - - - @@ -184,10 +289,11 @@ number_of_columns = 13 - - - - sdp_source_info_f_adc 0x00000c4f 1 RW uint32 b[12:12] - - - - - - - sdp_source_info_nyquist_zone_index 0x00000c50 1 RW uint32 b[14:13] - - - - - - - sdp_source_info_antenna_band_index 0x00000c51 1 RW uint32 b[15:15] - - - - - - - - sdp_station_id 0x00000c52 1 RW uint32 b[15:0] - - - + - - - - sdp_station_info_station_id 0x00000c52 1 RW uint32 b[9:0] - - - + - - - - sdp_station_info_antenna_field_index 0x00000c52 1 RW uint32 b[15:10] - - - - - - - sdp_observation_id 0x00000c53 1 RW uint32 b[31:0] - - - - - - - - sdp_version_id 0x00000c54 1 RO uint32 b[7:0] - - - - - - - - sdp_marker 0x00000c55 1 RO uint32 b[7:0] - - - + - - - - sdp_version_id 0x00000c54 1 RW uint32 b[7:0] - - - + - - - - sdp_marker 0x00000c55 1 RW uint32 b[7:0] - - - - - - - udp_checksum 0x00000c56 1 RW uint32 b[15:0] - - - - - - - udp_length 0x00000c57 1 RW uint32 b[15:0] - - - - - - - udp_destination_port 0x00000c58 1 RW uint32 b[15:0] - - - @@ -204,42 +310,42 @@ number_of_columns = 13 - - - - ip_services 0x00000c63 1 RW uint32 b[7:0] - - - - - - - ip_header_length 0x00000c64 1 RW uint32 b[3:0] - - - - - - - ip_version 0x00000c65 1 RW uint32 b[3:0] - - - - - - - - eth_type 0x00000c66 1 RO uint32 b[15:0] - - - - - - - - eth_source_mac 0x00000c67 1 RO uint64 b[31:0] b[31:0] - - + - - - - eth_type 0x00000c66 1 RW uint32 b[15:0] - - - + - - - - eth_source_mac 0x00000c67 1 RW uint64 b[31:0] b[31:0] - - - - - - - 0x00000c68 - - - b[15:0] b[47:32] - - - - - - eth_destination_mac 0x00000c69 1 RW uint64 b[31:0] b[31:0] - - - - - - - 0x00000c6a - - - b[15:0] b[47:32] - - - - - - word_align 0x00000c6b 1 RW uint32 b[15:0] - - - - REG_BSN_MONITOR_V2_SST_OFFLOAD 1 1 REG xon_stable 0x00043210 1 RO uint32 b[0:0] - - - - - - - - ready_stable 0x00043210 1 RO uint32 b[1:1] - - - - - - - - sync_timeout 0x00043210 1 RO uint32 b[2:2] - - - - - - - - bsn_at_sync 0x00043211 1 RO uint64 b[31:0] b[31:0] - - - - - - - - 0x00043212 - - - b[31:0] b[63:32] - - - - - - - nof_sop 0x00043213 1 RO uint32 b[31:0] - - - - - - - - nof_valid 0x00043214 1 RO uint32 b[31:0] - - - - - - - - nof_err 0x00043215 1 RO uint32 b[31:0] - - - - - - - - latency 0x00043218 1 RO uint32 b[31:0] - - - - REG_BSN_SYNC_SCHEDULER_XSUB 1 1 REG ctrl_enable 0x000431c0 1 RW uint32 b[0:0] - - - - - - - - ctrl_interval_size 0x000431c1 1 RW uint32 b[30:0] - - - - - - - - ctrl_start_bsn 0x000431c2 1 RW uint64 b[31:0] b[31:0] - - - - - - - - 0x000431c3 - - - b[31:0] b[63:32] - - - - - - - mon_current_input_bsn 0x000431c4 1 RO uint64 b[31:0] b[31:0] - - - - - - - - 0x000431c5 - - - b[31:0] b[63:32] - - - - - - - mon_input_bsn_at_sync 0x000431c6 1 RO uint64 b[31:0] b[31:0] - - - - - - - - 0x000431c7 - - - b[31:0] b[63:32] - - - - - - - mon_output_enable 0x000431c8 1 RO uint32 b[0:0] - - - - - - - - mon_output_sync_bsn 0x000431c9 1 RO uint64 b[31:0] b[31:0] - - - - - - - - 0x000431ca - - - b[31:0] b[63:32] - - - - - - - block_size 0x000431cb 1 RO uint32 b[31:0] - - - + REG_BSN_MONITOR_V2_SST_OFFLOAD 1 1 REG xon_stable 0x00051210 1 RO uint32 b[0:0] - - - + - - - - ready_stable 0x00051210 1 RO uint32 b[1:1] - - - + - - - - sync_timeout 0x00051210 1 RO uint32 b[2:2] - - - + - - - - bsn_at_sync 0x00051211 1 RO uint64 b[31:0] b[31:0] - - + - - - - - 0x00051212 - - - b[31:0] b[63:32] - - + - - - - nof_sop 0x00051213 1 RO uint32 b[31:0] - - - + - - - - nof_valid 0x00051214 1 RO uint32 b[31:0] - - - + - - - - nof_err 0x00051215 1 RO uint32 b[31:0] - - - + - - - - latency 0x00051216 1 RO uint32 b[31:0] - - - + REG_BSN_SYNC_SCHEDULER_XSUB 1 1 REG ctrl_enable 0x000511c0 1 RW uint32 b[0:0] - - - + - - - - ctrl_interval_size 0x000511c1 1 RW uint32 b[30:0] - - - + - - - - ctrl_start_bsn 0x000511c2 1 RW uint64 b[31:0] b[31:0] - - + - - - - - 0x000511c3 - - - b[31:0] b[63:32] - - + - - - - mon_current_input_bsn 0x000511c4 1 RO uint64 b[31:0] b[31:0] - - + - - - - - 0x000511c5 - - - b[31:0] b[63:32] - - + - - - - mon_input_bsn_at_sync 0x000511c6 1 RO uint64 b[31:0] b[31:0] - - + - - - - - 0x000511c7 - - - b[31:0] b[63:32] - - + - - - - mon_output_enable 0x000511c8 1 RO uint32 b[0:0] - - - + - - - - mon_output_sync_bsn 0x000511c9 1 RO uint64 b[31:0] b[31:0] - - + - - - - - 0x000511ca - - - b[31:0] b[63:32] - - + - - - - block_size 0x000511cb 1 RO uint32 b[31:0] - - - RAM_ST_XSQ 1 9 RAM data 0x00010000 1008 RW cint64_ir b[31:0] b[31:0] - 4096 - - - - - 0x00010001 - - - b[31:0] b[63:32] - - - - - - - 0x00010002 - - - b[31:0] b[95:64] - - - - - - - 0x00010003 - - - b[31:0] b[127:96] - - - REG_CROSSLETS_INFO 1 1 REG offset 0x000431d0 15 RW uint32 b[31:0] - - - - - - - - step 0x000431df 1 RW uint32 b[31:0] - - - - REG_NOF_CROSSLETS 1 1 REG nof_crosslets 0x0004326c 1 RW uint32 b[31:0] - - - - - - - - unused 0x0004326d 1 RW uint32 b[31:0] - - - - REG_STAT_ENABLE_XST 1 1 REG enable 0x0004326e 1 RW uint32 b[0:0] - - - + REG_CROSSLETS_INFO 1 1 REG offset 0x000511d0 15 RW uint32 b[31:0] - - - + - - - - step 0x000511df 1 RW uint32 b[31:0] - - - + REG_NOF_CROSSLETS 1 1 REG nof_crosslets 0x0005126c 1 RW uint32 b[31:0] - - - + - - - - unused 0x0005126d 1 RW uint32 b[31:0] - - - + REG_STAT_ENABLE_XST 1 1 REG enable 0x0005126e 1 RW uint32 b[0:0] - - - REG_STAT_HDR_DAT_XST 1 1 REG bsn 0x00000040 1 RW uint64 b[31:0] b[31:0] - - - - - - - 0x00000041 - - - b[31:0] b[63:32] - - - - - - block_period 0x00000042 1 RW uint32 b[15:0] - - - @@ -262,10 +368,11 @@ number_of_columns = 13 - - - - sdp_source_info_f_adc 0x0000004f 1 RW uint32 b[12:12] - - - - - - - sdp_source_info_nyquist_zone_index 0x00000050 1 RW uint32 b[14:13] - - - - - - - sdp_source_info_antenna_band_index 0x00000051 1 RW uint32 b[15:15] - - - - - - - - sdp_station_id 0x00000052 1 RW uint32 b[15:0] - - - + - - - - sdp_station_info_station_id 0x00000052 1 RW uint32 b[9:0] - - - + - - - - sdp_station_info_antenna_field_index 0x00000052 1 RW uint32 b[15:10] - - - - - - - sdp_observation_id 0x00000053 1 RW uint32 b[31:0] - - - - - - - - sdp_version_id 0x00000054 1 RO uint32 b[7:0] - - - - - - - - sdp_marker 0x00000055 1 RO uint32 b[7:0] - - - + - - - - sdp_version_id 0x00000054 1 RW uint32 b[7:0] - - - + - - - - sdp_marker 0x00000055 1 RW uint32 b[7:0] - - - - - - - udp_checksum 0x00000056 1 RW uint32 b[15:0] - - - - - - - udp_length 0x00000057 1 RW uint32 b[15:0] - - - - - - - udp_destination_port 0x00000058 1 RW uint32 b[15:0] - - - @@ -282,14 +389,14 @@ number_of_columns = 13 - - - - ip_services 0x00000063 1 RW uint32 b[7:0] - - - - - - - ip_header_length 0x00000064 1 RW uint32 b[3:0] - - - - - - - ip_version 0x00000065 1 RW uint32 b[3:0] - - - - - - - - eth_type 0x00000066 1 RO uint32 b[15:0] - - - - - - - - eth_source_mac 0x00000067 1 RO uint64 b[31:0] b[31:0] - - + - - - - eth_type 0x00000066 1 RW uint32 b[15:0] - - - + - - - - eth_source_mac 0x00000067 1 RW uint64 b[31:0] b[31:0] - - - - - - - 0x00000068 - - - b[15:0] b[47:32] - - - - - - eth_destination_mac 0x00000069 1 RW uint64 b[31:0] b[31:0] - - - - - - - 0x0000006a - - - b[15:0] b[47:32] - - - - - - word_align 0x0000006b 1 RW uint32 b[15:0] - - - - REG_BSN_ALIGN_V2_XSUB 1 9 REG enable 0x00043100 1 RW uint32 b[0:0] - - 2 - - - - - replaced_pkt_cnt 0x00043101 1 RO uint32 b[31:0] - - - + REG_BSN_ALIGN_V2_XSUB 1 9 REG enable 0x00051100 1 RW uint32 b[0:0] - - 2 + - - - - replaced_pkt_cnt 0x00051101 1 RO uint32 b[31:0] - - - REG_BSN_MONITOR_V2_RX_ALIGN_XSUB 1 9 REG xon_stable 0x00000080 1 RO uint32 b[0:0] - - 8 - - - - ready_stable 0x00000080 1 RO uint32 b[1:1] - - - - - - - sync_timeout 0x00000080 1 RO uint32 b[2:2] - - - @@ -298,25 +405,25 @@ number_of_columns = 13 - - - - nof_sop 0x00000083 1 RO uint32 b[31:0] - - - - - - - nof_valid 0x00000084 1 RO uint32 b[31:0] - - - - - - - nof_err 0x00000085 1 RO uint32 b[31:0] - - - - - - - - latency 0x00000088 1 RO uint32 b[31:0] - - - - REG_BSN_MONITOR_V2_ALIGNED_XSUB 1 1 REG xon_stable 0x00043228 1 RO uint32 b[0:0] - - - - - - - - ready_stable 0x00043228 1 RO uint32 b[1:1] - - - - - - - - sync_timeout 0x00043228 1 RO uint32 b[2:2] - - - - - - - - bsn_at_sync 0x00043229 1 RO uint64 b[31:0] b[31:0] - - - - - - - - 0x0004322a - - - b[31:0] b[63:32] - - - - - - - nof_sop 0x0004322b 1 RO uint32 b[31:0] - - - - - - - - nof_valid 0x0004322c 1 RO uint32 b[31:0] - - - - - - - - nof_err 0x0004322d 1 RO uint32 b[31:0] - - - - - - - - latency 0x00043230 1 RO uint32 b[31:0] - - - - REG_BSN_MONITOR_V2_XST_OFFLOAD 1 1 REG xon_stable 0x00043220 1 RO uint32 b[0:0] - - - - - - - - ready_stable 0x00043220 1 RO uint32 b[1:1] - - - - - - - - sync_timeout 0x00043220 1 RO uint32 b[2:2] - - - - - - - - bsn_at_sync 0x00043221 1 RO uint64 b[31:0] b[31:0] - - - - - - - - 0x00043222 - - - b[31:0] b[63:32] - - - - - - - nof_sop 0x00043223 1 RO uint32 b[31:0] - - - - - - - - nof_valid 0x00043224 1 RO uint32 b[31:0] - - - - - - - - nof_err 0x00043225 1 RO uint32 b[31:0] - - - - - - - - latency 0x00043228 1 RO uint32 b[31:0] - - - + - - - - latency 0x00000086 1 RO uint32 b[31:0] - - - + REG_BSN_MONITOR_V2_ALIGNED_XSUB 1 1 REG xon_stable 0x00051228 1 RO uint32 b[0:0] - - - + - - - - ready_stable 0x00051228 1 RO uint32 b[1:1] - - - + - - - - sync_timeout 0x00051228 1 RO uint32 b[2:2] - - - + - - - - bsn_at_sync 0x00051229 1 RO uint64 b[31:0] b[31:0] - - + - - - - - 0x0005122a - - - b[31:0] b[63:32] - - + - - - - nof_sop 0x0005122b 1 RO uint32 b[31:0] - - - + - - - - nof_valid 0x0005122c 1 RO uint32 b[31:0] - - - + - - - - nof_err 0x0005122d 1 RO uint32 b[31:0] - - - + - - - - latency 0x0005122e 1 RO uint32 b[31:0] - - - + REG_BSN_MONITOR_V2_XST_OFFLOAD 1 1 REG xon_stable 0x00051220 1 RO uint32 b[0:0] - - - + - - - - ready_stable 0x00051220 1 RO uint32 b[1:1] - - - + - - - - sync_timeout 0x00051220 1 RO uint32 b[2:2] - - - + - - - - bsn_at_sync 0x00051221 1 RO uint64 b[31:0] b[31:0] - - + - - - - - 0x00051222 - - - b[31:0] b[63:32] - - + - - - - nof_sop 0x00051223 1 RO uint32 b[31:0] - - - + - - - - nof_valid 0x00051224 1 RO uint32 b[31:0] - - - + - - - - nof_err 0x00051225 1 RO uint32 b[31:0] - - - + - - - - latency 0x00051226 1 RO uint32 b[31:0] - - - REG_RING_LANE_INFO_XST 1 1 REG lane_direction 0x00000c02 1 RO uint32 b[0:0] - - - - - - - transport_nof_hops 0x00000c03 1 RW uint32 b[31:0] - - - REG_BSN_MONITOR_V2_RING_RX_XST 1 16 REG xon_stable 0x00000d00 1 RO uint32 b[0:0] - - 8 @@ -327,7 +434,7 @@ number_of_columns = 13 - - - - nof_sop 0x00000d03 1 RO uint32 b[31:0] - - - - - - - nof_valid 0x00000d04 1 RO uint32 b[31:0] - - - - - - - nof_err 0x00000d05 1 RO uint32 b[31:0] - - - - - - - - latency 0x00000d08 1 RO uint32 b[31:0] - - - + - - - - latency 0x00000d06 1 RO uint32 b[31:0] - - - REG_BSN_MONITOR_V2_RING_TX_XST 1 16 REG xon_stable 0x00000c80 1 RO uint32 b[0:0] - - 8 - - - - ready_stable 0x00000c80 1 RO uint32 b[1:1] - - - - - - - sync_timeout 0x00000c80 1 RO uint32 b[2:2] - - - @@ -336,198 +443,199 @@ number_of_columns = 13 - - - - nof_sop 0x00000c83 1 RO uint32 b[31:0] - - - - - - - nof_valid 0x00000c84 1 RO uint32 b[31:0] - - - - - - - nof_err 0x00000c85 1 RO uint32 b[31:0] - - - - - - - - latency 0x00000c88 1 RO uint32 b[31:0] - - - - REG_DP_BLOCK_VALIDATE_ERR_XST 1 1 REG err_count_index 0x000431b0 8 RO uint32 b[31:0] - - - - - - - - total_discarded_blocks 0x000431b8 1 RO uint32 b[31:0] - - - - - - - - total_block_count 0x000431b9 1 RO uint32 b[31:0] - - - - - - - - clear 0x000431ba 1 RW uint32 b[31:0] - - - - REG_DP_BLOCK_VALIDATE_BSN_AT_SYNC_XST 1 1 REG nof_sync_discarded 0x00043258 1 RO uint32 b[31:0] - - - - - - - - nof_sync 0x00043259 1 RO uint32 b[31:0] - - - - - - - - clear 0x0004325a 1 RW uint32 b[31:0] - - - - REG_TR_10GBE_MAC 1 3 REG rx_transfer_control 0x00020000 1 RW uint32 b[0:0] - - 1 - - - - - rx_transfer_status 0x00020001 1 RO uint32 b[0:0] - - - - - - - - tx_transfer_control 0x00020002 1 RW uint32 b[0:0] - - - - - - - - rx_padcrc_control 0x00020040 1 RW uint32 b[1:0] - - - - - - - - rx_crccheck_control 0x00020080 1 RW uint32 b[1:0] - - - - - - - - rx_pktovrflow_error 0x000200c0 1 RO uint64 b[3:0] b[35:32] - - - - - - - - 0x000200c1 - - - b[31:0] b[31:0] - - - - - - - rx_pktovrflow_etherstatsdropevents 0x000200c2 1 RO uint64 b[3:0] b[35:32] - - - - - - - - 0x000200c3 - - - b[31:0] b[31:0] - - - - - - - rx_lane_decoder_preamble_control 0x00020100 1 RW uint32 b[0:0] - - - - - - - - rx_preamble_inserter_control 0x00020140 1 RW uint32 b[0:0] - - - - - - - - rx_frame_control 0x00020800 1 RW uint32 b[19:0] - - - - - - - - rx_frame_maxlength 0x00020801 1 RW uint32 b[15:0] - - - - - - - - rx_frame_addr0 0x00020802 1 RW uint32 b[15:0] - - - - - - - - rx_frame_addr1 0x00020803 1 RW uint32 b[15:0] - - - - - - - - rx_frame_spaddr0_0 0x00020804 1 RW uint32 b[15:0] - - - - - - - - rx_frame_spaddr0_1 0x00020805 1 RW uint32 b[15:0] - - - - - - - - rx_frame_spaddr1_0 0x00020806 1 RW uint32 b[15:0] - - - - - - - - rx_frame_spaddr1_1 0x00020807 1 RW uint32 b[15:0] - - - - - - - - rx_frame_spaddr2_0 0x00020808 1 RW uint32 b[15:0] - - - - - - - - rx_frame_spaddr2_1 0x00020809 1 RW uint32 b[15:0] - - - - - - - - rx_frame_spaddr3_0 0x0002080a 1 RW uint32 b[15:0] - - - - - - - - rx_frame_spaddr3_1 0x0002080b 1 RW uint32 b[15:0] - - - - - - - - rx_pfc_control 0x00020818 1 RW uint32 b[16:0] - - - - - - - - rx_stats_clr 0x00020c00 1 RW uint32 b[0:0] - - - - - - - - rx_stats_framesok 0x00020c02 1 RO uint64 b[3:0] b[35:32] - - - - - - - - 0x00020c03 - - - b[31:0] b[31:0] - - - - - - - rx_stats_frameserr 0x00020c04 1 RO uint64 b[3:0] b[35:32] - - - - - - - - 0x00020c05 - - - b[31:0] b[31:0] - - - - - - - rx_stats_framescrcerr 0x00020c06 1 RO uint64 b[3:0] b[35:32] - - - - - - - - 0x00020c07 - - - b[31:0] b[31:0] - - - - - - - rx_stats_octetsok 0x00020c08 1 RO uint64 b[3:0] b[35:32] - - - - - - - - 0x00020c09 - - - b[31:0] b[31:0] - - - - - - - rx_stats_pausemacctrl_frames 0x00020c0a 1 RO uint64 b[3:0] b[35:32] - - - - - - - - 0x00020c0b - - - b[31:0] b[31:0] - - - - - - - rx_stats_iferrors 0x00020c0c 1 RO uint64 b[3:0] b[35:32] - - - - - - - - 0x00020c0d - - - b[31:0] b[31:0] - - - - - - - rx_stats_unicast_framesok 0x00020c0e 1 RO uint64 b[3:0] b[35:32] - - - - - - - - 0x00020c0f - - - b[31:0] b[31:0] - - - - - - - rx_stats_unicast_frameserr 0x00020c10 1 RO uint64 b[3:0] b[35:32] - - - - - - - - 0x00020c11 - - - b[31:0] b[31:0] - - - - - - - rx_stats_multicastframesok 0x00020c12 1 RO uint64 b[3:0] b[35:32] - - - - - - - - 0x00020c13 - - - b[31:0] b[31:0] - - - - - - - rx_stats_multicast_frameserr 0x00020c14 1 RO uint64 b[3:0] b[35:32] - - - - - - - - 0x00020c15 - - - b[31:0] b[31:0] - - - - - - - rx_stats_broadcastframesok 0x00020c16 1 RO uint64 b[3:0] b[35:32] - - - - - - - - 0x00020c17 - - - b[31:0] b[31:0] - - - - - - - rx_stats_broadcast_frameserr 0x00020c18 1 RO uint64 b[3:0] b[35:32] - - - - - - - - 0x00020c19 - - - b[31:0] b[31:0] - - - - - - - rx_stats_etherstatsoctets 0x00020c1a 1 RO uint64 b[3:0] b[35:32] - - - - - - - - 0x00020c1b - - - b[31:0] b[31:0] - - - - - - - rx_stats_etherstatspkts 0x00020c1c 1 RO uint64 b[3:0] b[35:32] - - - - - - - - 0x00020c1d - - - b[31:0] b[31:0] - - - - - - - rx_stats_etherstats_undersizepkts 0x00020c1e 1 RO uint64 b[3:0] b[35:32] - - - - - - - - 0x00020c1f - - - b[31:0] b[31:0] - - - - - - - rx_stats_etherstats_oversizepkts 0x00020c20 1 RO uint64 b[3:0] b[35:32] - - - - - - - - 0x00020c21 - - - b[31:0] b[31:0] - - - - - - - rx_stats_etherstats_pkts64octets 0x00020c22 1 RO uint64 b[3:0] b[35:32] - - - - - - - - 0x00020c23 - - - b[31:0] b[31:0] - - - - - - - rx_stats_etherstats_pkts65to127octets 0x00020c24 1 RO uint64 b[3:0] b[35:32] - - - - - - - - 0x00020c25 - - - b[31:0] b[31:0] - - - - - - - rx_stats_etherstats_pkts128to255octets 0x00020c26 1 RO uint64 b[3:0] b[35:32] - - - - - - - - 0x00020c27 - - - b[31:0] b[31:0] - - - - - - - rx_stats_etherstats_pkts256to511octets 0x00020c28 1 RO uint64 b[3:0] b[35:32] - - - - - - - - 0x00020c29 - - - b[31:0] b[31:0] - - - - - - - rx_stats_etherstats_pkts512to1023octets 0x00020c2a 1 RO uint64 b[3:0] b[35:32] - - - - - - - - 0x00020c2b - - - b[31:0] b[31:0] - - - - - - - rx_stats_etherstat_pkts1024to1518octets 0x00020c2c 1 RO uint64 b[3:0] b[35:32] - - - - - - - - 0x00020c2d - - - b[31:0] b[31:0] - - - - - - - rx_stats_etherstats_pkts1519toxoctets 0x00020c2e 1 RO uint64 b[3:0] b[35:32] - - - - - - - - 0x00020c2f - - - b[31:0] b[31:0] - - - - - - - rx_stats_etherstats_fragments 0x00020c30 1 RO uint64 b[3:0] b[35:32] - - - - - - - - 0x00020c31 - - - b[31:0] b[31:0] - - - - - - - rx_stats_etherstats_jabbers 0x00020c32 1 RO uint64 b[3:0] b[35:32] - - - - - - - - 0x00020c33 - - - b[31:0] b[31:0] - - - - - - - rx_stats_etherstatscrcerr 0x00020c34 1 RO uint64 b[3:0] b[35:32] - - - - - - - - 0x00020c35 - - - b[31:0] b[31:0] - - - - - - - rx_stats_unicastmacctrlframes 0x00020c36 1 RO uint64 b[3:0] b[35:32] - - - - - - - - 0x00020c37 - - - b[31:0] b[31:0] - - - - - - - rx_stats_multicastmac_ctrlframes 0x00020c38 1 RO uint64 b[3:0] b[35:32] - - - - - - - - 0x00020c39 - - - b[31:0] b[31:0] - - - - - - - rx_stats_broadcastmac_ctrlframes 0x00020c3a 1 RO uint64 b[3:0] b[35:32] - - - - - - - - 0x00020c3b - - - b[31:0] b[31:0] - - - - - - - rx_stats_pfcmacctrlframes 0x00020c3c 1 RO uint64 b[3:0] b[35:32] - - - - - - - - 0x00020c3d - - - b[31:0] b[31:0] - - - - - - - tx_transfer_status 0x00021001 1 RO uint32 b[0:0] - - - - - - - - tx_padins_control 0x00021040 1 RW uint32 b[0:0] - - - - - - - - tx_crcins_control 0x00021080 1 RW uint32 b[1:0] - - - - - - - - tx_pktunderflow_error 0x000210c0 1 RO uint64 b[3:0] b[35:32] - - - - - - - - 0x000210c1 - - - b[31:0] b[31:0] - - - - - - - tx_preamble_control 0x00021100 1 RW uint32 b[0:0] - - - - - - - - tx_pauseframe_control 0x00021140 1 RW uint32 b[1:0] - - - - - - - - tx_pauseframe_quanta 0x00021141 1 RW uint32 b[15:0] - - - - - - - - tx_pauseframe_enable 0x00021142 1 RW uint32 b[0:0] - - - - - - - - pfc_pause_quanta_0 0x00021180 1 RW uint32 b[31:0] - - - - - - - - pfc_pause_quanta_1 0x00021181 1 RW uint32 b[31:0] - - - - - - - - pfc_pause_quanta_2 0x00021182 1 RW uint32 b[31:0] - - - - - - - - pfc_pause_quanta_3 0x00021183 1 RW uint32 b[31:0] - - - - - - - - pfc_pause_quanta_4 0x00021184 1 RW uint32 b[31:0] - - - - - - - - pfc_pause_quanta_5 0x00021185 1 RW uint32 b[31:0] - - - - - - - - pfc_pause_quanta_6 0x00021186 1 RW uint32 b[31:0] - - - - - - - - pfc_pause_quanta_7 0x00021187 1 RW uint32 b[31:0] - - - - - - - - pfc_holdoff_quanta_0 0x00021190 1 RW uint32 b[31:0] - - - - - - - - pfc_holdoff_quanta_1 0x00021191 1 RW uint32 b[31:0] - - - - - - - - pfc_holdoff_quanta_2 0x00021192 1 RW uint32 b[31:0] - - - - - - - - pfc_holdoff_quanta_3 0x00021193 1 RW uint32 b[31:0] - - - - - - - - pfc_holdoff_quanta_4 0x00021194 1 RW uint32 b[31:0] - - - - - - - - pfc_holdoff_quanta_5 0x00021195 1 RW uint32 b[31:0] - - - - - - - - pfc_holdoff_quanta_6 0x00021196 1 RW uint32 b[31:0] - - - - - - - - pfc_holdoff_quanta_7 0x00021197 1 RW uint32 b[31:0] - - - - - - - - tx_pfc_priority_enable 0x000211a0 1 RW uint32 b[7:0] - - - - - - - - tx_addrins_control 0x00021200 1 RW uint32 b[0:0] - - - - - - - - tx_addrins_macaddr0 0x00021201 1 RW uint32 b[31:0] - - - - - - - - tx_addrins_macaddr1 0x00021202 1 RW uint32 b[15:0] - - - - - - - - tx_frame_maxlength 0x00021801 1 RW uint32 b[15:0] - - - - - - - - tx_stats_clr 0x00021c00 1 RW uint32 b[0:0] - - - - - - - - tx_stats_framesok 0x00021c02 1 RO uint64 b[3:0] b[35:32] - - - - - - - - 0x00021c03 - - - b[31:0] b[31:0] - - - - - - - tx_stats_frameserr 0x00021c04 1 RO uint64 b[3:0] b[35:32] - - - - - - - - 0x00021c05 - - - b[31:0] b[31:0] - - - - - - - tx_stats_framescrcerr 0x00021c06 1 RO uint64 b[3:0] b[35:32] - - - - - - - - 0x00021c07 - - - b[31:0] b[31:0] - - - - - - - tx_stats_octetsok 0x00021c08 1 RO uint64 b[3:0] b[35:32] - - - - - - - - 0x00021c09 - - - b[31:0] b[31:0] - - - - - - - tx_stats_pausemacctrl_frames 0x00021c0a 1 RO uint64 b[3:0] b[35:32] - - - - - - - - 0x00021c0b - - - b[31:0] b[31:0] - - - - - - - tx_stats_iferrors 0x00021c0c 1 RO uint64 b[3:0] b[35:32] - - - - - - - - 0x00021c0d - - - b[31:0] b[31:0] - - - - - - - tx_stats_unicast_framesok 0x00021c0e 1 RO uint64 b[3:0] b[35:32] - - - - - - - - 0x00021c0f - - - b[31:0] b[31:0] - - - - - - - tx_stats_unicast_frameserr 0x00021c10 1 RO uint64 b[3:0] b[35:32] - - - - - - - - 0x00021c11 - - - b[31:0] b[31:0] - - - - - - - tx_stats_multicastframesok 0x00021c12 1 RO uint64 b[3:0] b[35:32] - - - - - - - - 0x00021c13 - - - b[31:0] b[31:0] - - - - - - - tx_stats_multicast_frameserr 0x00021c14 1 RO uint64 b[3:0] b[35:32] - - - - - - - - 0x00021c15 - - - b[31:0] b[31:0] - - - - - - - tx_stats_broadcastframesok 0x00021c16 1 RO uint64 b[3:0] b[35:32] - - - - - - - - 0x00021c17 - - - b[31:0] b[31:0] - - - - - - - tx_stats_broadcast_frameserr 0x00021c18 1 RO uint64 b[3:0] b[35:32] - - - - - - - - 0x00021c19 - - - b[31:0] b[31:0] - - - - - - - tx_stats_etherstatsoctets 0x00021c1a 1 RO uint64 b[3:0] b[35:32] - - - - - - - - 0x00021c1b - - - b[31:0] b[31:0] - - - - - - - tx_stats_etherstatspkts 0x00021c1c 1 RO uint64 b[3:0] b[35:32] - - - - - - - - 0x00021c1d - - - b[31:0] b[31:0] - - - - - - - tx_stats_etherstats_undersizepkts 0x00021c1e 1 RO uint64 b[3:0] b[35:32] - - - - - - - - 0x00021c1f - - - b[31:0] b[31:0] - - - - - - - tx_stats_etherstats_oversizepkts 0x00021c20 1 RO uint64 b[3:0] b[35:32] - - - - - - - - 0x00021c21 - - - b[31:0] b[31:0] - - - - - - - tx_stats_etherstats_pkts64octets 0x00021c22 1 RO uint64 b[3:0] b[35:32] - - - - - - - - 0x00021c23 - - - b[31:0] b[31:0] - - - - - - - tx_stats_etherstats_pkts65to127octets 0x00021c24 1 RO uint64 b[3:0] b[35:32] - - - - - - - - 0x00021c25 - - - b[31:0] b[31:0] - - - - - - - tx_stats_etherstats_pkts128to255octets 0x00021c26 1 RO uint64 b[3:0] b[35:32] - - - - - - - - 0x00021c27 - - - b[31:0] b[31:0] - - - - - - - tx_stats_etherstats_pkts256to511octets 0x00021c28 1 RO uint64 b[3:0] b[35:32] - - - - - - - - 0x00021c29 - - - b[31:0] b[31:0] - - - - - - - tx_stats_etherstats_pkts512to1023octets 0x00021c2a 1 RO uint64 b[3:0] b[35:32] - - - - - - - - 0x00021c2b - - - b[31:0] b[31:0] - - - - - - - tx_stats_etherstat_pkts1024to1518octets 0x00021c2c 1 RO uint64 b[3:0] b[35:32] - - - - - - - - 0x00021c2d - - - b[31:0] b[31:0] - - - - - - - tx_stats_etherstats_pkts1519toxoctets 0x00021c2e 1 RO uint64 b[3:0] b[35:32] - - - - - - - - 0x00021c2f - - - b[31:0] b[31:0] - - - - - - - tx_stats_etherstats_fragments 0x00021c30 1 RO uint64 b[3:0] b[35:32] - - - - - - - - 0x00021c31 - - - b[31:0] b[31:0] - - - - - - - tx_stats_etherstats_jabbers 0x00021c32 1 RO uint64 b[3:0] b[35:32] - - - - - - - - 0x00021c33 - - - b[31:0] b[31:0] - - - - - - - tx_stats_etherstatscrcerr 0x00021c34 1 RO uint64 b[3:0] b[35:32] - - - - - - - - 0x00021c35 - - - b[31:0] b[31:0] - - - - - - - tx_stats_unicastmacctrlframes 0x00021c36 1 RO uint64 b[3:0] b[35:32] - - - - - - - - 0x00021c37 - - - b[31:0] b[31:0] - - - - - - - tx_stats_multicastmac_ctrlframes 0x00021c38 1 RO uint64 b[3:0] b[35:32] - - - - - - - - 0x00021c39 - - - b[31:0] b[31:0] - - - - - - - tx_stats_broadcastmac_ctrlframes 0x00021c3a 1 RO uint64 b[3:0] b[35:32] - - - - - - - - 0x00021c3b - - - b[31:0] b[31:0] - - - - - - - tx_stats_pfcmacctrlframes 0x00021c3c 1 RO uint64 b[3:0] b[35:32] - - - - - - - - 0x00021c3d - - - b[31:0] b[31:0] - - - REG_TR_10GBE_ETH10G 1 3 REG tx_snk_out_xon 0x00043218 1 RO uint32 b[0:0] - - 1 - - - - - xgmii_tx_ready 0x00043218 1 RO uint32 b[1:1] - - - - - - - - xgmii_link_status 0x00043218 1 RO uint32 b[3:2] - - - - RAM_SS_SS_WIDE 2 6 RAM data 0x00030000 976 RW uint32 b[9:0] - 8192 1024 - RAM_BF_WEIGHTS 2 12 RAM data 0x00028000 976 RW cint16_ir b[31:0] - 16384 1024 - REG_BSN_ALIGN_V2_BF 2 2 REG enable 0x00043208 1 RW uint32 b[0:0] - 1 2 - - - - - replaced_pkt_cnt 0x00043209 1 RO uint32 b[31:0] - - - - REG_BSN_MONITOR_V2_RX_ALIGN_BF 2 2 REG xon_stable 0x00000c20 1 RO uint32 b[0:0] - 1 8 + - - - - latency 0x00000c86 1 RO uint32 b[31:0] - - - + REG_DP_BLOCK_VALIDATE_ERR_XST 1 1 REG err_count_index 0x000511b0 8 RO uint32 b[31:0] - - - + - - - - total_discarded_blocks 0x000511b8 1 RO uint32 b[31:0] - - - + - - - - total_block_count 0x000511b9 1 RO uint64 b[31:0] b[31:0] - - + - - - - - 0x000511ba - - - b[31:0] b[63:32] - - + - - - - clear 0x000511bb 1 RW uint32 b[31:0] - - - + REG_DP_BLOCK_VALIDATE_BSN_AT_SYNC_XST 1 1 REG nof_sync_discarded 0x00051258 1 RO uint32 b[31:0] - - - + - - - - nof_sync 0x00051259 1 RO uint32 b[31:0] - - - + - - - - clear 0x0005125a 1 RW uint32 b[31:0] - - - + REG_TR_10GBE_MAC 1 3 REG rx_transfer_control 0x00028000 1 RW uint32 b[0:0] - - 1 + - - - - rx_transfer_status 0x00028001 1 RO uint32 b[0:0] - - - + - - - - tx_transfer_control 0x00028002 1 RW uint32 b[0:0] - - - + - - - - rx_padcrc_control 0x00028040 1 RW uint32 b[1:0] - - - + - - - - rx_crccheck_control 0x00028080 1 RW uint32 b[1:0] - - - + - - - - rx_pktovrflow_error 0x000280c0 1 RO uint64 b[3:0] b[35:32] - - + - - - - - 0x000280c1 - - - b[31:0] b[31:0] - - + - - - - rx_pktovrflow_etherstatsdropevents 0x000280c2 1 RO uint64 b[3:0] b[35:32] - - + - - - - - 0x000280c3 - - - b[31:0] b[31:0] - - + - - - - rx_lane_decoder_preamble_control 0x00028100 1 RW uint32 b[0:0] - - - + - - - - rx_preamble_inserter_control 0x00028140 1 RW uint32 b[0:0] - - - + - - - - rx_frame_control 0x00028800 1 RW uint32 b[19:0] - - - + - - - - rx_frame_maxlength 0x00028801 1 RW uint32 b[15:0] - - - + - - - - rx_frame_addr0 0x00028802 1 RW uint32 b[15:0] - - - + - - - - rx_frame_addr1 0x00028803 1 RW uint32 b[15:0] - - - + - - - - rx_frame_spaddr0_0 0x00028804 1 RW uint32 b[15:0] - - - + - - - - rx_frame_spaddr0_1 0x00028805 1 RW uint32 b[15:0] - - - + - - - - rx_frame_spaddr1_0 0x00028806 1 RW uint32 b[15:0] - - - + - - - - rx_frame_spaddr1_1 0x00028807 1 RW uint32 b[15:0] - - - + - - - - rx_frame_spaddr2_0 0x00028808 1 RW uint32 b[15:0] - - - + - - - - rx_frame_spaddr2_1 0x00028809 1 RW uint32 b[15:0] - - - + - - - - rx_frame_spaddr3_0 0x0002880a 1 RW uint32 b[15:0] - - - + - - - - rx_frame_spaddr3_1 0x0002880b 1 RW uint32 b[15:0] - - - + - - - - rx_pfc_control 0x00028818 1 RW uint32 b[16:0] - - - + - - - - rx_stats_clr 0x00028c00 1 RW uint32 b[0:0] - - - + - - - - rx_stats_framesok 0x00028c02 1 RO uint64 b[3:0] b[35:32] - - + - - - - - 0x00028c03 - - - b[31:0] b[31:0] - - + - - - - rx_stats_frameserr 0x00028c04 1 RO uint64 b[3:0] b[35:32] - - + - - - - - 0x00028c05 - - - b[31:0] b[31:0] - - + - - - - rx_stats_framescrcerr 0x00028c06 1 RO uint64 b[3:0] b[35:32] - - + - - - - - 0x00028c07 - - - b[31:0] b[31:0] - - + - - - - rx_stats_octetsok 0x00028c08 1 RO uint64 b[3:0] b[35:32] - - + - - - - - 0x00028c09 - - - b[31:0] b[31:0] - - + - - - - rx_stats_pausemacctrl_frames 0x00028c0a 1 RO uint64 b[3:0] b[35:32] - - + - - - - - 0x00028c0b - - - b[31:0] b[31:0] - - + - - - - rx_stats_iferrors 0x00028c0c 1 RO uint64 b[3:0] b[35:32] - - + - - - - - 0x00028c0d - - - b[31:0] b[31:0] - - + - - - - rx_stats_unicast_framesok 0x00028c0e 1 RO uint64 b[3:0] b[35:32] - - + - - - - - 0x00028c0f - - - b[31:0] b[31:0] - - + - - - - rx_stats_unicast_frameserr 0x00028c10 1 RO uint64 b[3:0] b[35:32] - - + - - - - - 0x00028c11 - - - b[31:0] b[31:0] - - + - - - - rx_stats_multicastframesok 0x00028c12 1 RO uint64 b[3:0] b[35:32] - - + - - - - - 0x00028c13 - - - b[31:0] b[31:0] - - + - - - - rx_stats_multicast_frameserr 0x00028c14 1 RO uint64 b[3:0] b[35:32] - - + - - - - - 0x00028c15 - - - b[31:0] b[31:0] - - + - - - - rx_stats_broadcastframesok 0x00028c16 1 RO uint64 b[3:0] b[35:32] - - + - - - - - 0x00028c17 - - - b[31:0] b[31:0] - - + - - - - rx_stats_broadcast_frameserr 0x00028c18 1 RO uint64 b[3:0] b[35:32] - - + - - - - - 0x00028c19 - - - b[31:0] b[31:0] - - + - - - - rx_stats_etherstatsoctets 0x00028c1a 1 RO uint64 b[3:0] b[35:32] - - + - - - - - 0x00028c1b - - - b[31:0] b[31:0] - - + - - - - rx_stats_etherstatspkts 0x00028c1c 1 RO uint64 b[3:0] b[35:32] - - + - - - - - 0x00028c1d - - - b[31:0] b[31:0] - - + - - - - rx_stats_etherstats_undersizepkts 0x00028c1e 1 RO uint64 b[3:0] b[35:32] - - + - - - - - 0x00028c1f - - - b[31:0] b[31:0] - - + - - - - rx_stats_etherstats_oversizepkts 0x00028c20 1 RO uint64 b[3:0] b[35:32] - - + - - - - - 0x00028c21 - - - b[31:0] b[31:0] - - + - - - - rx_stats_etherstats_pkts64octets 0x00028c22 1 RO uint64 b[3:0] b[35:32] - - + - - - - - 0x00028c23 - - - b[31:0] b[31:0] - - + - - - - rx_stats_etherstats_pkts65to127octets 0x00028c24 1 RO uint64 b[3:0] b[35:32] - - + - - - - - 0x00028c25 - - - b[31:0] b[31:0] - - + - - - - rx_stats_etherstats_pkts128to255octets 0x00028c26 1 RO uint64 b[3:0] b[35:32] - - + - - - - - 0x00028c27 - - - b[31:0] b[31:0] - - + - - - - rx_stats_etherstats_pkts256to511octets 0x00028c28 1 RO uint64 b[3:0] b[35:32] - - + - - - - - 0x00028c29 - - - b[31:0] b[31:0] - - + - - - - rx_stats_etherstats_pkts512to1023octets 0x00028c2a 1 RO uint64 b[3:0] b[35:32] - - + - - - - - 0x00028c2b - - - b[31:0] b[31:0] - - + - - - - rx_stats_etherstat_pkts1024to1518octets 0x00028c2c 1 RO uint64 b[3:0] b[35:32] - - + - - - - - 0x00028c2d - - - b[31:0] b[31:0] - - + - - - - rx_stats_etherstats_pkts1519toxoctets 0x00028c2e 1 RO uint64 b[3:0] b[35:32] - - + - - - - - 0x00028c2f - - - b[31:0] b[31:0] - - + - - - - rx_stats_etherstats_fragments 0x00028c30 1 RO uint64 b[3:0] b[35:32] - - + - - - - - 0x00028c31 - - - b[31:0] b[31:0] - - + - - - - rx_stats_etherstats_jabbers 0x00028c32 1 RO uint64 b[3:0] b[35:32] - - + - - - - - 0x00028c33 - - - b[31:0] b[31:0] - - + - - - - rx_stats_etherstatscrcerr 0x00028c34 1 RO uint64 b[3:0] b[35:32] - - + - - - - - 0x00028c35 - - - b[31:0] b[31:0] - - + - - - - rx_stats_unicastmacctrlframes 0x00028c36 1 RO uint64 b[3:0] b[35:32] - - + - - - - - 0x00028c37 - - - b[31:0] b[31:0] - - + - - - - rx_stats_multicastmac_ctrlframes 0x00028c38 1 RO uint64 b[3:0] b[35:32] - - + - - - - - 0x00028c39 - - - b[31:0] b[31:0] - - + - - - - rx_stats_broadcastmac_ctrlframes 0x00028c3a 1 RO uint64 b[3:0] b[35:32] - - + - - - - - 0x00028c3b - - - b[31:0] b[31:0] - - + - - - - rx_stats_pfcmacctrlframes 0x00028c3c 1 RO uint64 b[3:0] b[35:32] - - + - - - - - 0x00028c3d - - - b[31:0] b[31:0] - - + - - - - tx_transfer_status 0x00029001 1 RO uint32 b[0:0] - - - + - - - - tx_padins_control 0x00029040 1 RW uint32 b[0:0] - - - + - - - - tx_crcins_control 0x00029080 1 RW uint32 b[1:0] - - - + - - - - tx_pktunderflow_error 0x000290c0 1 RO uint64 b[3:0] b[35:32] - - + - - - - - 0x000290c1 - - - b[31:0] b[31:0] - - + - - - - tx_preamble_control 0x00029100 1 RW uint32 b[0:0] - - - + - - - - tx_pauseframe_control 0x00029140 1 RW uint32 b[1:0] - - - + - - - - tx_pauseframe_quanta 0x00029141 1 RW uint32 b[15:0] - - - + - - - - tx_pauseframe_enable 0x00029142 1 RW uint32 b[0:0] - - - + - - - - pfc_pause_quanta_0 0x00029180 1 RW uint32 b[31:0] - - - + - - - - pfc_pause_quanta_1 0x00029181 1 RW uint32 b[31:0] - - - + - - - - pfc_pause_quanta_2 0x00029182 1 RW uint32 b[31:0] - - - + - - - - pfc_pause_quanta_3 0x00029183 1 RW uint32 b[31:0] - - - + - - - - pfc_pause_quanta_4 0x00029184 1 RW uint32 b[31:0] - - - + - - - - pfc_pause_quanta_5 0x00029185 1 RW uint32 b[31:0] - - - + - - - - pfc_pause_quanta_6 0x00029186 1 RW uint32 b[31:0] - - - + - - - - pfc_pause_quanta_7 0x00029187 1 RW uint32 b[31:0] - - - + - - - - pfc_holdoff_quanta_0 0x00029190 1 RW uint32 b[31:0] - - - + - - - - pfc_holdoff_quanta_1 0x00029191 1 RW uint32 b[31:0] - - - + - - - - pfc_holdoff_quanta_2 0x00029192 1 RW uint32 b[31:0] - - - + - - - - pfc_holdoff_quanta_3 0x00029193 1 RW uint32 b[31:0] - - - + - - - - pfc_holdoff_quanta_4 0x00029194 1 RW uint32 b[31:0] - - - + - - - - pfc_holdoff_quanta_5 0x00029195 1 RW uint32 b[31:0] - - - + - - - - pfc_holdoff_quanta_6 0x00029196 1 RW uint32 b[31:0] - - - + - - - - pfc_holdoff_quanta_7 0x00029197 1 RW uint32 b[31:0] - - - + - - - - tx_pfc_priority_enable 0x000291a0 1 RW uint32 b[7:0] - - - + - - - - tx_addrins_control 0x00029200 1 RW uint32 b[0:0] - - - + - - - - tx_addrins_macaddr0 0x00029201 1 RW uint32 b[31:0] - - - + - - - - tx_addrins_macaddr1 0x00029202 1 RW uint32 b[15:0] - - - + - - - - tx_frame_maxlength 0x00029801 1 RW uint32 b[15:0] - - - + - - - - tx_stats_clr 0x00029c00 1 RW uint32 b[0:0] - - - + - - - - tx_stats_framesok 0x00029c02 1 RO uint64 b[3:0] b[35:32] - - + - - - - - 0x00029c03 - - - b[31:0] b[31:0] - - + - - - - tx_stats_frameserr 0x00029c04 1 RO uint64 b[3:0] b[35:32] - - + - - - - - 0x00029c05 - - - b[31:0] b[31:0] - - + - - - - tx_stats_framescrcerr 0x00029c06 1 RO uint64 b[3:0] b[35:32] - - + - - - - - 0x00029c07 - - - b[31:0] b[31:0] - - + - - - - tx_stats_octetsok 0x00029c08 1 RO uint64 b[3:0] b[35:32] - - + - - - - - 0x00029c09 - - - b[31:0] b[31:0] - - + - - - - tx_stats_pausemacctrl_frames 0x00029c0a 1 RO uint64 b[3:0] b[35:32] - - + - - - - - 0x00029c0b - - - b[31:0] b[31:0] - - + - - - - tx_stats_iferrors 0x00029c0c 1 RO uint64 b[3:0] b[35:32] - - + - - - - - 0x00029c0d - - - b[31:0] b[31:0] - - + - - - - tx_stats_unicast_framesok 0x00029c0e 1 RO uint64 b[3:0] b[35:32] - - + - - - - - 0x00029c0f - - - b[31:0] b[31:0] - - + - - - - tx_stats_unicast_frameserr 0x00029c10 1 RO uint64 b[3:0] b[35:32] - - + - - - - - 0x00029c11 - - - b[31:0] b[31:0] - - + - - - - tx_stats_multicastframesok 0x00029c12 1 RO uint64 b[3:0] b[35:32] - - + - - - - - 0x00029c13 - - - b[31:0] b[31:0] - - + - - - - tx_stats_multicast_frameserr 0x00029c14 1 RO uint64 b[3:0] b[35:32] - - + - - - - - 0x00029c15 - - - b[31:0] b[31:0] - - + - - - - tx_stats_broadcastframesok 0x00029c16 1 RO uint64 b[3:0] b[35:32] - - + - - - - - 0x00029c17 - - - b[31:0] b[31:0] - - + - - - - tx_stats_broadcast_frameserr 0x00029c18 1 RO uint64 b[3:0] b[35:32] - - + - - - - - 0x00029c19 - - - b[31:0] b[31:0] - - + - - - - tx_stats_etherstatsoctets 0x00029c1a 1 RO uint64 b[3:0] b[35:32] - - + - - - - - 0x00029c1b - - - b[31:0] b[31:0] - - + - - - - tx_stats_etherstatspkts 0x00029c1c 1 RO uint64 b[3:0] b[35:32] - - + - - - - - 0x00029c1d - - - b[31:0] b[31:0] - - + - - - - tx_stats_etherstats_undersizepkts 0x00029c1e 1 RO uint64 b[3:0] b[35:32] - - + - - - - - 0x00029c1f - - - b[31:0] b[31:0] - - + - - - - tx_stats_etherstats_oversizepkts 0x00029c20 1 RO uint64 b[3:0] b[35:32] - - + - - - - - 0x00029c21 - - - b[31:0] b[31:0] - - + - - - - tx_stats_etherstats_pkts64octets 0x00029c22 1 RO uint64 b[3:0] b[35:32] - - + - - - - - 0x00029c23 - - - b[31:0] b[31:0] - - + - - - - tx_stats_etherstats_pkts65to127octets 0x00029c24 1 RO uint64 b[3:0] b[35:32] - - + - - - - - 0x00029c25 - - - b[31:0] b[31:0] - - + - - - - tx_stats_etherstats_pkts128to255octets 0x00029c26 1 RO uint64 b[3:0] b[35:32] - - + - - - - - 0x00029c27 - - - b[31:0] b[31:0] - - + - - - - tx_stats_etherstats_pkts256to511octets 0x00029c28 1 RO uint64 b[3:0] b[35:32] - - + - - - - - 0x00029c29 - - - b[31:0] b[31:0] - - + - - - - tx_stats_etherstats_pkts512to1023octets 0x00029c2a 1 RO uint64 b[3:0] b[35:32] - - + - - - - - 0x00029c2b - - - b[31:0] b[31:0] - - + - - - - tx_stats_etherstat_pkts1024to1518octets 0x00029c2c 1 RO uint64 b[3:0] b[35:32] - - + - - - - - 0x00029c2d - - - b[31:0] b[31:0] - - + - - - - tx_stats_etherstats_pkts1519toxoctets 0x00029c2e 1 RO uint64 b[3:0] b[35:32] - - + - - - - - 0x00029c2f - - - b[31:0] b[31:0] - - + - - - - tx_stats_etherstats_fragments 0x00029c30 1 RO uint64 b[3:0] b[35:32] - - + - - - - - 0x00029c31 - - - b[31:0] b[31:0] - - + - - - - tx_stats_etherstats_jabbers 0x00029c32 1 RO uint64 b[3:0] b[35:32] - - + - - - - - 0x00029c33 - - - b[31:0] b[31:0] - - + - - - - tx_stats_etherstatscrcerr 0x00029c34 1 RO uint64 b[3:0] b[35:32] - - + - - - - - 0x00029c35 - - - b[31:0] b[31:0] - - + - - - - tx_stats_unicastmacctrlframes 0x00029c36 1 RO uint64 b[3:0] b[35:32] - - + - - - - - 0x00029c37 - - - b[31:0] b[31:0] - - + - - - - tx_stats_multicastmac_ctrlframes 0x00029c38 1 RO uint64 b[3:0] b[35:32] - - + - - - - - 0x00029c39 - - - b[31:0] b[31:0] - - + - - - - tx_stats_broadcastmac_ctrlframes 0x00029c3a 1 RO uint64 b[3:0] b[35:32] - - + - - - - - 0x00029c3b - - - b[31:0] b[31:0] - - + - - - - tx_stats_pfcmacctrlframes 0x00029c3c 1 RO uint64 b[3:0] b[35:32] - - + - - - - - 0x00029c3d - - - b[31:0] b[31:0] - - + REG_TR_10GBE_ETH10G 1 3 REG tx_snk_out_xon 0x00051218 1 RO uint32 b[0:0] - - 1 + - - - - xgmii_tx_ready 0x00051218 1 RO uint32 b[1:1] - - - + - - - - xgmii_link_status 0x00051218 1 RO uint32 b[3:2] - - - + RAM_SS_SS_WIDE 2 6 RAM data 0x00048000 976 RW uint32 b[9:0] - 8192 1024 + RAM_BF_WEIGHTS 2 12 RAM data 0x00020000 976 RW cint16_ir b[31:0] - 16384 1024 + REG_BSN_ALIGN_V2_BF 2 2 REG enable 0x00051208 1 RW uint32 b[0:0] - 4 2 + - - - - replaced_pkt_cnt 0x00051209 1 RO uint32 b[31:0] - - - + REG_BSN_MONITOR_V2_RX_ALIGN_BF 2 2 REG xon_stable 0x00000c20 1 RO uint32 b[0:0] - 16 8 - - - - ready_stable 0x00000c20 1 RO uint32 b[1:1] - - - - - - - sync_timeout 0x00000c20 1 RO uint32 b[2:2] - - - - - - - bsn_at_sync 0x00000c21 1 RO uint64 b[31:0] b[31:0] - - @@ -535,91 +643,93 @@ number_of_columns = 13 - - - - nof_sop 0x00000c23 1 RO uint32 b[31:0] - - - - - - - nof_valid 0x00000c24 1 RO uint32 b[31:0] - - - - - - - nof_err 0x00000c25 1 RO uint32 b[31:0] - - - - - - - - latency 0x00000c28 1 RO uint32 b[31:0] - - - - REG_BSN_MONITOR_V2_ALIGNED_BF 2 1 REG xon_stable 0x00043180 1 RO uint32 b[0:0] - 1 8 - - - - - ready_stable 0x00043180 1 RO uint32 b[1:1] - - - - - - - - sync_timeout 0x00043180 1 RO uint32 b[2:2] - - - - - - - - bsn_at_sync 0x00043181 1 RO uint64 b[31:0] b[31:0] - - - - - - - - 0x00043182 - - - b[31:0] b[63:32] - - - - - - - nof_sop 0x00043183 1 RO uint32 b[31:0] - - - - - - - - nof_valid 0x00043184 1 RO uint32 b[31:0] - - - - - - - - nof_err 0x00043185 1 RO uint32 b[31:0] - - - - - - - - latency 0x00043188 1 RO uint32 b[31:0] - - - - REG_RING_LANE_INFO_BF 2 1 REG lane_direction 0x00043250 1 RO uint32 b[0:0] - 1 2 - - - - - transport_nof_hops 0x00043251 1 RW uint32 b[31:0] - - - - REG_BSN_MONITOR_V2_RING_RX_BF 2 1 REG xon_stable 0x00043170 1 RO uint32 b[0:0] - 1 8 - - - - - ready_stable 0x00043170 1 RO uint32 b[1:1] - - - - - - - - sync_timeout 0x00043170 1 RO uint32 b[2:2] - - - - - - - - bsn_at_sync 0x00043171 1 RO uint64 b[31:0] b[31:0] - - - - - - - - 0x00043172 - - - b[31:0] b[63:32] - - - - - - - nof_sop 0x00043173 1 RO uint32 b[31:0] - - - - - - - - nof_valid 0x00043174 1 RO uint32 b[31:0] - - - - - - - - nof_err 0x00043175 1 RO uint32 b[31:0] - - - - - - - - latency 0x00043178 1 RO uint32 b[31:0] - - - - REG_BSN_MONITOR_V2_RING_TX_BF 2 1 REG xon_stable 0x00043160 1 RO uint32 b[0:0] - 1 8 - - - - - ready_stable 0x00043160 1 RO uint32 b[1:1] - - - - - - - - sync_timeout 0x00043160 1 RO uint32 b[2:2] - - - - - - - - bsn_at_sync 0x00043161 1 RO uint64 b[31:0] b[31:0] - - - - - - - - 0x00043162 - - - b[31:0] b[63:32] - - - - - - - nof_sop 0x00043163 1 RO uint32 b[31:0] - - - - - - - - nof_valid 0x00043164 1 RO uint32 b[31:0] - - - - - - - - nof_err 0x00043165 1 RO uint32 b[31:0] - - - - - - - - latency 0x00043168 1 RO uint32 b[31:0] - - - - REG_DP_BLOCK_VALIDATE_ERR_BF 2 1 REG err_count_index 0x00000020 8 RO uint32 b[31:0] - 1 16 + - - - - latency 0x00000c26 1 RO uint32 b[31:0] - - - + REG_BSN_MONITOR_V2_ALIGNED_BF 2 1 REG xon_stable 0x00051180 1 RO uint32 b[0:0] - 8 8 + - - - - ready_stable 0x00051180 1 RO uint32 b[1:1] - - - + - - - - sync_timeout 0x00051180 1 RO uint32 b[2:2] - - - + - - - - bsn_at_sync 0x00051181 1 RO uint64 b[31:0] b[31:0] - - + - - - - - 0x00051182 - - - b[31:0] b[63:32] - - + - - - - nof_sop 0x00051183 1 RO uint32 b[31:0] - - - + - - - - nof_valid 0x00051184 1 RO uint32 b[31:0] - - - + - - - - nof_err 0x00051185 1 RO uint32 b[31:0] - - - + - - - - latency 0x00051186 1 RO uint32 b[31:0] - - - + REG_RING_LANE_INFO_BF 2 1 REG lane_direction 0x00051250 1 RO uint32 b[0:0] - 2 2 + - - - - transport_nof_hops 0x00051251 1 RW uint32 b[31:0] - - - + REG_BSN_MONITOR_V2_RING_RX_BF 2 1 REG xon_stable 0x00051170 1 RO uint32 b[0:0] - 8 8 + - - - - ready_stable 0x00051170 1 RO uint32 b[1:1] - - - + - - - - sync_timeout 0x00051170 1 RO uint32 b[2:2] - - - + - - - - bsn_at_sync 0x00051171 1 RO uint64 b[31:0] b[31:0] - - + - - - - - 0x00051172 - - - b[31:0] b[63:32] - - + - - - - nof_sop 0x00051173 1 RO uint32 b[31:0] - - - + - - - - nof_valid 0x00051174 1 RO uint32 b[31:0] - - - + - - - - nof_err 0x00051175 1 RO uint32 b[31:0] - - - + - - - - latency 0x00051176 1 RO uint32 b[31:0] - - - + REG_BSN_MONITOR_V2_RING_TX_BF 2 1 REG xon_stable 0x00051160 1 RO uint32 b[0:0] - 8 8 + - - - - ready_stable 0x00051160 1 RO uint32 b[1:1] - - - + - - - - sync_timeout 0x00051160 1 RO uint32 b[2:2] - - - + - - - - bsn_at_sync 0x00051161 1 RO uint64 b[31:0] b[31:0] - - + - - - - - 0x00051162 - - - b[31:0] b[63:32] - - + - - - - nof_sop 0x00051163 1 RO uint32 b[31:0] - - - + - - - - nof_valid 0x00051164 1 RO uint32 b[31:0] - - - + - - - - nof_err 0x00051165 1 RO uint32 b[31:0] - - - + - - - - latency 0x00051166 1 RO uint32 b[31:0] - - - + REG_DP_BLOCK_VALIDATE_ERR_BF 2 1 REG err_count_index 0x00000020 8 RO uint32 b[31:0] - 16 16 - - - - total_discarded_blocks 0x00000028 1 RO uint32 b[31:0] - - - - - - - - total_block_count 0x00000029 1 RO uint32 b[31:0] - - - - - - - - clear 0x0000002a 1 RW uint32 b[31:0] - - - - REG_DP_BLOCK_VALIDATE_BSN_AT_SYNC_BF 2 1 REG nof_sync_discarded 0x00043200 1 RO uint32 b[31:0] - 1 4 - - - - - nof_sync 0x00043201 1 RO uint32 b[31:0] - - - - - - - - clear 0x00043202 1 RW uint32 b[31:0] - - - - REG_BF_SCALE 2 1 REG scale 0x00043264 1 RW uint32 b[15:0] - 2 2 - - - - - unused 0x00043265 1 RW uint32 b[31:0] - - - - REG_HDR_DAT 2 1 REG bsn 0x00043000 1 RW uint64 b[31:0] b[31:0] 64 64 - - - - - - 0x00043001 - - - b[31:0] b[63:32] - - - - - - - sdp_block_period 0x00043002 1 RW uint32 b[15:0] - - - - - - - - sdp_nof_beamlets_per_block 0x00043003 1 RW uint32 b[15:0] - - - - - - - - sdp_nof_blocks_per_packet 0x00043004 1 RW uint32 b[7:0] - - - - - - - - sdp_beamlet_index 0x00043005 1 RW uint32 b[15:0] - - - - - - - - sdp_beamlet_scale 0x00043006 1 RW uint32 b[15:0] - - - - - - - - sdp_reserved 0x00043007 1 RW uint64 b[31:0] b[31:0] - - - - - - - - 0x00043008 - - - b[7:0] b[39:32] - - - - - - - sdp_source_info_gn_index 0x00043009 1 RW uint32 b[4:0] - - - - - - - - sdp_source_info_beamlet_width 0x0004300a 1 RW uint32 b[7:5] - - - - - - - - sdp_source_info_repositioning_flag 0x0004300b 1 RW uint32 b[9:9] - - - - - - - - sdp_source_info_payload_error 0x0004300c 1 RW uint32 b[10:10] - - - - - - - - sdp_source_info_fsub_type 0x0004300d 1 RW uint32 b[11:11] - - - - - - - - sdp_source_info_f_adc 0x0004300e 1 RW uint32 b[12:12] - - - - - - - - sdp_source_info_nyquist_zone_index 0x0004300f 1 RW uint32 b[14:13] - - - - - - - - sdp_source_info_antenna_band_index 0x00043010 1 RW uint32 b[15:15] - - - - - - - - sdp_station_id 0x00043011 1 RW uint32 b[15:0] - - - - - - - - sdp_observation_id 0x00043012 1 RW uint32 b[31:0] - - - - - - - - sdp_version_id 0x00043013 1 RO uint32 b[7:0] - - - - - - - - sdp_marker 0x00043014 1 RO uint32 b[7:0] - - - - - - - - udp_checksum 0x00043015 1 RW uint32 b[15:0] - - - - - - - - udp_length 0x00043016 1 RW uint32 b[15:0] - - - - - - - - udp_destination_port 0x00043017 1 RW uint32 b[15:0] - - - - - - - - udp_source_port 0x00043018 1 RW uint32 b[15:0] - - - - - - - - ip_destination_address 0x00043019 1 RW uint32 b[31:0] - - - - - - - - ip_source_address 0x0004301a 1 RW uint32 b[31:0] - - - - - - - - ip_header_checksum 0x0004301b 1 RW uint32 b[15:0] - - - - - - - - ip_protocol 0x0004301c 1 RW uint32 b[7:0] - - - - - - - - ip_time_to_live 0x0004301d 1 RW uint32 b[7:0] - - - - - - - - ip_fragment_offset 0x0004301e 1 RW uint32 b[12:0] - - - - - - - - ip_flags 0x0004301f 1 RW uint32 b[2:0] - - - - - - - - ip_identification 0x00043020 1 RW uint32 b[15:0] - - - - - - - - ip_total_length 0x00043021 1 RW uint32 b[15:0] - - - - - - - - ip_services 0x00043022 1 RW uint32 b[7:0] - - - - - - - - ip_header_length 0x00043023 1 RW uint32 b[3:0] - - - - - - - - ip_version 0x00043024 1 RW uint32 b[3:0] - - - - - - - - eth_type 0x00043025 1 RO uint32 b[15:0] - - - - - - - - eth_source_mac 0x00043026 1 RO uint64 b[31:0] b[31:0] - - - - - - - - 0x00043027 - - - b[15:0] b[47:32] - - - - - - - eth_destination_mac 0x00043028 1 RW uint64 b[31:0] b[31:0] - - - - - - - - 0x00043029 - - - b[15:0] b[47:32] - - - REG_DP_XONOFF 2 1 REG enable_stream 0x00043260 1 RW uint32 b[0:0] - 2 2 + - - - - total_block_count 0x00000029 1 RO uint64 b[31:0] b[31:0] - - + - - - - - 0x0000002a - - - b[31:0] b[63:32] - - + - - - - clear 0x0000002b 1 RW uint32 b[31:0] - - - + REG_DP_BLOCK_VALIDATE_BSN_AT_SYNC_BF 2 1 REG nof_sync_discarded 0x00051200 1 RO uint32 b[31:0] - 4 4 + - - - - nof_sync 0x00051201 1 RO uint32 b[31:0] - - - + - - - - clear 0x00051202 1 RW uint32 b[31:0] - - - + REG_BF_SCALE 2 1 REG scale 0x00051264 1 RW uint32 b[15:0] - 2 2 + - - - - unused 0x00051265 1 RW uint32 b[31:0] - - - + REG_HDR_DAT 2 1 REG bsn 0x00051000 1 RW uint64 b[31:0] b[31:0] 64 64 + - - - - - 0x00051001 - - - b[31:0] b[63:32] - - + - - - - sdp_block_period 0x00051002 1 RW uint32 b[15:0] - - - + - - - - sdp_nof_beamlets_per_block 0x00051003 1 RW uint32 b[15:0] - - - + - - - - sdp_nof_blocks_per_packet 0x00051004 1 RW uint32 b[7:0] - - - + - - - - sdp_beamlet_index 0x00051005 1 RW uint32 b[15:0] - - - + - - - - sdp_beamlet_scale 0x00051006 1 RW uint32 b[15:0] - - - + - - - - sdp_reserved 0x00051007 1 RW uint64 b[31:0] b[31:0] - - + - - - - - 0x00051008 - - - b[7:0] b[39:32] - - + - - - - sdp_source_info_gn_index 0x00051009 1 RW uint32 b[4:0] - - - + - - - - sdp_source_info_beamlet_width 0x0005100a 1 RW uint32 b[7:5] - - - + - - - - sdp_source_info_repositioning_flag 0x0005100b 1 RW uint32 b[9:9] - - - + - - - - sdp_source_info_payload_error 0x0005100c 1 RW uint32 b[10:10] - - - + - - - - sdp_source_info_fsub_type 0x0005100d 1 RW uint32 b[11:11] - - - + - - - - sdp_source_info_f_adc 0x0005100e 1 RW uint32 b[12:12] - - - + - - - - sdp_source_info_nyquist_zone_index 0x0005100f 1 RW uint32 b[14:13] - - - + - - - - sdp_source_info_antenna_band_index 0x00051010 1 RW uint32 b[15:15] - - - + - - - - sdp_station_info_station_id 0x00051011 1 RW uint32 b[9:0] - - - + - - - - sdp_station_info_antenna_field_index 0x00051011 1 RW uint32 b[15:10] - - - + - - - - sdp_observation_id 0x00051012 1 RW uint32 b[31:0] - - - + - - - - sdp_version_id 0x00051013 1 RW uint32 b[7:0] - - - + - - - - sdp_marker 0x00051014 1 RW uint32 b[7:0] - - - + - - - - udp_checksum 0x00051015 1 RW uint32 b[15:0] - - - + - - - - udp_length 0x00051016 1 RW uint32 b[15:0] - - - + - - - - udp_destination_port 0x00051017 1 RW uint32 b[15:0] - - - + - - - - udp_source_port 0x00051018 1 RW uint32 b[15:0] - - - + - - - - ip_destination_address 0x00051019 1 RW uint32 b[31:0] - - - + - - - - ip_source_address 0x0005101a 1 RW uint32 b[31:0] - - - + - - - - ip_header_checksum 0x0005101b 1 RW uint32 b[15:0] - - - + - - - - ip_protocol 0x0005101c 1 RW uint32 b[7:0] - - - + - - - - ip_time_to_live 0x0005101d 1 RW uint32 b[7:0] - - - + - - - - ip_fragment_offset 0x0005101e 1 RW uint32 b[12:0] - - - + - - - - ip_flags 0x0005101f 1 RW uint32 b[2:0] - - - + - - - - ip_identification 0x00051020 1 RW uint32 b[15:0] - - - + - - - - ip_total_length 0x00051021 1 RW uint32 b[15:0] - - - + - - - - ip_services 0x00051022 1 RW uint32 b[7:0] - - - + - - - - ip_header_length 0x00051023 1 RW uint32 b[3:0] - - - + - - - - ip_version 0x00051024 1 RW uint32 b[3:0] - - - + - - - - eth_type 0x00051025 1 RW uint32 b[15:0] - - - + - - - - eth_source_mac 0x00051026 1 RW uint64 b[31:0] b[31:0] - - + - - - - - 0x00051027 - - - b[15:0] b[47:32] - - + - - - - eth_destination_mac 0x00051028 1 RW uint64 b[31:0] b[31:0] - - + - - - - - 0x00051029 - - - b[15:0] b[47:32] - - + REG_DP_XONOFF 2 1 REG enable_stream 0x00051260 1 RW uint32 b[0:0] - 2 2 RAM_ST_BST 2 1 RAM data 0x00001000 976 RW uint64 b[31:0] b[31:0] 2048 2048 - - - - - 0x00001001 - - - b[21:0] b[53:32] - - - REG_STAT_ENABLE_BST 2 1 REG enable 0x0004325c 1 RW uint32 b[0:0] - 2 2 + REG_STAT_ENABLE_BST 2 1 REG enable 0x0005125c 1 RW uint32 b[0:0] - 2 2 REG_STAT_HDR_DAT_BST 2 1 REG bsn 0x00000d80 1 RW uint64 b[31:0] b[31:0] 64 64 - - - - - 0x00000d81 - - - b[31:0] b[63:32] - - - - - - block_period 0x00000d82 1 RW uint32 b[15:0] - - - @@ -640,10 +750,11 @@ number_of_columns = 13 - - - - sdp_source_info_f_adc 0x00000d8f 1 RW uint32 b[12:12] - - - - - - - sdp_source_info_nyquist_zone_index 0x00000d90 1 RW uint32 b[14:13] - - - - - - - sdp_source_info_antenna_band_index 0x00000d91 1 RW uint32 b[15:15] - - - - - - - - sdp_station_id 0x00000d92 1 RW uint32 b[15:0] - - - + - - - - sdp_station_info_station_id 0x00000d92 1 RW uint32 b[9:0] - - - + - - - - sdp_station_info_antenna_field_index 0x00000d92 1 RW uint32 b[15:10] - - - - - - - sdp_observation_id 0x00000d93 1 RW uint32 b[31:0] - - - - - - - - sdp_version_id 0x00000d94 1 RO uint32 b[7:0] - - - - - - - - sdp_marker 0x00000d95 1 RO uint32 b[7:0] - - - + - - - - sdp_version_id 0x00000d94 1 RW uint32 b[7:0] - - - + - - - - sdp_marker 0x00000d95 1 RW uint32 b[7:0] - - - - - - - udp_checksum 0x00000d96 1 RW uint32 b[15:0] - - - - - - - udp_length 0x00000d97 1 RW uint32 b[15:0] - - - - - - - udp_destination_port 0x00000d98 1 RW uint32 b[15:0] - - - @@ -660,30 +771,30 @@ number_of_columns = 13 - - - - ip_services 0x00000da3 1 RW uint32 b[7:0] - - - - - - - ip_header_length 0x00000da4 1 RW uint32 b[3:0] - - - - - - - ip_version 0x00000da5 1 RW uint32 b[3:0] - - - - - - - - eth_type 0x00000da6 1 RO uint32 b[15:0] - - - - - - - - eth_source_mac 0x00000da7 1 RO uint64 b[31:0] b[31:0] - - + - - - - eth_type 0x00000da6 1 RW uint32 b[15:0] - - - + - - - - eth_source_mac 0x00000da7 1 RW uint64 b[31:0] b[31:0] - - - - - - - 0x00000da8 - - - b[15:0] b[47:32] - - - - - - eth_destination_mac 0x00000da9 1 RW uint64 b[31:0] b[31:0] - - - - - - - 0x00000daa - - - b[15:0] b[47:32] - - - - - - word_align 0x00000dab 1 RW uint32 b[15:0] - - - - REG_BSN_MONITOR_V2_BST_OFFLOAD 2 1 REG xon_stable 0x000431a0 1 RO uint32 b[0:0] - 1 8 - - - - - ready_stable 0x000431a0 1 RO uint32 b[1:1] - - - - - - - - sync_timeout 0x000431a0 1 RO uint32 b[2:2] - - - - - - - - bsn_at_sync 0x000431a1 1 RO uint64 b[31:0] b[31:0] - - - - - - - - 0x000431a2 - - - b[31:0] b[63:32] - - - - - - - nof_sop 0x000431a3 1 RO uint32 b[31:0] - - - - - - - - nof_valid 0x000431a4 1 RO uint32 b[31:0] - - - - - - - - nof_err 0x000431a5 1 RO uint32 b[31:0] - - - - - - - - latency 0x000431a8 1 RO uint32 b[31:0] - - - - REG_BSN_MONITOR_V2_BEAMLET_OUTPUT 2 1 REG xon_stable 0x00043190 1 RO uint32 b[0:0] - 1 8 - - - - - ready_stable 0x00043190 1 RO uint32 b[1:1] - - - - - - - - sync_timeout 0x00043190 1 RO uint32 b[2:2] - - - - - - - - bsn_at_sync 0x00043191 1 RO uint64 b[31:0] b[31:0] - - - - - - - - 0x00043192 - - - b[31:0] b[63:32] - - - - - - - nof_sop 0x00043193 1 RO uint32 b[31:0] - - - - - - - - nof_valid 0x00043194 1 RO uint32 b[31:0] - - - - - - - - nof_err 0x00043195 1 RO uint32 b[31:0] - - - - - - - - latency 0x00043198 1 RO uint32 b[31:0] - - - + REG_BSN_MONITOR_V2_BST_OFFLOAD 2 1 REG xon_stable 0x000511a0 1 RO uint32 b[0:0] - 8 8 + - - - - ready_stable 0x000511a0 1 RO uint32 b[1:1] - - - + - - - - sync_timeout 0x000511a0 1 RO uint32 b[2:2] - - - + - - - - bsn_at_sync 0x000511a1 1 RO uint64 b[31:0] b[31:0] - - + - - - - - 0x000511a2 - - - b[31:0] b[63:32] - - + - - - - nof_sop 0x000511a3 1 RO uint32 b[31:0] - - - + - - - - nof_valid 0x000511a4 1 RO uint32 b[31:0] - - - + - - - - nof_err 0x000511a5 1 RO uint32 b[31:0] - - - + - - - - latency 0x000511a6 1 RO uint32 b[31:0] - - - + REG_BSN_MONITOR_V2_BEAMLET_OUTPUT 2 1 REG xon_stable 0x00051190 1 RO uint32 b[0:0] - 8 8 + - - - - ready_stable 0x00051190 1 RO uint32 b[1:1] - - - + - - - - sync_timeout 0x00051190 1 RO uint32 b[2:2] - - - + - - - - bsn_at_sync 0x00051191 1 RO uint64 b[31:0] b[31:0] - - + - - - - - 0x00051192 - - - b[31:0] b[63:32] - - + - - - - nof_sop 0x00051193 1 RO uint32 b[31:0] - - - + - - - - nof_valid 0x00051194 1 RO uint32 b[31:0] - - - + - - - - nof_err 0x00051195 1 RO uint32 b[31:0] - - - + - - - - latency 0x00051196 1 RO uint32 b[31:0] - - - REG_NW_10GBE_MAC 1 1 REG rx_transfer_control 0x00006000 1 RW uint32 b[0:0] - - - - - - - rx_transfer_status 0x00006001 1 RO uint32 b[0:0] - - - - - - - tx_transfer_control 0x00006002 1 RW uint32 b[0:0] - - - @@ -860,6 +971,6 @@ number_of_columns = 13 - - - - - 0x00007c3b - - - b[31:0] b[31:0] - - - - - - tx_stats_pfcmacctrlframes 0x00007c3c 1 RO uint64 b[3:0] b[35:32] - - - - - - - 0x00007c3d - - - b[31:0] b[31:0] - - - REG_NW_10GBE_ETH10G 1 1 REG tx_snk_out_xon 0x00043274 1 RO uint32 b[0:0] - - - - - - - - xgmii_tx_ready 0x00043274 1 RO uint32 b[1:1] - - - - - - - - xgmii_link_status 0x00043274 1 RO uint32 b[3:2] - - - \ No newline at end of file + REG_NW_10GBE_ETH10G 1 1 REG tx_snk_out_xon 0x00051274 1 RO uint32 b[0:0] - - - + - - - - xgmii_tx_ready 0x00051274 1 RO uint32 b[1:1] - - - + - - - - xgmii_link_status 0x00051274 1 RO uint32 b[3:2] - - - \ No newline at end of file -- GitLab