From e78d2207c826d73db9b53dd82c7de1dced8f51d4 Mon Sep 17 00:00:00 2001
From: Erik Kooistra <kooistra@astron.nl>
Date: Mon, 8 Jan 2018 15:43:45 +0000
Subject: [PATCH] Corrected Wait for protocol ready.
---
libraries/io/i2c/tb/vhdl/tb_i2c_master.vhd | 17 +++++++++++------
1 file changed, 11 insertions(+), 6 deletions(-)
diff --git a/libraries/io/i2c/tb/vhdl/tb_i2c_master.vhd b/libraries/io/i2c/tb/vhdl/tb_i2c_master.vhd
index a9bf5be9c1..4196619925 100644
--- a/libraries/io/i2c/tb/vhdl/tb_i2c_master.vhd
+++ b/libraries/io/i2c/tb/vhdl/tb_i2c_master.vhd
@@ -209,12 +209,17 @@ BEGIN
proc_mem_mm_bus_wr(0, c_control_activate, clk, control_miso, control_mosi);
-- Wait for protocol ready
- WHILE control_status='0' LOOP
- proc_mem_mm_bus_rd(0, clk, control_miso, control_mosi); -- read result available in control_status
- proc_mem_mm_bus_rd_latency(c_mem_reg_rd_latency, clk);
- control_status <= control_miso.rddata(c_control_ready_bi);
- proc_common_wait_some_cycles(clk, 1);
- END LOOP;
+ -- . wait for control_interrupt
+ -- . do not use control_mosi to poll control_status, because then it can just occur that the read
+ -- that act as acknowledge again clears the control_status before it got noticed in the
+ -- WHILE control_status='0' LOOP
+ proc_common_wait_until_high(clk, control_interrupt);
+ --WHILE control_status='0' LOOP
+ proc_mem_mm_bus_rd(0, clk, control_miso, control_mosi); -- read result available in control_status
+ proc_mem_mm_bus_rd_latency(c_mem_reg_rd_latency, clk);
+ control_status <= control_miso.rddata(c_control_ready_bi);
+ proc_common_wait_some_cycles(clk, 1);
+ --END LOOP;
-- Read result list
FOR I IN 0 TO c_expected_mask'LENGTH-1 LOOP
--
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