diff --git a/libraries/base/dp/src/vhdl/dp_field_blk.vhd b/libraries/base/dp/src/vhdl/dp_field_blk.vhd index 0cce5749ea9b0e4d8991f1cdb7d9d9fd2d058007..9382afaaa415128be978b63ed4a41eda8e950cba 100644 --- a/libraries/base/dp/src/vhdl/dp_field_blk.vhd +++ b/libraries/base/dp/src/vhdl/dp_field_blk.vhd @@ -33,7 +33,7 @@ USE work.dp_stream_pkg.ALL; -- . The fields in snk_in.data are determined by g_field_arr; -- . Each field can be overridden via MM when when its corresponding MM override bit is '1', -- if override = '0' the field is taken from snk_in.data. --- . The initial (default) values of the override bits are passed via g_ovr_init(one bit per field); +-- . The initial (default) values of the override bits are passed via g_field_sel(one bit per field); -- . Both the SLV as the override (ovr) fields can be read back via MM; @@ -77,7 +77,7 @@ USE work.dp_stream_pkg.ALL; ENTITY dp_field_blk IS GENERIC ( g_field_arr : t_common_field_arr; - g_ovr_init : STD_LOGIC_VECTOR; + g_field_sel : STD_LOGIC_VECTOR; g_snk_data_w : NATURAL; g_src_data_w : NATURAL ); @@ -116,7 +116,7 @@ END dp_field_blk; ARCHITECTURE str OF dp_field_blk IS - CONSTANT c_ovr_field_arr : t_common_field_arr(g_field_arr'RANGE) := field_ovr_arr(g_field_arr, g_ovr_init); + CONSTANT c_ovr_field_arr : t_common_field_arr(g_field_arr'RANGE) := field_ovr_arr(g_field_arr, g_field_sel); -- Mode: fields to data block (c_field_to_block=True) or data block to fields (c_field_to_block=False) -- a.k.a. wire to narrow or narrow to wide diff --git a/libraries/base/dp/src/vhdl/dp_offload_tx.vhd b/libraries/base/dp/src/vhdl/dp_offload_tx.vhd index e26d9be826bb95a03b7c4375948fa7dc6eedb31d..631873e131e53050f537042472e6d483d8fc98f3 100644 --- a/libraries/base/dp/src/vhdl/dp_offload_tx.vhd +++ b/libraries/base/dp/src/vhdl/dp_offload_tx.vhd @@ -52,7 +52,7 @@ ENTITY dp_offload_tx IS g_def_nof_blocks_per_packet : NATURAL; g_output_fifo_depth : NATURAL; --FIXME - unused g_hdr_field_arr : t_common_field_arr; - g_hdr_field_ovr_init : STD_LOGIC_VECTOR; + g_hdr_field_ovr_init : STD_LOGIC_VECTOR; --FIXME - rename to g_hdr_field_sel g_use_post_split_fifo : BOOLEAN := FALSE ); PORT ( @@ -277,7 +277,7 @@ BEGIN u_dp_field_blk : ENTITY work.dp_field_blk GENERIC MAP ( g_field_arr => field_arr_set_mode(g_hdr_field_arr , "RW"), - g_ovr_init => g_hdr_field_ovr_init, + g_field_sel => g_hdr_field_ovr_init, g_snk_data_w => c_dp_field_blk_snk_data_w, g_src_data_w => c_dp_field_blk_src_data_w )