From e4e0d30d34dfd2265e1722fc4beb848dc09bdd97 Mon Sep 17 00:00:00 2001
From: Erik Kooistra <kooistra@astron.nl>
Date: Wed, 21 Jan 2015 07:26:05 +0000
Subject: [PATCH] Added DDR4 IP library build scripts for 4G and 8G.
---
.../ip_arria10/ddr4_4g_1600/compile_ip.tcl | 62 +++++++++++++++++++
.../ddr4_4g_1600/copy_hex_files.tcl | 33 ++++++++++
.../ip_arria10/ddr4_4g_1600/generate_ip.sh | 54 ++++++++++++++++
.../ip_arria10/ddr4_4g_1600/hdllib.cfg | 17 +++++
.../ip_arria10/ddr4_8g_2400/compile_ip.tcl | 62 +++++++++++++++++++
.../ddr4_8g_2400/copy_hex_files.tcl | 33 ++++++++++
.../ip_arria10/ddr4_8g_2400/generate_ip.sh | 54 ++++++++++++++++
.../ip_arria10/ddr4_8g_2400/hdllib.cfg | 17 +++++
8 files changed, 332 insertions(+)
create mode 100644 libraries/technology/ip_arria10/ddr4_4g_1600/compile_ip.tcl
create mode 100644 libraries/technology/ip_arria10/ddr4_4g_1600/copy_hex_files.tcl
create mode 100755 libraries/technology/ip_arria10/ddr4_4g_1600/generate_ip.sh
create mode 100644 libraries/technology/ip_arria10/ddr4_4g_1600/hdllib.cfg
create mode 100644 libraries/technology/ip_arria10/ddr4_8g_2400/compile_ip.tcl
create mode 100644 libraries/technology/ip_arria10/ddr4_8g_2400/copy_hex_files.tcl
create mode 100755 libraries/technology/ip_arria10/ddr4_8g_2400/generate_ip.sh
create mode 100644 libraries/technology/ip_arria10/ddr4_8g_2400/hdllib.cfg
diff --git a/libraries/technology/ip_arria10/ddr4_4g_1600/compile_ip.tcl b/libraries/technology/ip_arria10/ddr4_4g_1600/compile_ip.tcl
new file mode 100644
index 0000000000..37436c8463
--- /dev/null
+++ b/libraries/technology/ip_arria10/ddr4_4g_1600/compile_ip.tcl
@@ -0,0 +1,62 @@
+#------------------------------------------------------------------------------
+#
+# Copyright (C) 2015
+# ASTRON (Netherlands Institute for Radio Astronomy) <http://www.astron.nl/>
+# JIVE (Joint Institute for VLBI in Europe) <http://www.jive.nl/>
+# P.O.Box 2, 7990 AA Dwingeloo, The Netherlands
+#
+# This program is free software: you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation, either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program. If not, see <http://www.gnu.org/licenses/>.
+#
+#------------------------------------------------------------------------------
+
+# This file is based on generated file generated/sim/mentor/msim_setup.tcl
+# - the values for modelsim_search_libraries key in the hdllib.cfg follow from altera libraries vmap section in the msim_setup.tcl
+# - vmap for the IP specific libraries and compile all IP source files into those libraries similar as in the msim_setup.tcl
+# - replace QSYS_SIMDIR by IP_DIR
+
+set IP_DIR "$env(RADIOHDL)/libraries/technology/ip_arria10/ddr4_4g_1600/generated/sim"
+
+#vlib ./work/ ;# Assume library work already exists
+
+vmap ip_arria10_ddr4_4g_1600_altera_emif_arch_nf_141 ./work/
+vmap ip_arria10_ddr4_4g_1600_altera_emif_141 ./work/
+
+vlog -sv "$IP_DIR/../altera_emif_arch_nf_141/sim/ip_arria10_ddr4_4g_1600_altera_emif_arch_nf_141_szjjfwa.sv" -work work
+vlog -sv "$IP_DIR/../altera_emif_arch_nf_141/sim/altera_emif_arch_nf_top.sv" -work work
+vlog -sv "$IP_DIR/../altera_emif_arch_nf_141/sim/altera_emif_arch_nf_bufs.sv" -work work
+vlog -sv "$IP_DIR/../altera_emif_arch_nf_141/sim/altera_emif_arch_nf_buf_udir_se_i.sv" -work work
+vlog -sv "$IP_DIR/../altera_emif_arch_nf_141/sim/altera_emif_arch_nf_buf_udir_se_o.sv" -work work
+vlog -sv "$IP_DIR/../altera_emif_arch_nf_141/sim/altera_emif_arch_nf_buf_udir_df_i.sv" -work work
+vlog -sv "$IP_DIR/../altera_emif_arch_nf_141/sim/altera_emif_arch_nf_buf_udir_df_o.sv" -work work
+vlog -sv "$IP_DIR/../altera_emif_arch_nf_141/sim/altera_emif_arch_nf_buf_udir_cp_i.sv" -work work
+vlog -sv "$IP_DIR/../altera_emif_arch_nf_141/sim/altera_emif_arch_nf_buf_bdir_df.sv" -work work
+vlog -sv "$IP_DIR/../altera_emif_arch_nf_141/sim/altera_emif_arch_nf_buf_bdir_se.sv" -work work
+vlog -sv "$IP_DIR/../altera_emif_arch_nf_141/sim/altera_emif_arch_nf_buf_unused.sv" -work work
+vlog -sv "$IP_DIR/../altera_emif_arch_nf_141/sim/altera_emif_arch_nf_pll.sv" -work work
+vlog -sv "$IP_DIR/../altera_emif_arch_nf_141/sim/altera_emif_arch_nf_pll_fast_sim.sv" -work work
+vlog -sv "$IP_DIR/../altera_emif_arch_nf_141/sim/altera_emif_arch_nf_oct.sv" -work work
+vlog -sv "$IP_DIR/../altera_emif_arch_nf_141/sim/altera_emif_arch_nf_core_clks_rsts.sv" -work work
+vlog -sv "$IP_DIR/../altera_emif_arch_nf_141/sim/altera_emif_arch_nf_hps_clks_rsts.sv" -work work
+vlog -sv "$IP_DIR/../altera_emif_arch_nf_141/sim/altera_emif_arch_nf_io_aux.sv" -work work
+vlog -sv "$IP_DIR/../altera_emif_arch_nf_141/sim/altera_emif_arch_nf_io_tiles.sv" -work work
+vlog -sv "$IP_DIR/../altera_emif_arch_nf_141/sim/altera_emif_arch_nf_hmc_avl_if.sv" -work work
+vlog -sv "$IP_DIR/../altera_emif_arch_nf_141/sim/altera_emif_arch_nf_hmc_sideband_if.sv" -work work
+vlog -sv "$IP_DIR/../altera_emif_arch_nf_141/sim/altera_emif_arch_nf_hmc_mmr_if.sv" -work work
+vlog -sv "$IP_DIR/../altera_emif_arch_nf_141/sim/altera_emif_arch_nf_hmc_amm_data_if.sv" -work work
+vlog -sv "$IP_DIR/../altera_emif_arch_nf_141/sim/altera_emif_arch_nf_hmc_ast_data_if.sv" -work work
+vlog -sv "$IP_DIR/../altera_emif_arch_nf_141/sim/altera_emif_arch_nf_afi_if.sv" -work work
+vlog -sv "$IP_DIR/../altera_emif_arch_nf_141/sim/altera_emif_arch_nf_seq_if.sv" -work work
+vlog -sv "$IP_DIR/../altera_emif_arch_nf_141/sim/altera_emif_arch_nf_regs.sv" -work work
+vlog "$IP_DIR/../altera_emif_141/sim/ip_arria10_ddr4_4g_1600_altera_emif_141_mdmsrdi.v" -work work
+vcom "$IP_DIR/ip_arria10_ddr4_4g_1600.vhd"
diff --git a/libraries/technology/ip_arria10/ddr4_4g_1600/copy_hex_files.tcl b/libraries/technology/ip_arria10/ddr4_4g_1600/copy_hex_files.tcl
new file mode 100644
index 0000000000..e223b86851
--- /dev/null
+++ b/libraries/technology/ip_arria10/ddr4_4g_1600/copy_hex_files.tcl
@@ -0,0 +1,33 @@
+#------------------------------------------------------------------------------
+#
+# Copyright (C) 2015
+# ASTRON (Netherlands Institute for Radio Astronomy) <http://www.astron.nl/>
+# JIVE (Joint Institute for VLBI in Europe) <http://www.jive.nl/>
+# P.O.Box 2, 7990 AA Dwingeloo, The Netherlands
+#
+# This program is free software: you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation, either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program. If not, see <http://www.gnu.org/licenses/>.
+#
+#------------------------------------------------------------------------------
+
+# This file is based on Qsys-generated file generated/sim/mentor/msim_setup.tcl
+
+set IP_DIR "$env(RADIOHDL)/libraries/technology/ip_arria10/ddr4_4g_1600/generated/sim"
+
+# Copy ROM/RAM files to simulation directory
+if {[file isdirectory $IP_DIR]} {
+ file copy -force $IP_DIR/../altera_emif_arch_nf_141/sim/ip_arria10_ddr4_4g_1600_altera_emif_arch_nf_141_szjjfwa_seq_params_sim.hex ./
+ file copy -force $IP_DIR/../altera_emif_arch_nf_141/sim/ip_arria10_ddr4_4g_1600_altera_emif_arch_nf_141_szjjfwa_seq_params_synth.hex ./
+ file copy -force $IP_DIR/../altera_emif_arch_nf_141/sim/ip_arria10_ddr4_4g_1600_altera_emif_arch_nf_141_szjjfwa_seq_cal_sim.hex ./
+ file copy -force $IP_DIR/../altera_emif_arch_nf_141/sim/ip_arria10_ddr4_4g_1600_altera_emif_arch_nf_141_szjjfwa_seq_cal_synth.hex ./
+}
\ No newline at end of file
diff --git a/libraries/technology/ip_arria10/ddr4_4g_1600/generate_ip.sh b/libraries/technology/ip_arria10/ddr4_4g_1600/generate_ip.sh
new file mode 100755
index 0000000000..e1b94a498f
--- /dev/null
+++ b/libraries/technology/ip_arria10/ddr4_4g_1600/generate_ip.sh
@@ -0,0 +1,54 @@
+#!/bin/bash
+# -------------------------------------------------------------------------- #
+#
+# Copyright (C) 2014
+# ASTRON (Netherlands Institute for Radio Astronomy) <http://www.astron.nl/>
+# JIVE (Joint Institute for VLBI in Europe) <http://www.jive.nl/>
+# P.O.Box 2, 7990 AA Dwingeloo, The Netherlands
+#
+# This program is free software: you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation, either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program. If not, see <http://www.gnu.org/licenses/>.
+#
+# -------------------------------------------------------------------------- #
+#
+# Purpose: Generate IP with Qsys
+# Description:
+# Generate the IP in a separate generated/ subdirectory.
+#
+# Usage:
+#
+# ./generate_ip.sh
+#
+
+# Tool settings for selected target "unb2" with arria10
+. ${RADIOHDL}/tools/quartus/set_quartus unb2
+
+#qsys-generate --help
+
+# Only generate the source IP
+# - use --synthesis=VHDL to have top level in VHDL similar as with MegaWizard
+qsys-generate ip_arria10_ddr4_4g_1600.qsys \
+ --synthesis=VHDL \
+ --simulation=VHDL \
+ --output-directory=generated \
+ --allow-mixed-language-simulation
+
+# Also generate the testbench IP, this is not useful because it only generates bus functional models, so not a DDR4 memory model
+#qsys-generate ip_arria10_ddr4_4g_1600.qsys \
+# --synthesis=VHDL \
+# --simulation=VHDL \
+# --testbench=STANDARD \
+# --testbench-simulation=VHDL \
+# --output-directory=generated \
+# --allow-mixed-language-simulation \
+# --allow-mixed-language-testbench-simulation
diff --git a/libraries/technology/ip_arria10/ddr4_4g_1600/hdllib.cfg b/libraries/technology/ip_arria10/ddr4_4g_1600/hdllib.cfg
new file mode 100644
index 0000000000..0b90e333fb
--- /dev/null
+++ b/libraries/technology/ip_arria10/ddr4_4g_1600/hdllib.cfg
@@ -0,0 +1,17 @@
+hdl_lib_name = ip_arria10_ddr4_4g_1600
+hdl_library_clause_name = ip_arria10_ddr4_4g_1600_altera_emif_141
+hdl_lib_uses =
+hdl_lib_technology = ip_arria10
+
+build_dir_sim = $HDL_BUILD_DIR
+build_dir_synth = $HDL_BUILD_DIR
+
+modelsim_compile_ip_files =
+ $RADIOHDL/libraries/technology/ip_arria10/ddr4_4g_1600/compile_ip.tcl
+
+synth_files =
+
+test_bench_files =
+
+quartus_qip_files =
+ generated/ip_arria10_ddr4_4g_1600.qip
diff --git a/libraries/technology/ip_arria10/ddr4_8g_2400/compile_ip.tcl b/libraries/technology/ip_arria10/ddr4_8g_2400/compile_ip.tcl
new file mode 100644
index 0000000000..10f58ed732
--- /dev/null
+++ b/libraries/technology/ip_arria10/ddr4_8g_2400/compile_ip.tcl
@@ -0,0 +1,62 @@
+#------------------------------------------------------------------------------
+#
+# Copyright (C) 2015
+# ASTRON (Netherlands Institute for Radio Astronomy) <http://www.astron.nl/>
+# JIVE (Joint Institute for VLBI in Europe) <http://www.jive.nl/>
+# P.O.Box 2, 7990 AA Dwingeloo, The Netherlands
+#
+# This program is free software: you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation, either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program. If not, see <http://www.gnu.org/licenses/>.
+#
+#------------------------------------------------------------------------------
+
+# This file is based on generated file generated/sim/mentor/msim_setup.tcl
+# - the values for modelsim_search_libraries key in the hdllib.cfg follow from altera libraries vmap section in the msim_setup.tcl
+# - vmap for the IP specific libraries and compile all IP source files into those libraries similar as in the msim_setup.tcl
+# - replace QSYS_SIMDIR by IP_DIR
+
+set IP_DIR "$env(RADIOHDL)/libraries/technology/ip_arria10/ddr4_8g_2400/generated/sim"
+
+#vlib ./work/ ;# Assume library work already exists
+
+vmap ip_arria10_ddr4_8g_2400_altera_emif_arch_nf_141 ./work/
+vmap ip_arria10_ddr4_8g_2400_altera_emif_141 ./work/
+
+vlog -sv "$IP_DIR/../altera_emif_arch_nf_141/sim/ip_arria10_ddr4_8g_2400_altera_emif_arch_nf_141_rehmf4i.sv" -work work
+vlog -sv "$IP_DIR/../altera_emif_arch_nf_141/sim/altera_emif_arch_nf_top.sv" -work work
+vlog -sv "$IP_DIR/../altera_emif_arch_nf_141/sim/altera_emif_arch_nf_bufs.sv" -work work
+vlog -sv "$IP_DIR/../altera_emif_arch_nf_141/sim/altera_emif_arch_nf_buf_udir_se_i.sv" -work work
+vlog -sv "$IP_DIR/../altera_emif_arch_nf_141/sim/altera_emif_arch_nf_buf_udir_se_o.sv" -work work
+vlog -sv "$IP_DIR/../altera_emif_arch_nf_141/sim/altera_emif_arch_nf_buf_udir_df_i.sv" -work work
+vlog -sv "$IP_DIR/../altera_emif_arch_nf_141/sim/altera_emif_arch_nf_buf_udir_df_o.sv" -work work
+vlog -sv "$IP_DIR/../altera_emif_arch_nf_141/sim/altera_emif_arch_nf_buf_udir_cp_i.sv" -work work
+vlog -sv "$IP_DIR/../altera_emif_arch_nf_141/sim/altera_emif_arch_nf_buf_bdir_df.sv" -work work
+vlog -sv "$IP_DIR/../altera_emif_arch_nf_141/sim/altera_emif_arch_nf_buf_bdir_se.sv" -work work
+vlog -sv "$IP_DIR/../altera_emif_arch_nf_141/sim/altera_emif_arch_nf_buf_unused.sv" -work work
+vlog -sv "$IP_DIR/../altera_emif_arch_nf_141/sim/altera_emif_arch_nf_pll.sv" -work work
+vlog -sv "$IP_DIR/../altera_emif_arch_nf_141/sim/altera_emif_arch_nf_pll_fast_sim.sv" -work work
+vlog -sv "$IP_DIR/../altera_emif_arch_nf_141/sim/altera_emif_arch_nf_oct.sv" -work work
+vlog -sv "$IP_DIR/../altera_emif_arch_nf_141/sim/altera_emif_arch_nf_core_clks_rsts.sv" -work work
+vlog -sv "$IP_DIR/../altera_emif_arch_nf_141/sim/altera_emif_arch_nf_hps_clks_rsts.sv" -work work
+vlog -sv "$IP_DIR/../altera_emif_arch_nf_141/sim/altera_emif_arch_nf_io_aux.sv" -work work
+vlog -sv "$IP_DIR/../altera_emif_arch_nf_141/sim/altera_emif_arch_nf_io_tiles.sv" -work work
+vlog -sv "$IP_DIR/../altera_emif_arch_nf_141/sim/altera_emif_arch_nf_hmc_avl_if.sv" -work work
+vlog -sv "$IP_DIR/../altera_emif_arch_nf_141/sim/altera_emif_arch_nf_hmc_sideband_if.sv" -work work
+vlog -sv "$IP_DIR/../altera_emif_arch_nf_141/sim/altera_emif_arch_nf_hmc_mmr_if.sv" -work work
+vlog -sv "$IP_DIR/../altera_emif_arch_nf_141/sim/altera_emif_arch_nf_hmc_amm_data_if.sv" -work work
+vlog -sv "$IP_DIR/../altera_emif_arch_nf_141/sim/altera_emif_arch_nf_hmc_ast_data_if.sv" -work work
+vlog -sv "$IP_DIR/../altera_emif_arch_nf_141/sim/altera_emif_arch_nf_afi_if.sv" -work work
+vlog -sv "$IP_DIR/../altera_emif_arch_nf_141/sim/altera_emif_arch_nf_seq_if.sv" -work work
+vlog -sv "$IP_DIR/../altera_emif_arch_nf_141/sim/altera_emif_arch_nf_regs.sv" -work work
+vlog "$IP_DIR/../altera_emif_141/sim/ip_arria10_ddr4_8g_2400_altera_emif_141_2hmycgy.v" -work work
+vcom "$IP_DIR/ip_arria10_ddr4_8g_2400.vhd"
diff --git a/libraries/technology/ip_arria10/ddr4_8g_2400/copy_hex_files.tcl b/libraries/technology/ip_arria10/ddr4_8g_2400/copy_hex_files.tcl
new file mode 100644
index 0000000000..34cfeb2c1e
--- /dev/null
+++ b/libraries/technology/ip_arria10/ddr4_8g_2400/copy_hex_files.tcl
@@ -0,0 +1,33 @@
+#------------------------------------------------------------------------------
+#
+# Copyright (C) 2015
+# ASTRON (Netherlands Institute for Radio Astronomy) <http://www.astron.nl/>
+# JIVE (Joint Institute for VLBI in Europe) <http://www.jive.nl/>
+# P.O.Box 2, 7990 AA Dwingeloo, The Netherlands
+#
+# This program is free software: you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation, either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program. If not, see <http://www.gnu.org/licenses/>.
+#
+#------------------------------------------------------------------------------
+
+# This file is based on Qsys-generated file generated/sim/mentor/msim_setup.tcl
+
+set IP_DIR "$env(RADIOHDL)/libraries/technology/ip_arria10/ddr4_8g_2400/generated/sim"
+
+# Copy ROM/RAM files to simulation directory
+if {[file isdirectory $IP_DIR]} {
+ file copy -force $IP_DIR/../altera_emif_arch_nf_141/sim/ip_arria10_ddr4_8g_2400_altera_emif_arch_nf_141_rehmf4i_seq_params_sim.hex ./
+ file copy -force $IP_DIR/../altera_emif_arch_nf_141/sim/ip_arria10_ddr4_8g_2400_altera_emif_arch_nf_141_rehmf4i_seq_params_synth.hex ./
+ file copy -force $IP_DIR/../altera_emif_arch_nf_141/sim/ip_arria10_ddr4_8g_2400_altera_emif_arch_nf_141_rehmf4i_seq_cal_sim.hex ./
+ file copy -force $IP_DIR/../altera_emif_arch_nf_141/sim/ip_arria10_ddr4_8g_2400_altera_emif_arch_nf_141_rehmf4i_seq_cal_synth.hex ./
+}
diff --git a/libraries/technology/ip_arria10/ddr4_8g_2400/generate_ip.sh b/libraries/technology/ip_arria10/ddr4_8g_2400/generate_ip.sh
new file mode 100755
index 0000000000..a6c63a8a24
--- /dev/null
+++ b/libraries/technology/ip_arria10/ddr4_8g_2400/generate_ip.sh
@@ -0,0 +1,54 @@
+#!/bin/bash
+# -------------------------------------------------------------------------- #
+#
+# Copyright (C) 2014
+# ASTRON (Netherlands Institute for Radio Astronomy) <http://www.astron.nl/>
+# JIVE (Joint Institute for VLBI in Europe) <http://www.jive.nl/>
+# P.O.Box 2, 7990 AA Dwingeloo, The Netherlands
+#
+# This program is free software: you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation, either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program. If not, see <http://www.gnu.org/licenses/>.
+#
+# -------------------------------------------------------------------------- #
+#
+# Purpose: Generate IP with Qsys
+# Description:
+# Generate the IP in a separate generated/ subdirectory.
+#
+# Usage:
+#
+# ./generate_ip.sh
+#
+
+# Tool settings for selected target "unb2" with arria10
+. ${RADIOHDL}/tools/quartus/set_quartus unb2
+
+#qsys-generate --help
+
+# Only generate the source IP
+# - use --synthesis=VHDL to have top level in VHDL similar as with MegaWizard
+qsys-generate ip_arria10_ddr4_8g_2400.qsys \
+ --synthesis=VHDL \
+ --simulation=VHDL \
+ --output-directory=generated \
+ --allow-mixed-language-simulation
+
+# Also generate the testbench IP, this is not useful because it only generates bus functional models, so not a DDR4 memory model
+#qsys-generate ip_arria10_ddr4_8g_2400.qsys \
+# --synthesis=VHDL \
+# --simulation=VHDL \
+# --testbench=STANDARD \
+# --testbench-simulation=VHDL \
+# --output-directory=generated \
+# --allow-mixed-language-simulation \
+# --allow-mixed-language-testbench-simulation
diff --git a/libraries/technology/ip_arria10/ddr4_8g_2400/hdllib.cfg b/libraries/technology/ip_arria10/ddr4_8g_2400/hdllib.cfg
new file mode 100644
index 0000000000..d15b6e4ff0
--- /dev/null
+++ b/libraries/technology/ip_arria10/ddr4_8g_2400/hdllib.cfg
@@ -0,0 +1,17 @@
+hdl_lib_name = ip_arria10_ddr4_8g_2400
+hdl_library_clause_name = ip_arria10_ddr4_8g_2400_altera_emif_141
+hdl_lib_uses =
+hdl_lib_technology = ip_arria10
+
+build_dir_sim = $HDL_BUILD_DIR
+build_dir_synth = $HDL_BUILD_DIR
+
+modelsim_compile_ip_files =
+ $RADIOHDL/libraries/technology/ip_arria10/ddr4_8g_2400/compile_ip.tcl
+
+synth_files =
+
+test_bench_files =
+
+quartus_qip_files =
+ generated/ip_arria10_ddr4_8g_2400.qip
--
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