From e3ed3bf712b2726afb6042009b2e30c8bbc89267 Mon Sep 17 00:00:00 2001 From: Pepping <pepping> Date: Fri, 31 Jul 2015 09:56:20 +0000 Subject: [PATCH] Create construct that fixes the difference between hardware and simulation. --- .../src/vhdl/node_apertif_unb1_cor_mesh_ref.vhd | 17 ++++++++++++----- 1 file changed, 12 insertions(+), 5 deletions(-) diff --git a/applications/apertif/designs/apertif_unb1_cor_mesh_ref/src/vhdl/node_apertif_unb1_cor_mesh_ref.vhd b/applications/apertif/designs/apertif_unb1_cor_mesh_ref/src/vhdl/node_apertif_unb1_cor_mesh_ref.vhd index 2e315dcc5d..86e37d10d3 100644 --- a/applications/apertif/designs/apertif_unb1_cor_mesh_ref/src/vhdl/node_apertif_unb1_cor_mesh_ref.vhd +++ b/applications/apertif/designs/apertif_unb1_cor_mesh_ref/src/vhdl/node_apertif_unb1_cor_mesh_ref.vhd @@ -355,11 +355,18 @@ BEGIN --------------------------------------------------------------------------------------- gen_i_tx : FOR I IN 0 TO g_nof_bus-1 GENERATE gen_j_tx : FOR J IN 0 TO g_usr_nof_streams-1 GENERATE --- tx_usr_sosi_2arr(I)(g_usr_nof_streams-1-J)<= tx_mesh_sosi_arr(I*g_usr_nof_streams + J); --- tx_mesh_siso_arr(I*g_usr_nof_streams + J) <= tx_usr_siso_2arr(I)(g_usr_nof_streams-1-J); - - tx_usr_sosi_2arr(I)(J) <= tx_mesh_sosi_arr(I*g_usr_nof_streams + J); - tx_mesh_siso_arr(I*g_usr_nof_streams + J) <= tx_usr_siso_2arr(I)(J); + + -- Create alternative mapping for hardware to have the proper order + gen_synth : IF g_sim = FALSE GENERATE + tx_usr_sosi_2arr(I)(g_usr_nof_streams-1-J)<= tx_mesh_sosi_arr(I*g_usr_nof_streams + J); + tx_mesh_siso_arr(I*g_usr_nof_streams + J) <= tx_usr_siso_2arr(I)(g_usr_nof_streams-1-J); + END GENERATE; + + -- Straight mapping in simulation + gen_sim : IF g_sim = TRUE GENERATE + tx_usr_sosi_2arr(I)(J) <= tx_mesh_sosi_arr(I*g_usr_nof_streams + J); + tx_mesh_siso_arr(I*g_usr_nof_streams + J) <= tx_usr_siso_2arr(I)(J); + END GENERATE; END GENERATE; END GENERATE; -- GitLab