From e259607f21e9e8c11f0fa97e843df9baf8de2a52 Mon Sep 17 00:00:00 2001 From: Leon Hiemstra <hiemstra@astron.nl> Date: Mon, 5 Oct 2015 12:07:54 +0000 Subject: [PATCH] cosmetic --- libraries/io/fpga_temp_sens/src/vhdl/fpga_temp_sens.vhd | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/libraries/io/fpga_temp_sens/src/vhdl/fpga_temp_sens.vhd b/libraries/io/fpga_temp_sens/src/vhdl/fpga_temp_sens.vhd index dbd5cc2adf..727e24c05c 100644 --- a/libraries/io/fpga_temp_sens/src/vhdl/fpga_temp_sens.vhd +++ b/libraries/io/fpga_temp_sens/src/vhdl/fpga_temp_sens.vhd @@ -65,7 +65,7 @@ ARCHITECTURE str OF fpga_temp_sens IS BEGIN - gen_tech_fpga_temp_sens: IF g_sim = FALSE GENERATE + gen_tech_fpga_temp_sens: IF g_sim=FALSE GENERATE u_tech_fpga_temp_sens : ENTITY tech_fpga_temp_sens_lib.tech_fpga_temp_sens GENERIC MAP ( g_technology => g_technology @@ -90,7 +90,7 @@ BEGIN - gen_no_tech_fpga_temp_sens: IF g_sim = TRUE GENERATE + gen_no_tech_fpga_temp_sens: IF g_sim=TRUE GENERATE temp_data <= RESIZE_UVEC(x"45",10); mm_reg_temp_data <= RESIZE_UVEC(temp_data,c_mem_reg_dat_w); END GENERATE; -- GitLab