diff --git a/applications/lofar2/libraries/sdp/tb/vhdl/tb_sdp_statistics_offload.vhd b/applications/lofar2/libraries/sdp/tb/vhdl/tb_sdp_statistics_offload.vhd
index b7cef66bc6aeb54f78cf96ea4f055e047e1340cd..0031f7d1593008eadc92c9a16e8f6236321d4b56 100644
--- a/applications/lofar2/libraries/sdp/tb/vhdl/tb_sdp_statistics_offload.vhd
+++ b/applications/lofar2/libraries/sdp/tb/vhdl/tb_sdp_statistics_offload.vhd
@@ -62,6 +62,7 @@ ARCHITECTURE tb OF tb_sdp_statistics_offload IS
CONSTANT c_cross_clock_domain_latency : NATURAL := 20;
+ -- In this tb simply use fixed src addresses
CONSTANT c_eth_src_mac : STD_LOGIC_VECTOR(c_network_eth_mac_addr_w-1 DOWNTO 0) := x"123456789ABC";
CONSTANT c_ip_src_addr : STD_LOGIC_VECTOR(c_network_ip_addr_w-1 DOWNTO 0) := x"0A090807";
CONSTANT c_udp_src_port : STD_LOGIC_VECTOR(c_network_udp_port_w-1 DOWNTO 0) := x"D001";
@@ -69,11 +70,6 @@ ARCHITECTURE tb OF tb_sdp_statistics_offload IS
-- Used mm_adresses on mm bus "enable_mosi/miso".
CONSTANT c_reg_enable_mm_addr_enable : NATURAL := 0;
- -- Used mm_adresses on mm bus "hdr_dat_mosi/miso".
- CONSTANT c_hdr_dat_mm_addr_eth_src_mac : NATURAL := 1;
- CONSTANT c_hdr_dat_mm_addr_ip_src_addr : NATURAL := 13;
- CONSTANT c_hdr_dat_mm_addr_udp_src_port : NATURAL := 15;
-
-- header fields
CONSTANT c_nof_statistics_per_packet : NATURAL := func_sdp_get_stat_nof_statistics_per_packet(g_statistics_type);
CONSTANT c_udp_total_length : NATURAL := func_sdp_get_stat_udp_total_length(g_statistics_type);
@@ -95,6 +91,7 @@ ARCHITECTURE tb OF tb_sdp_statistics_offload IS
CONSTANT c_ram_buf : t_c_mem := (1, c_ram_w, 32, 2**c_ram_w, 'X');
-- Define block timing.
+ CONSTANT c_bsn_init : NATURAL := 0;
CONSTANT c_nof_block_per_sync : NATURAL := 80; -- Sufficient to fit more than c_nof_packets offload packets per sync interval.
CONSTANT c_nof_clk_per_block : NATURAL := c_nof_data * c_data_size;
CONSTANT c_nof_valid_per_block : NATURAL := c_nof_data * c_data_size;
@@ -122,16 +119,18 @@ ARCHITECTURE tb OF tb_sdp_statistics_offload IS
SIGNAL offload_rx_hdr_dat_miso : t_mem_miso;
SIGNAL in_sosi : t_dp_sosi := c_dp_sosi_rst;
+
+ SIGNAL offload_data : STD_LOGIC_VECTOR(31 DOWNTO 0);
SIGNAL offload_sosi : t_dp_sosi;
SIGNAL offload_siso : t_dp_siso := c_dp_siso_rst;
SIGNAL test_offload_sosi : t_dp_sosi := c_dp_sosi_rst;
- SIGNAL test_offload_siso : t_dp_siso;
SIGNAL rx_hdr_fields_out : STD_LOGIC_VECTOR(1023 DOWNTO 0);
SIGNAL rx_hdr_fields_raw : STD_LOGIC_VECTOR(1023 DOWNTO 0) := (OTHERS => '0');
SIGNAL rx_sdp_stat_header : t_sdp_stat_header;
SIGNAL exp_sdp_stat_header : t_sdp_stat_header;
+ SIGNAL exp_bsn : STD_LOGIC_VECTOR(63 DOWNTO 0);
-- Signals used to change settings of sdp_info.
SIGNAL gn_index : NATURAL := 1; -- select > 0 to see effect of g_offload_time
@@ -159,9 +158,8 @@ ARCHITECTURE tb OF tb_sdp_statistics_offload IS
SIGNAL ram_wr_en : STD_LOGIC;
SIGNAL init_ram_done : STD_LOGIC := '0';
+ SIGNAL in_sync_cnt : NATURAL := 0;
SIGNAL in_sync_hold : STD_LOGIC := '0';
- SIGNAL rx_prev_bsn : NATURAL := 0;
- SIGNAL rx_bsn : NATURAL := 0;
SIGNAL rx_block_cnt : NATURAL := 0;
SIGNAL rx_valid_clk_cnt : NATURAL := 0;
@@ -202,16 +200,11 @@ BEGIN
WAIT;
END PROCESS;
- -- Module dp_offload_tx_v3.vhd can handle 32 data that is not aligned, dp_offload_rx can not.
- -- This is the reason the first 16bit of the header are always zero.
- -- This process will start counting with bit16 high, the first bit that wil be received,
- -- on each dp_clk the bsn is incremented with 0x10000, if you look at b63..b16 it looks like normal counting.
- -- If dp_offload_rx.vhd is fixed this can be set normal again.
p_in_sosi : PROCESS
BEGIN
proc_common_wait_until_low(dp_clk, dp_rst);
proc_common_wait_some_cycles(dp_clk, 12);
- in_sosi.bsn <= TO_DP_BSN(16#10000#);
+ in_sosi.bsn <= TO_DP_BSN(c_bsn_init);
in_sosi.valid <= '1';
WHILE TRUE LOOP
FOR i IN 0 TO c_nof_block_per_sync-1 LOOP
@@ -224,7 +217,7 @@ BEGIN
END IF;
IF j = 0 THEN
in_sosi.sop <= '1';
- in_sosi.bsn <= INCR_UVEC(in_sosi.bsn, 16#10000#); -- = 2**16 = 65536
+ in_sosi.bsn <= INCR_UVEC(in_sosi.bsn, 1);
END IF;
IF j = c_nof_clk_per_block-1 THEN
in_sosi.eop <= '1';
@@ -236,7 +229,7 @@ BEGIN
WAIT;
END PROCESS;
- p_exp_sdp_stat_header : PROCESS(sdp_info, subband_calibrated_flag, gn_index, rx_block_cnt)
+ p_exp_sdp_stat_header : PROCESS(sdp_info, subband_calibrated_flag, gn_index, rx_block_cnt, exp_bsn)
BEGIN
-- eth header
exp_sdp_stat_header.eth.dst_mac <= c_sdp_stat_eth_dst_mac;
@@ -298,7 +291,7 @@ BEGIN
exp_sdp_stat_header.app.sdp_nof_statistics_per_packet <= TO_UVEC(c_nof_statistics_per_packet, 16);
exp_sdp_stat_header.app.sdp_block_period <= sdp_info.block_period;
- exp_sdp_stat_header.app.dp_bsn <= TO_SVEC(-1, 64);
+ exp_sdp_stat_header.app.dp_bsn <= exp_bsn;
END PROCESS;
rx_sdp_stat_header <= func_sdp_extract_stat_header(rx_hdr_fields_raw);
@@ -309,7 +302,7 @@ BEGIN
IF test_offload_sosi.eop = '1' THEN
-- bsn is not fully received (bit 0-15 is missing) because 32 bit allignment not working in dp_offload_rx.vhd.
- v_bool := func_sdp_verify_stat_header(g_statistics_type, rx_sdp_stat_header, exp_sdp_stat_header, sdp_info, rx_bsn);
+ v_bool := func_sdp_verify_stat_header(g_statistics_type, rx_sdp_stat_header, exp_sdp_stat_header, sdp_info);
END IF;
END PROCESS;
@@ -334,10 +327,16 @@ BEGIN
END IF;
END PROCESS;
- -- Capture rx_bsn from header.
- rx_bsn <= TO_UINT(rx_hdr_fields_raw(field_hi(c_sdp_stat_hdr_field_arr, "dp_bsn") DOWNTO field_lo(c_sdp_stat_hdr_field_arr, "dp_bsn")+16));
- -- Keep rx_bsn from previous header.
- rx_prev_bsn <= rx_bsn WHEN rising_edge(dp_clk);
+ -- Count number of sync intervals, to determine expected statistics bsn
+ p_rx_sync_cnt : PROCESS(dp_clk)
+ BEGIN
+ IF rising_edge(dp_clk) THEN
+ IF in_sosi.sync = '1' THEN
+ in_sync_cnt <= in_sync_cnt + 1;
+ END IF;
+ END IF;
+ END PROCESS;
+ exp_bsn <= TO_SVEC(c_bsn_init + 1 + (in_sync_cnt - 1) * c_nof_block_per_sync, 64);
-- Verify number of blocks between 2 syncs and between 2 changed bsn numbers.
p_verify_nof_blocks : PROCESS(dp_clk)
@@ -349,13 +348,7 @@ BEGIN
ASSERT rx_block_cnt = c_nof_packets-1 REPORT "wrong number of blocks between 2 sync" SEVERITY ERROR;
END IF;
- -- rx_prev_bsn > 0 is needed for the first time, when there is no previous BSN.
- -- rx_bsn > rx_prev_bsn is needed to detect a new rx_bsn.
- IF rx_prev_bsn > 0 AND rx_bsn > rx_prev_bsn THEN
- ASSERT (rx_bsn - rx_prev_bsn) = c_nof_block_per_sync REPORT "wrong number of blocks between 2 bsn numbers" SEVERITY ERROR;
- END IF;
END IF;
- test_offload_siso <= c_dp_siso_rdy;
END IF;
END PROCESS;
@@ -423,7 +416,6 @@ BEGIN
snk_out_arr(0) => offload_siso,
src_out_arr(0) => test_offload_sosi,
- src_in_arr(0) => test_offload_siso,
hdr_fields_out_arr(0) => rx_hdr_fields_out,
hdr_fields_raw_arr(0) => rx_hdr_fields_raw
@@ -466,4 +458,7 @@ BEGIN
ip_src_addr => c_ip_src_addr
);
+ -- To view the 32 bit 1GbE offload data more easily in the Wave window
+ offload_data <= offload_sosi.data(31 DOWNTO 0);
+
END tb;