diff --git a/libraries/base/common/src/vhdl/common_pkg.vhd b/libraries/base/common/src/vhdl/common_pkg.vhd index 6a03dd4febeac90b23ead718456473be75f5d8d0..9eb0ba9e2122ea194d7b584c0ebec6b305448cd1 100644 --- a/libraries/base/common/src/vhdl/common_pkg.vhd +++ b/libraries/base/common/src/vhdl/common_pkg.vhd @@ -225,6 +225,10 @@ package common_pkg is function unpack_complex_im(data : integer; w : natural) return integer; -- pack order: im & re function unpack_complex_im(data : std_logic_vector; w : natural) return integer; -- pack order: im & re + -- data[left : right] --> t_slv_8_arr[left : right] + -- if necessary, call flip() on returned t_slv_8_arr to change the order + function unpack_data(data : std_logic_vector) return t_slv_8_arr; + function atan2(Y, X: real) return real; -- = ARCTAN(Y, X) but returns 0 when Y = X = 0, without reporting Error: ARCTAN(0.0, 0.0) is undetermined function to_natural_arr(n : t_integer_arr; to_zero : boolean) return t_natural_arr; -- if to_zero=TRUE then negative numbers are forced to zero, otherwise they will give a compile range error @@ -348,7 +352,7 @@ package common_pkg is function array_init(init, nof, incr : integer) return t_slv_32_arr; function array_init(init, nof, width : natural) return std_logic_vector; -- useful to init an unconstrained std_logic_vector with repetitive content function array_init(init, nof, width, incr : natural) return std_logic_vector; -- useful to init an unconstrained std_logic_vector with incrementing content - function array_sinit(init : integer; nof, width : natural) return std_logic_vector; -- useful to init an unconstrained std_logic_vector with repetitive content + function array_sinit(init : integer; nof, width : natural) return std_logic_vector; -- useful to init an unconstrained std_logic_vector with repetitive content function init_slv_64_matrix(nof_a, nof_b, k : integer) return t_slv_64_matrix; -- initialize all elements in t_slv_64_matrix to value k @@ -543,6 +547,7 @@ package common_pkg is function flip(a : std_logic_vector) return std_logic_vector; -- bit flip a vector, map a[h:0] to [0:h] function flip(a, w : natural) return natural; -- bit flip a vector, map a[h:0] to [0:h], h = w-1 function flip(a : t_slv_32_arr) return t_slv_32_arr; + function flip(a : t_slv_8_arr) return t_slv_8_arr; function flip(a : t_integer_arr) return t_integer_arr; function flip(a : t_natural_arr) return t_natural_arr; function flip(a : t_nat_natural_arr) return t_nat_natural_arr; @@ -823,6 +828,17 @@ package body common_pkg is return TO_SINT(v_complex_slv(c_complex_w - 1 downto w)); -- Im in MS part end; + function unpack_data(data : std_logic_vector) return t_slv_8_arr is + constant c_nof_octets : natural := data'length / c_octet_w; + variable v_data : std_logic_vector(data'length - 1 downto 0) := data; + variable v_a : t_slv_8_arr(c_nof_octets - 1 downto 0); + begin + for I in v_a'range loop + v_a(I) := v_data((I + 1) * c_octet_w - 1 downto I * c_octet_w); + end loop; + return v_a; + end; + function atan2(Y, X: real) return real is begin if Y = 0.0 and X = 0.0 then @@ -2799,6 +2815,16 @@ package body common_pkg is return v_b; end; + function flip(a : t_slv_8_arr) return t_slv_8_arr is + variable v_a : t_slv_8_arr(a'length - 1 downto 0) := a; + variable v_b : t_slv_8_arr(a'length - 1 downto 0); + begin + for I in v_a'range loop + v_b(a'length - 1 - I) := v_a(I); + end loop; + return v_b; + end flip; + function flip(a : t_integer_arr) return t_integer_arr is variable v_a : t_integer_arr(a'length - 1 downto 0) := a; variable v_b : t_integer_arr(a'length - 1 downto 0);