diff --git a/boards/uniboard2/designs/unb2_singlemac/build/quartus/unb2_singlemac.qsf b/boards/uniboard2/designs/unb2_singlemac/build/quartus/unb2_singlemac.qsf
index 9a122c4f78c301ababc8a3c00cbc63be13c3ad8f..a8aad52e76b2491cea2d1cdded40618cdefb5d3d 100644
--- a/boards/uniboard2/designs/unb2_singlemac/build/quartus/unb2_singlemac.qsf
+++ b/boards/uniboard2/designs/unb2_singlemac/build/quartus/unb2_singlemac.qsf
@@ -38,7 +38,7 @@
set_global_assignment -name FAMILY "Arria 10"
-set_global_assignment -name DEVICE 10AX115R2F40I2LG
+set_global_assignment -name DEVICE 10AX115U4F45I3SGES
set_global_assignment -name TOP_LEVEL_ENTITY unb2_singlemac
set_global_assignment -name ORIGINAL_QUARTUS_VERSION 14.0
set_global_assignment -name PROJECT_CREATION_TIME_DATE "13:59:19 NOVEMBER 14, 2014"
@@ -52,8 +52,8 @@ set_global_assignment -name MIN_CORE_JUNCTION_TEMP "-40"
set_global_assignment -name MAX_CORE_JUNCTION_TEMP 100
set_global_assignment -name POWER_PRESET_COOLING_SOLUTION "23 MM HEAT SINK WITH 200 LFPM AIRFLOW"
set_global_assignment -name POWER_BOARD_THERMAL_MODEL "NONE (CONSERVATIVE)"
-set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top
set_global_assignment -name QSYS_FILE ../../../unb2_test/src/ip/system_pll.qsys
+source ../../../../libraries/unb2_board/src/tcl/unb2_all_pins.tcl
set_global_assignment -name VHDL_FILE ../../../../../../../../UniBoard/trunk/Firmware/modules/common/src/vhdl/common_evt.vhd
set_global_assignment -name VHDL_FILE ../../../../../../../../UniBoard/trunk/Firmware/designs/unb_common/src/vhdl/unb_wdi_extend.vhd
set_global_assignment -name VHDL_FILE ../../../../../../../../UniBoard/trunk/Firmware/modules/common/src/vhdl/common_counter.vhd
@@ -72,4 +72,9 @@ set_global_assignment -name QSYS_FILE ../../../../../../libraries/technology/ip_
set_global_assignment -name QSYS_FILE ../../../../../../libraries/technology/ip_arria10/transceiver_reset_controller_1/transceiver_reset_controller_1.qsys
set_global_assignment -name QSYS_FILE ../../../../../../libraries/technology/ip_arria10/transceiver_phy_1/transceiver_phy_1.qsys
set_global_assignment -name VHDL_FILE ../../src/vhdl/unb2_singlemac.vhd
-set_global_assignment -name SDC_FILE ../../src/sdc/unb2_singlemac.sdc
\ No newline at end of file
+set_global_assignment -name SDC_FILE ../../src/sdc/unb2_singlemac.sdc
+set_global_assignment -name QSYS_FILE ../../../../../../libraries/technology/ip_arria10/pll_xgmii_mac_clocks/pll_xgmii_mac_clocks.qsys
+set_global_assignment -name STRATIX_DEVICE_IO_STANDARD "1.8 V"
+
+
+set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top
\ No newline at end of file
diff --git a/boards/uniboard2/designs/unb2_singlemac/src/vhdl/unb2_singlemac.vhd b/boards/uniboard2/designs/unb2_singlemac/src/vhdl/unb2_singlemac.vhd
index 1b2d33fe4f2bdc0121ee5d0fd3b8ffbbc8545e88..7efd72a4886a7d96ba6729325b457907ff488d2f 100644
--- a/boards/uniboard2/designs/unb2_singlemac/src/vhdl/unb2_singlemac.vhd
+++ b/boards/uniboard2/designs/unb2_singlemac/src/vhdl/unb2_singlemac.vhd
@@ -118,7 +118,8 @@ ENTITY unb2_singlemac IS
-- CFG_DATA : inout std_logic_vector (3 downto 0);
VERSION : IN STD_LOGIC_VECTOR(1 DOWNTO 0);
ID : IN STD_LOGIC_VECTOR(7 DOWNTO 0);
- TESTIO : INOUT STD_LOGIC_VECTOR(7 DOWNTO 0)
+ TESTIO : INOUT STD_LOGIC_VECTOR(5 DOWNTO 0);
+ QSFP_LED : INOUT STD_LOGIC_VECTOR(11 DOWNTO 0)
);
end unb2_singlemac;
@@ -246,11 +247,13 @@ architecture str of unb2_singlemac is
-- signals for the bidirectional and misc ios
signal inta_in : std_logic;
signal intb_in : std_logic;
- signal testio_in : std_logic_vector(7 downto 0);
+ signal testio_in : std_logic_vector(5 downto 0);
+ signal qsfp_led_in : std_logic_vector(11 downto 0);
signal bck_err_in : std_logic_vector(2 downto 0);
signal inta_out : std_logic;
signal intb_out : std_logic;
- signal testio_out : std_logic_vector(7 downto 0);
+ signal testio_out : std_logic_vector(5 downto 0);
+ signal qsfp_led_out : std_logic_vector(11 downto 0);
signal bck_err_out : std_logic_vector(2 downto 0);
signal ver_id_pmbusalert : std_logic_vector(10 downto 0);
@@ -363,18 +366,22 @@ begin
INTA <= inta_out when PPS = '1' else 'Z';
INTB <= intb_out when PPS = '1' else 'Z';
- TESTIO <= testio_out when PPS = '1' else "ZZZZZZZZ";
+ TESTIO <= testio_out when PPS = '1' else "ZZZZZZ";
+ QSFP_LED <= qsfp_led_out when PPS = '1' else "ZZZZZZZZZZZZ";
BCK_ERR <= bck_err_out when PPS = '1' else "ZZZ";
inta_in <= INTA;
intb_in <= INTB;
testio_in <= TESTIO;
+ qsfp_led_in <= QSFP_LED;
bck_err_in <= BCK_ERR;
inta_out <= intb_in;
intb_out <= inta_in;
- testio_out(7 downto 4) <= testio_in(3 downto 0);
- testio_out(3 downto 0) <= testio_in(7 downto 4);
+ testio_out(5 downto 3) <= testio_in(2 downto 0);
+ testio_out(2 downto 0) <= testio_in(5 downto 3);
+ qsfp_led_out(11 downto 6) <= qsfp_led_in(5 downto 0);
+ qsfp_led_out(5 downto 0) <= qsfp_led_in(11 downto 6);
bck_err_out(2) <= bck_err_in(1);
bck_err_out(1) <= bck_err_in(0);
bck_err_out(0) <= bck_err_in(2);