From dbbdabc5973801c5b59269d31daedbcc1f22a2e7 Mon Sep 17 00:00:00 2001
From: Erik Kooistra <kooistra@astron.nl>
Date: Tue, 9 Dec 2014 07:12:21 +0000
Subject: [PATCH] Added g_sim_level for tech_10gbase_r.
---
libraries/technology/eth_10g/tech_eth_10g_arria10.vhd | 2 ++
1 file changed, 2 insertions(+)
diff --git a/libraries/technology/eth_10g/tech_eth_10g_arria10.vhd b/libraries/technology/eth_10g/tech_eth_10g_arria10.vhd
index 77e0365058..fedeaf6986 100644
--- a/libraries/technology/eth_10g/tech_eth_10g_arria10.vhd
+++ b/libraries/technology/eth_10g/tech_eth_10g_arria10.vhd
@@ -71,6 +71,7 @@ USE tech_mac_10g_lib.tech_mac_10g_component_pkg.ALL;
ENTITY tech_eth_10g_arria10 IS
GENERIC (
g_sim : BOOLEAN := FALSE;
+ g_sim_level : NATURAL := 0; -- 0 = use IP; 1 = use fast serdes model
g_nof_channels : NATURAL := 1;
g_link_status_check : STD_LOGIC_VECTOR(c_tech_mac_10g_link_status_w-1 DOWNTO 0) := "11";
g_pre_header_padding : BOOLEAN := FALSE
@@ -174,6 +175,7 @@ BEGIN
GENERIC MAP (
g_technology => c_tech_arria10,
g_sim => g_sim,
+ g_sim_level => g_sim_level,
g_nof_channels => g_nof_channels
)
PORT MAP (
--
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