From dba406be148d9d72d4fd7d3dd97bc84638a4ca1d Mon Sep 17 00:00:00 2001
From: Daniel van der Schuur <schuur@astron.nl>
Date: Wed, 31 May 2017 11:47:45 +0000
Subject: [PATCH] -Fixed bug: when initial setting > 0, a pulse was output
right after reset. Fixed by setting g_init of common_counter to 1 to match
the load-input value.
---
libraries/base/common/src/vhdl/common_pulse_delay.vhd | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/libraries/base/common/src/vhdl/common_pulse_delay.vhd b/libraries/base/common/src/vhdl/common_pulse_delay.vhd
index 19653c95fd..e91b76cdde 100644
--- a/libraries/base/common/src/vhdl/common_pulse_delay.vhd
+++ b/libraries/base/common/src/vhdl/common_pulse_delay.vhd
@@ -82,7 +82,8 @@ BEGIN
-------------------------------------------------------------------------------
u_common_counter : ENTITY work.common_counter
GENERIC MAP (
- g_width => c_pulse_delay_max_width
+ g_width => c_pulse_delay_max_width,
+ g_init => 1
)
PORT MAP (
clk => clk,
--
GitLab