diff --git a/applications/apertif/designs/apertif_unb1_correlator/quartus/qsys_apertif_unb1_correlator.qsys b/applications/apertif/designs/apertif_unb1_correlator/quartus/qsys_apertif_unb1_correlator.qsys
index e59c0c009a7a8924afa4f663af1510f9878767a7..2406dfd90c3bb4d2811fc00083ebffa12915a3f6 100644
--- a/applications/apertif/designs/apertif_unb1_correlator/quartus/qsys_apertif_unb1_correlator.qsys
+++ b/applications/apertif/designs/apertif_unb1_correlator/quartus/qsys_apertif_unb1_correlator.qsys
@@ -37,7 +37,7 @@
}
datum sopceditor_expanded
{
- value = "1";
+ value = "0";
type = "boolean";
}
}
@@ -82,7 +82,7 @@
}
datum sopceditor_expanded
{
- value = "1";
+ value = "0";
type = "boolean";
}
}
@@ -133,6 +133,14 @@
type = "boolean";
}
}
+ element ram_fil_coefs.mem
+ {
+ datum baseAddress
+ {
+ value = "14336";
+ type = "long";
+ }
+ }
element reg_mdio_2.mem
{
datum baseAddress
@@ -141,69 +149,77 @@
type = "long";
}
}
- element reg_tr_10GbE.mem
+ element pio_system_info.mem
{
- datum _tags
+ datum _lockedAddress
{
- value = "";
- type = "String";
+ value = "1";
+ type = "boolean";
}
datum baseAddress
{
- value = "262144";
+ value = "0";
type = "long";
}
}
- element reg_unb_sens.mem
+ element reg_wdi.mem
{
+ datum _lockedAddress
+ {
+ value = "1";
+ type = "boolean";
+ }
datum baseAddress
{
- value = "1600";
+ value = "12288";
type = "long";
}
}
- element reg_bsn_monitor.mem
+ element pio_pps.mem
{
datum baseAddress
{
- value = "1024";
+ value = "1696";
type = "long";
}
}
- element ram_diag_data_buf.mem
+ element reg_tr_xaui.mem
{
datum baseAddress
{
- value = "524288";
+ value = "16384";
type = "long";
}
}
- element ram_fil_coefs.mem
+ element reg_dp_offload_tx_hdr_dat.mem
{
datum baseAddress
{
- value = "14336";
+ value = "256";
type = "long";
}
}
- element pio_system_info.mem
+ element reg_bsn_monitor.mem
{
- datum _lockedAddress
+ datum baseAddress
{
- value = "1";
- type = "boolean";
+ value = "1024";
+ type = "long";
}
+ }
+ element reg_mdio_0.mem
+ {
datum baseAddress
{
- value = "0";
+ value = "1568";
type = "long";
}
}
- element reg_dp_offload_rx_hdr_dat.mem
+ element ram_diag_data_buf.mem
{
datum baseAddress
{
- value = "512";
+ value = "524288";
type = "long";
}
}
@@ -228,56 +244,40 @@
type = "long";
}
}
- element reg_diag_data_buf.mem
- {
- datum baseAddress
- {
- value = "1688";
- type = "long";
- }
- }
- element reg_mdio_0.mem
+ element reg_tr_10GbE.mem
{
- datum baseAddress
+ datum _tags
{
- value = "1568";
- type = "long";
+ value = "";
+ type = "String";
}
- }
- element reg_tr_xaui.mem
- {
datum baseAddress
{
- value = "16384";
+ value = "262144";
type = "long";
}
}
- element pio_pps.mem
+ element reg_dp_offload_rx_hdr_dat.mem
{
datum baseAddress
{
- value = "1696";
+ value = "512";
type = "long";
}
}
- element reg_wdi.mem
+ element reg_unb_sens.mem
{
- datum _lockedAddress
- {
- value = "1";
- type = "boolean";
- }
datum baseAddress
{
- value = "12288";
+ value = "1600";
type = "long";
}
}
- element reg_dp_offload_tx_hdr_dat.mem
+ element reg_diag_data_buf.mem
{
datum baseAddress
{
- value = "256";
+ value = "1688";
type = "long";
}
}
@@ -358,7 +358,7 @@
}
datum sopceditor_expanded
{
- value = "1";
+ value = "0";
type = "boolean";
}
}
@@ -446,6 +446,14 @@
type = "int";
}
}
+ element reg_diag_bg
+ {
+ datum _sortIndex
+ {
+ value = "26";
+ type = "int";
+ }
+ }
element reg_diag_data_buf
{
datum _sortIndex
@@ -574,40 +582,40 @@
type = "boolean";
}
}
- element timer_0.s1
+ element pio_wdi.s1
{
datum baseAddress
{
- value = "192";
+ value = "1648";
type = "long";
}
}
- element pio_debug_wave.s1
+ element onchip_memory2_0.s1
{
+ datum _lockedAddress
+ {
+ value = "1";
+ type = "boolean";
+ }
datum baseAddress
{
- value = "1632";
+ value = "131072";
type = "long";
}
}
- element pio_wdi.s1
+ element pio_debug_wave.s1
{
datum baseAddress
{
- value = "1648";
+ value = "1632";
type = "long";
}
}
- element onchip_memory2_0.s1
+ element timer_0.s1
{
- datum _lockedAddress
- {
- value = "1";
- type = "boolean";
- }
datum baseAddress
{
- value = "131072";
+ value = "192";
type = "long";
}
}
@@ -663,7 +671,7 @@
<parameter name="projectName">apertif_unb1_correlator.qpf</parameter>
<parameter name="sopcBorderPoints" value="false" />
<parameter name="systemHash" value="1" />
- <parameter name="timeStamp" value="1428818040058" />
+ <parameter name="timeStamp" value="1429171641244" />
<parameter name="useTestBenchNamingPattern" value="false" />
<instanceScript></instanceScript>
<interface name="mm_clk" internal="export_mm.out_clk" type="clock" dir="start">
@@ -1348,6 +1356,41 @@
internal="reg_dp_offload_tx_hdr_dat.readdata"
type="conduit"
dir="end" />
+ <interface
+ name="reg_diag_bg_reset"
+ internal="reg_diag_bg.reset"
+ type="conduit"
+ dir="end" />
+ <interface
+ name="reg_diag_bg_clk"
+ internal="reg_diag_bg.clk"
+ type="conduit"
+ dir="end" />
+ <interface
+ name="reg_diag_bg_address"
+ internal="reg_diag_bg.address"
+ type="conduit"
+ dir="end" />
+ <interface
+ name="reg_diag_bg_write"
+ internal="reg_diag_bg.write"
+ type="conduit"
+ dir="end" />
+ <interface
+ name="reg_diag_bg_writedata"
+ internal="reg_diag_bg.writedata"
+ type="conduit"
+ dir="end" />
+ <interface
+ name="reg_diag_bg_read"
+ internal="reg_diag_bg.read"
+ type="conduit"
+ dir="end" />
+ <interface
+ name="reg_diag_bg_readdata"
+ internal="reg_diag_bg.readdata"
+ type="conduit"
+ dir="end" />
<module
kind="altera_avalon_onchip_memory2"
version="11.1"
@@ -1828,6 +1871,11 @@ q]]></parameter>
<parameter name="g_dat_w" value="32" />
<parameter name="AUTO_SYSTEM_CLOCK_RATE" value="50000000" />
</module>
+ <module kind="avs_common_mm" version="1.0" enabled="1" name="reg_diag_bg">
+ <parameter name="g_adr_w" value="3" />
+ <parameter name="g_dat_w" value="32" />
+ <parameter name="AUTO_SYSTEM_CLOCK_RATE" value="50000000" />
+ </module>
<connection
kind="avalon"
version="11.1"
@@ -2406,4 +2454,14 @@ q]]></parameter>
<parameter name="arbitrationPriority" value="1" />
<parameter name="baseAddress" value="0x0100" />
</connection>
+ <connection
+ kind="reset"
+ version="11.1"
+ start="clk_input.clk_reset"
+ end="reg_diag_bg.system_reset" />
+ <connection
+ kind="clock"
+ version="11.1"
+ start="altpll_0.c0"
+ end="reg_diag_bg.system" />
</system>
diff --git a/applications/apertif/designs/apertif_unb1_correlator/src/vhdl/apertif_unb1_correlator.vhd b/applications/apertif/designs/apertif_unb1_correlator/src/vhdl/apertif_unb1_correlator.vhd
index e3f44a0b2412e27dac435e50509461633532b68c..85fd54445bb99c164afd84d70cbbad4148c97090 100644
--- a/applications/apertif/designs/apertif_unb1_correlator/src/vhdl/apertif_unb1_correlator.vhd
+++ b/applications/apertif/designs/apertif_unb1_correlator/src/vhdl/apertif_unb1_correlator.vhd
@@ -198,7 +198,7 @@ ARCHITECTURE str OF apertif_unb1_correlator IS
-- . The sync pulse is only there for the human eye (wave window) -
-- it is not used by the correlator.
CONSTANT c_bg_blocks_per_sync : NATURAL := largest(c_integration_period, c_nof_visibilities);
- CONSTANT c_bg_ctrl : t_diag_block_gen := ('1', -- enable
+ CONSTANT c_bg_ctrl : t_diag_block_gen := (sel_a_b(g_sim, '1', '0'), -- enable: On by default in simulation; MM enable required on hardware.
'0', -- enable_sync
TO_UVEC( c_bg_block_size, c_diag_bg_samples_per_packet_w),
TO_UVEC(c_bg_blocks_per_sync, c_diag_bg_blocks_per_sync_w),
@@ -252,6 +252,10 @@ ARCHITECTURE str OF apertif_unb1_correlator IS
SIGNAL eth1g_ram_mosi : t_mem_mosi; -- ETH rx frame and tx frame memory
SIGNAL eth1g_ram_miso : t_mem_miso;
+ -- Block generator
+ SIGNAL reg_diag_bg_mosi : t_mem_mosi;
+ SIGNAL reg_diag_bg_miso : t_mem_miso;
+
-- MM DP offload RX
SIGNAL reg_dp_offload_rx_hdr_dat_mosi : t_mem_mosi;
SIGNAL reg_dp_offload_rx_hdr_dat_miso : t_mem_miso;
@@ -326,7 +330,7 @@ ARCHITECTURE str OF apertif_unb1_correlator IS
SIGNAL correlator_src_out_arr : t_dp_sosi_arr(1-1 DOWNTO 0);
-- 1GbE Visibility Offload
- SIGNAL dp_fifo_sc_snk_in : t_dp_sosi;
+ SIGNAL dp_fifo_sc_snk_in : t_dp_sosi;
SIGNAL dp_repack_data_snk_in : t_dp_sosi;
SIGNAL dp_repack_data_snk_out : t_dp_siso;
SIGNAL apertif_unb1_correlator_vis_offload_snk_in : t_dp_sosi;
@@ -366,6 +370,9 @@ BEGIN
dp_rst => dp_rst,
dp_clk => dp_clk,
+
+ reg_bg_ctrl_mosi => reg_diag_bg_mosi,
+ reg_bg_ctrl_miso => reg_diag_bg_miso,
out_sosi_arr => interleaved_arr
);
@@ -1218,7 +1225,11 @@ BEGIN
-- PPSH
reg_ppsh_mosi => reg_ppsh_mosi,
reg_ppsh_miso => reg_ppsh_miso,
-
+
+ -- Block generator
+ reg_diag_bg_mosi => reg_diag_bg_mosi,
+ reg_diag_bg_miso => reg_diag_bg_miso,
+
-- 10 GbE
reg_tr_10GbE_mosi => reg_tr_10GbE_mosi,
reg_tr_10GbE_miso => reg_tr_10GbE_miso,
diff --git a/applications/apertif/designs/apertif_unb1_correlator/src/vhdl/mmm_apertif_unb1_correlator.vhd b/applications/apertif/designs/apertif_unb1_correlator/src/vhdl/mmm_apertif_unb1_correlator.vhd
index 85218e6d3808f26eecea0b076219fe929b13fc81..46c60e3a5b820cb68c9f9c05cf9cbab8574d86d4 100644
--- a/applications/apertif/designs/apertif_unb1_correlator/src/vhdl/mmm_apertif_unb1_correlator.vhd
+++ b/applications/apertif/designs/apertif_unb1_correlator/src/vhdl/mmm_apertif_unb1_correlator.vhd
@@ -75,6 +75,10 @@ ENTITY mmm_apertif_unb1_correlator IS
-- PPSH
reg_ppsh_mosi : OUT t_mem_mosi;
reg_ppsh_miso : IN t_mem_miso;
+
+ -- Block generator
+ reg_diag_bg_mosi : OUT t_mem_mosi;
+ reg_diag_bg_miso : IN t_mem_miso;
-- DP Offload RX
reg_dp_offload_rx_hdr_dat_mosi : OUT t_mem_mosi;
@@ -197,6 +201,15 @@ ARCHITECTURE str OF mmm_apertif_unb1_correlator IS
mm_clk : out std_logic; -- clk
out_port_from_the_pio_debug_wave : out std_logic_vector(31 downto 0); -- export
out_port_from_the_pio_wdi : out std_logic; -- export
+
+ reg_diag_bg_readdata_export : in std_logic_vector(31 downto 0) := (others => 'X'); -- export
+ reg_diag_bg_read_export : out std_logic; -- export
+ reg_diag_bg_writedata_export : out std_logic_vector(31 downto 0); -- export
+ reg_diag_bg_write_export : out std_logic; -- export
+ reg_diag_bg_address_export : out std_logic_vector(2 downto 0); -- export
+ reg_diag_bg_clk_export : out std_logic; -- export
+ reg_diag_bg_reset_export : out std_logic; -- export
+
ram_diag_data_buf_readdata_export : in std_logic_vector(31 downto 0) := (others => 'X'); -- export
ram_diag_data_buf_read_export : out std_logic; -- export
ram_diag_data_buf_writedata_export : out std_logic_vector(31 downto 0); -- export
@@ -505,7 +518,15 @@ BEGIN
reg_wdi_readdata_export => reg_wdi_miso.rddata(c_word_w-1 DOWNTO 0),
reg_wdi_write_export => reg_wdi_mosi.wr,
reg_wdi_writedata_export => reg_wdi_mosi.wrdata(c_word_w-1 DOWNTO 0),
-
+
+ reg_diag_bg_readdata_export => reg_diag_bg_miso.rddata(c_word_w-1 DOWNTO 0),
+ reg_diag_bg_read_export => reg_diag_bg_mosi.rd,
+ reg_diag_bg_writedata_export => reg_diag_bg_mosi.wrdata(c_word_w-1 DOWNTO 0),
+ reg_diag_bg_write_export => reg_diag_bg_mosi.wr,
+ reg_diag_bg_address_export => reg_diag_bg_mosi.address(c_unb1_board_peripherals_mm_reg_default.reg_diag_bg_adr_w-1 DOWNTO 0),
+ reg_diag_bg_clk_export => OPEN,
+ reg_diag_bg_reset_export => OPEN,
+
ram_diag_data_buf_readdata_export => ram_diag_data_buf_miso.rddata(c_word_w-1 DOWNTO 0),
ram_diag_data_buf_read_export => ram_diag_data_buf_mosi.rd,
ram_diag_data_buf_writedata_export => ram_diag_data_buf_mosi.wrdata(c_word_w-1 DOWNTO 0),