diff --git a/libraries/dig_receiver/polyfilt/hdllib.cfg b/libraries/dig_receiver/polyfilt/hdllib.cfg
index b18135f49886c9b7db03886d3ecf79ed45ea3c6d..e94c5091b78bbba1406702c4afee1af2edefa8e9 100644
--- a/libraries/dig_receiver/polyfilt/hdllib.cfg
+++ b/libraries/dig_receiver/polyfilt/hdllib.cfg
@@ -9,20 +9,19 @@ build_dir_sim = $HDL_BUILD_DIR
 build_dir_synth = $HDL_BUILD_DIR
 
 synth_files =
-  $SVN/UniBoard_FP7/Digital_Receiver/trunk/Firmware/modules_HDL/polyfilt/src/vhdl/channelizer_pfb_16.vhd
-  $SVN/UniBoard_FP7/Digital_Receiver/trunk/Firmware/modules_HDL/polyfilt/src/vhdl/channelizer_pfb_4.vhd
-  $SVN/UniBoard_FP7/Digital_Receiver/trunk/Firmware/modules_HDL/polyfilt/src/vhdl/channelizer_pfb_8.vhd
-  $SVN/UniBoard_FP7/Digital_Receiver/trunk/Firmware/modules_HDL/polyfilt/src/vhdl/channelizer_pfb.vhd
-  $SVN/UniBoard_FP7/Digital_Receiver/trunk/Firmware/modules_HDL/polyfilt/src/vhdl/filt_27_1024.vhd
-  $SVN/UniBoard_FP7/Digital_Receiver/trunk/Firmware/modules_HDL/polyfilt/src/vhdl/filt_28_1024.vhd
-  $SVN/UniBoard_FP7/Digital_Receiver/trunk/Firmware/modules_HDL/polyfilt/src/vhdl/frequency_rotate.vhd
-  $SVN/UniBoard_FP7/Digital_Receiver/trunk/Firmware/modules_HDL/polyfilt/src/vhdl/poly_27_1024.vhd
-  $SVN/UniBoard_FP7/Digital_Receiver/trunk/Firmware/modules_HDL/polyfilt/src/vhdl/poly_delay.vhd
-  $SVN/UniBoard_FP7/Digital_Receiver/trunk/Firmware/modules_HDL/polyfilt/src/vhdl/poly_filter_main.vhd
-  $SVN/UniBoard_FP7/Digital_Receiver/trunk/Firmware/modules_HDL/polyfilt/src/vhdl/poly_filt_tb.vhd
-  $SVN/UniBoard_FP7/Digital_Receiver/trunk/Firmware/modules_HDL/polyfilt/src/vhdl/poly_filt.vhd
-  $SVN/UniBoard_FP7/Digital_Receiver/trunk/Firmware/modules_HDL/polyfilt/src/vhdl/poly_rom.vhd
-  $SVN/UniBoard_FP7/Digital_Receiver/trunk/Firmware/modules_HDL/polyfilt/src/vhdl/rate_change.vhd
+  $SVN/Digital_Receiver/trunk/Firmware/modules_HDL/polyfilt/src/vhdl/filt_27_1024.vhd
+  $SVN/Digital_Receiver/trunk/Firmware/modules_HDL/polyfilt/src/vhdl/filt_28_1024.vhd
+  $SVN/Digital_Receiver/trunk/Firmware/modules_HDL/polyfilt/src/vhdl/poly_rom.vhd
+  $SVN/Digital_Receiver/trunk/Firmware/modules_HDL/polyfilt/src/vhdl/poly_delay.vhd
+  $SVN/Digital_Receiver/trunk/Firmware/modules_HDL/polyfilt/src/vhdl/rate_change.vhd
+  $SVN/Digital_Receiver/trunk/Firmware/modules_HDL/polyfilt/src/vhdl/poly_filt.vhd
+  $SVN/Digital_Receiver/trunk/Firmware/modules_HDL/polyfilt/src/vhdl/frequency_rotate.vhd
+  $SVN/Digital_Receiver/trunk/Firmware/modules_HDL/polyfilt/src/vhdl/poly_filter_main.vhd
+  $SVN/Digital_Receiver/trunk/Firmware/modules_HDL/polyfilt/src/vhdl/channelizer_pfb_16.vhd
+  $SVN/Digital_Receiver/trunk/Firmware/modules_HDL/polyfilt/src/vhdl/channelizer_pfb_4.vhd
+  $SVN/Digital_Receiver/trunk/Firmware/modules_HDL/polyfilt/src/vhdl/channelizer_pfb_8.vhd
+  $SVN/Digital_Receiver/trunk/Firmware/modules_HDL/polyfilt/src/vhdl/channelizer_pfb.vhd
+  $SVN/Digital_Receiver/trunk/Firmware/modules_HDL/polyfilt/src/vhdl/poly_filt_tb.vhd
 
 test_bench_files =