diff --git a/boards/uniboard2/designs/unb2_test/src/vhdl/unb2_test.vhd b/boards/uniboard2/designs/unb2_test/src/vhdl/unb2_test.vhd
index c8b290ca128ba8fa4e963e22425e3b0a1791feb8..ee4a1629f5d33b9f1d69a8710da2224d363243a8 100644
--- a/boards/uniboard2/designs/unb2_test/src/vhdl/unb2_test.vhd
+++ b/boards/uniboard2/designs/unb2_test/src/vhdl/unb2_test.vhd
@@ -47,7 +47,7 @@ ENTITY unb2_test IS
     g_stamp_time       : NATURAL := 0;  -- Time (HHMMSS)   -- set by QSF
     g_stamp_svn        : NATURAL := 0;  -- SVN revision    -- set by QSF
     g_factory_image    : BOOLEAN := FALSE;
-    g_nof_streams_qsfp : NATURAL := 1;  --FIXME
+    g_nof_streams_qsfp : NATURAL := 4;--c_unb2_board_tr_qsfp.nof_bus * c_unb2_board_tr_qsfp.bus_w;
     g_nof_streams_ring : NATURAL := 0;  --FIXME
     g_nof_streams_back : NATURAL := 0   --FIXME
   );
@@ -95,8 +95,8 @@ ENTITY unb2_test IS
     PMBUS_SD     : INOUT STD_LOGIC;
     PMBUS_ALERT  : IN    STD_LOGIC;
     -- front transceivers
-    QSFP_0_RX    : IN    STD_LOGIC_VECTOR(0 downto 0); --c_unb2_board_tr_qsfp.bus_w-1 downto 0);
-    QSFP_0_TX    : OUT   STD_LOGIC_VECTOR(0 downto 0); --c_unb2_board_tr_qsfp.bus_w-1 downto 0);
+    QSFP_0_RX    : IN    STD_LOGIC_VECTOR(c_unb2_board_tr_qsfp.bus_w-1 downto 0);
+    QSFP_0_TX    : OUT   STD_LOGIC_VECTOR(c_unb2_board_tr_qsfp.bus_w-1 downto 0);
 --    QSFP_1_RX    : IN    STD_LOGIC_VECTOR(c_unb2_board_tr_qsfp.bus_w-1 downto 0);
 --    QSFP_1_TX    : OUT   STD_LOGIC_VECTOR(c_unb2_board_tr_qsfp.bus_w-1 downto 0);
 --    QSFP_2_RX    : IN    STD_LOGIC_VECTOR(c_unb2_board_tr_qsfp.bus_w-1 downto 0);
@@ -129,6 +129,7 @@ ARCHITECTURE str OF unb2_test IS
   CONSTANT c_use_1GbE                   : BOOLEAN := FALSE; --g_design_name = "unb2_test_1GbE";
   CONSTANT c_use_10GbE                  : BOOLEAN := TRUE;  --g_design_name = "unb2_test_10GbE";
   CONSTANT g_nof_streams                : NATURAL := (g_nof_streams_qsfp + g_nof_streams_ring + g_nof_streams_back);
+  CONSTANT g_nof_qsfp_bus               : NATURAL := ceil_div(g_nof_streams_qsfp,c_unb2_board_tr_qsfp.bus_w);
   CONSTANT c_data_w                     : NATURAL := sel_a_b(c_use_lpbk,  c_lpbk_data_w, -- Select correct c_data_w when one interface is used
                                                      sel_a_b(c_use_1GbE,  c_eth_data_w,
                                                      sel_a_b(c_use_10GbE, c_xgmii_data_w, 0)));
@@ -273,8 +274,8 @@ ARCHITECTURE str OF unb2_test IS
   SIGNAL i_serial_10G_tx_back_arr        : STD_LOGIC_VECTOR(g_nof_streams_back-1 DOWNTO 0);
   SIGNAL i_serial_10G_rx_back_arr        : STD_LOGIC_VECTOR(g_nof_streams_back-1 DOWNTO 0);
 
-  SIGNAL serial_10G_tx_qsfp_arr          : STD_LOGIC_VECTOR(g_nof_streams_qsfp * c_unb2_board_tr_qsfp.bus_w-1 DOWNTO 0) := (OTHERS=>'0');
-  SIGNAL serial_10G_rx_qsfp_arr          : STD_LOGIC_VECTOR(g_nof_streams_qsfp * c_unb2_board_tr_qsfp.bus_w-1 DOWNTO 0);
+  SIGNAL serial_10G_tx_qsfp_arr          : STD_LOGIC_VECTOR(g_nof_streams_qsfp-1 DOWNTO 0) := (OTHERS=>'0');
+  SIGNAL serial_10G_rx_qsfp_arr          : STD_LOGIC_VECTOR(g_nof_streams_qsfp-1 DOWNTO 0);
   SIGNAL serial_10G_tx_ring_arr          : STD_LOGIC_VECTOR(g_nof_streams_ring-1 DOWNTO 0) := (OTHERS=>'0');
   SIGNAL serial_10G_rx_ring_arr          : STD_LOGIC_VECTOR(g_nof_streams_ring-1 DOWNTO 0);
   SIGNAL serial_10G_tx_back_arr          : STD_LOGIC_VECTOR(g_nof_streams_back-1 DOWNTO 0) := (OTHERS=>'0');
@@ -329,9 +330,9 @@ ARCHITECTURE str OF unb2_test IS
   SIGNAL diag_data_buf_snk_in_arr       : t_dp_sosi_arr(g_nof_streams-1 DOWNTO 0);
   SIGNAL diag_data_buf_snk_out_arr      : t_dp_siso_arr(g_nof_streams-1 DOWNTO 0);
 
-  SIGNAL tmp_dp_offload_tx_src_out_arr      : t_dp_sosi_arr(4*g_nof_streams-1 DOWNTO 0);
-  SIGNAL tmp_dp_offload_tx_src_in_arr       : t_dp_siso_arr(4*g_nof_streams-1 DOWNTO 0);
-  SIGNAL tmp_dp_offload_rx_snk_in_arr       : t_dp_sosi_arr(4*g_nof_streams-1 DOWNTO 0);
+  --SIGNAL tmp_dp_offload_tx_src_out_arr  : t_dp_sosi_arr(4*g_nof_streams-1 DOWNTO 0);
+  --SIGNAL tmp_dp_offload_tx_src_in_arr   : t_dp_siso_arr(4*g_nof_streams-1 DOWNTO 0);
+  --SIGNAL tmp_dp_offload_rx_snk_in_arr   : t_dp_sosi_arr(4*g_nof_streams-1 DOWNTO 0);
 
   SIGNAL user_green_led_arr             : STD_LOGIC_VECTOR(c_unb2_board_tr_qsfp.nof_bus-1 DOWNTO 0);
   SIGNAL user_red_led_arr               : STD_LOGIC_VECTOR(c_unb2_board_tr_qsfp.nof_bus-1 DOWNTO 0);
@@ -843,32 +844,41 @@ BEGIN
 
 
 
-    --gen_wires: FOR i IN 0 TO g_nof_streams_qsfp-1 GENERATE
-    --    serial_10G_tx_arr(i) <= i_serial_10G_tx_qsfp_ring_arr(i);
-    --  i_serial_10G_rx_qsfp_ring_arr(i) <=   serial_10G_rx_arr(i);
-    --END GENERATE;
+    gen_wires: FOR i IN 0 TO g_nof_streams_qsfp-1 GENERATE
+        serial_10G_tx_qsfp_arr(i)      <= i_serial_10G_tx_qsfp_ring_arr(i);
+      i_serial_10G_rx_qsfp_ring_arr(i) <=   serial_10G_rx_qsfp_arr(i);
+    END GENERATE;
 
-    serial_10G_tx_qsfp_arr(0) <= i_serial_10G_tx_qsfp_ring_arr(0);
-    i_serial_10G_rx_qsfp_ring_arr(0) <= serial_10G_rx_qsfp_arr(0);
+    --serial_10G_tx_qsfp_arr(0) <= i_serial_10G_tx_qsfp_ring_arr(0);
+    --i_serial_10G_rx_qsfp_ring_arr(0) <= serial_10G_rx_qsfp_arr(0);
 
-    --serial_10G_tx_qsfp_arr(c_unb2_board_tr_qsfp_hw_nof_lines-1 DOWNTO g_nof_streams) <= (OTHERS=>'0');
 
     u_front_io : ENTITY unb2_board_lib.unb2_board_front_io
     GENERIC MAP (
-      g_nof_qsfp_bus => ceil_div(g_nof_streams_qsfp,c_unb2_board_tr_qsfp.bus_w)
+      g_nof_qsfp_bus => g_nof_qsfp_bus
     )
     PORT MAP (
 
       serial_tx_arr => serial_10G_tx_qsfp_arr,
       serial_rx_arr => serial_10G_rx_qsfp_arr,
 
-      green_led_arr => user_green_led_arr(g_nof_streams_qsfp-1 DOWNTO 0),
-      red_led_arr   => user_red_led_arr(g_nof_streams_qsfp-1 DOWNTO 0),
+      green_led_arr => user_green_led_arr(g_nof_qsfp_bus-1 DOWNTO 0),
+      red_led_arr   => user_red_led_arr(g_nof_qsfp_bus-1 DOWNTO 0),
 
       -- Serial I/O
       -- front transceivers
-      QSFP_RX(0)(0)  => QSFP_0_RX(0),
-      QSFP_TX(0)(0)  => QSFP_0_TX(0),
+      QSFP_RX(0) => QSFP_0_RX,
+      QSFP_TX(0) => QSFP_0_TX,
+--      QSFP_RX(1) => QSFP_1_RX,
+--      QSFP_TX(1) => QSFP_1_TX,
+--      QSFP_RX(2) => QSFP_2_RX,
+--      QSFP_TX(2) => QSFP_2_TX,
+--      QSFP_RX(3) => QSFP_3_RX,
+--      QSFP_TX(3) => QSFP_3_TX,
+--      QSFP_RX(4) => QSFP_4_RX,
+--      QSFP_TX(4) => QSFP_4_TX,
+--      QSFP_RX(5) => QSFP_5_RX,
+--      QSFP_TX(5) => QSFP_5_TX,
 
       QSFP_SDA   => QSFP_SDA,
       QSFP_SCL   => QSFP_SCL,
@@ -878,15 +888,15 @@ BEGIN
     );
 
 
-    tmp_dp_offload_tx_src_out_arr(0) <= dp_offload_tx_src_out_arr(0);
-    tmp_dp_offload_tx_src_in_arr(0)  <= dp_offload_tx_src_in_arr(0);
-    tmp_dp_offload_rx_snk_in_arr(0)  <= dp_offload_rx_snk_in_arr(0);
+    --tmp_dp_offload_tx_src_out_arr(0) <= dp_offload_tx_src_out_arr(0);
+    --tmp_dp_offload_tx_src_in_arr(0)  <= dp_offload_tx_src_in_arr(0);
+    --tmp_dp_offload_rx_snk_in_arr(0)  <= dp_offload_rx_snk_in_arr(0);
 
     u_front_led : ENTITY work.unb2_board_qsfp_leds
     GENERIC MAP (
       g_sim             => g_sim,
       g_factory_image   => g_factory_image,
-      g_nof_qsfp        => ceil_div(g_nof_streams_qsfp,c_unb2_board_tr_qsfp.bus_w),
+      g_nof_qsfp        => g_nof_qsfp_bus,
       g_pulse_us        => 1000 / (10**9 / c_unb2_board_ext_clk_freq_200M) -- nof clk cycles to get us period
     )
     PORT MAP (
@@ -897,12 +907,12 @@ BEGIN
       --pulse_ms          => pulse_ms,
       --pulse_s           => pulse_s,
       -- lane status
-      tx_siso_arr       => tmp_dp_offload_tx_src_in_arr,--(g_nof_streams_qsfp-1 DOWNTO 0),
-      tx_sosi_arr       => tmp_dp_offload_tx_src_out_arr,--(g_nof_streams_qsfp-1 DOWNTO 0),
-      rx_sosi_arr       => tmp_dp_offload_rx_snk_in_arr,--(g_nof_streams_qsfp-1 DOWNTO 0),
+      tx_siso_arr       => dp_offload_tx_src_in_arr(g_nof_streams_qsfp-1 DOWNTO 0),
+      tx_sosi_arr       => dp_offload_tx_src_out_arr(g_nof_streams_qsfp-1 DOWNTO 0),
+      rx_sosi_arr       => dp_offload_rx_snk_in_arr(g_nof_streams_qsfp-1 DOWNTO 0),
       -- leds
-      green_led_arr     => user_green_led_arr(g_nof_streams_qsfp-1 DOWNTO 0),
-      red_led_arr       => user_red_led_arr(g_nof_streams_qsfp-1 DOWNTO 0)
+      green_led_arr     => user_green_led_arr(g_nof_qsfp_bus-1 DOWNTO 0),
+      red_led_arr       => user_red_led_arr(g_nof_qsfp_bus-1 DOWNTO 0)
     );