From d2e1f4e66fe328649e45e6f626e2c10d1352a9a2 Mon Sep 17 00:00:00 2001 From: Eric Kooistra <kooistra@astron.nl> Date: Tue, 31 May 2022 18:08:51 +0200 Subject: [PATCH] Added missing JESD204B MM register fields. --- .../technology/jesd204b/tech_jesd204b.peripheral.yaml | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/libraries/technology/jesd204b/tech_jesd204b.peripheral.yaml b/libraries/technology/jesd204b/tech_jesd204b.peripheral.yaml index a26e084526..39125f4244 100644 --- a/libraries/technology/jesd204b/tech_jesd204b.peripheral.yaml +++ b/libraries/technology/jesd204b/tech_jesd204b.peripheral.yaml @@ -55,9 +55,14 @@ peripherals: - - {field_name: rx_syncn_sysref_ctrl, mm_width: 25, bit_offset: 0, access_mode: RW, address_offset: 0x54} - - {field_name: rx_csr_lmfc_offset, mm_width: 8, bit_offset: 12, access_mode: RW, address_offset: 0x54} - - {field_name: rx_csr_rbd_offset, mm_width: 8, bit_offset: 3, access_mode: RW, address_offset: 0x54} - - - {field_name: rx_csr_sysref_always_on, mm_width: 1, bit_offset: 1, access_mode: RW, address_offset: 0x54} + - - {field_name: rx_csr_sysref_singled, mm_width: 1, bit_offset: 2, access_mode: RW, address_offset: 0x54} + - - {field_name: rx_csr_sysref_alwayson, mm_width: 1, bit_offset: 1, access_mode: RW, address_offset: 0x54} + - - {field_name: rx_csr_link_reinit, mm_width: 1, bit_offset: 0, access_mode: RW, address_offset: 0x54} + - - {field_name: ctrl_reserve, mm_width: 32, bit_offset: 0, access_mode: RO, address_offset: 0x58} - - {field_name: rx_err0, mm_width: 9, bit_offset: 0, access_mode: RW, address_offset: 0x60} - - {field_name: rx_err1, mm_width: 10, bit_offset: 0, access_mode: RW, address_offset: 0x64} + - - {field_name: rx_err_enable, mm_width: 32, bit_offset: 0, access_mode: RW, address_offset: 0x74} + - - {field_name: rx_err_link_reinit, mm_width: 32, bit_offset: 0, access_mode: RW, address_offset: 0x78} - - {field_name: csr_rbd_count, mm_width: 8, bit_offset: 3, access_mode: RO, address_offset: 0x80} - - {field_name: csr_dev_syncn, mm_width: 1, bit_offset: 0, access_mode: RO, address_offset: 0x80} - - {field_name: rx_status1, mm_width: 24, bit_offset: 0, access_mode: RW, address_offset: 0x84} -- GitLab