diff --git a/applications/lofar2/designs/lofar2_unb2b_sdp_station/quartus/lofar2_unb2b_sdp_station_jesd_pins.tcl b/applications/lofar2/designs/lofar2_unb2b_sdp_station/quartus/lofar2_unb2b_sdp_station_jesd_pins.tcl new file mode 100644 index 0000000000000000000000000000000000000000..cc6ee17b2bfac613b91c40f8f5a4ba3641fc1665 --- /dev/null +++ b/applications/lofar2/designs/lofar2_unb2b_sdp_station/quartus/lofar2_unb2b_sdp_station_jesd_pins.tcl @@ -0,0 +1,444 @@ +############################################################################### +# +# Copyright (C) 2014 +# ASTRON (Netherlands Institute for Radio Astronomy) <http://www.astron.nl/> +# P.O.Box 2, 7990 AA Dwingeloo, The Netherlands +# +# This program is free software: you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation, either version 3 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program. If not, see <http://www.gnu.org/licenses/>. +# +############################################################################### +#===================== +# JESD pins +# ==================== +# Pins needed for the 12 channel JESD204B interface to the ADCs +set_instance_assignment -name IO_STANDARD LVDS -to JESD204B_SYSREF +set_instance_assignment -name IO_STANDARD LVDS -to "JESD204B_SYSREF(n)" +set_instance_assignment -name IO_STANDARD "1.8 V" -to JESD204B_SYNC_N[0] +set_instance_assignment -name IO_STANDARD "1.8 V" -to JESD204B_SYNC_N[1] +set_instance_assignment -name IO_STANDARD "1.8 V" -to JESD204B_SYNC_N[2] +set_instance_assignment -name IO_STANDARD "1.8 V" -to JESD204B_SYNC_N[3] +set_instance_assignment -name IO_STANDARD "1.8 V" -to JESD204B_SYNC_N[4] +set_instance_assignment -name IO_STANDARD "1.8 V" -to JESD204B_SYNC_N[5] +set_instance_assignment -name IO_STANDARD "1.8 V" -to JESD204B_SYNC_N[6] +set_instance_assignment -name IO_STANDARD "1.8 V" -to JESD204B_SYNC_N[7] +set_instance_assignment -name IO_STANDARD "1.8 V" -to JESD204B_SYNC_N[8] +set_instance_assignment -name IO_STANDARD "1.8 V" -to JESD204B_SYNC_N[9] +set_instance_assignment -name IO_STANDARD "1.8 V" -to JESD204B_SYNC_N[10] +set_instance_assignment -name IO_STANDARD "1.8 V" -to JESD204B_SYNC_N[11] + +#set_location_assignment PIN_B9 -to BCK_RX[0] +set_location_assignment PIN_D9 -to BCK_RX[1] +set_location_assignment PIN_C11 -to BCK_RX[2] +set_location_assignment PIN_F9 -to BCK_RX[3] +set_location_assignment PIN_C7 -to BCK_RX[4] +set_location_assignment PIN_E11 -to BCK_RX[5] +set_location_assignment PIN_E7 -to BCK_RX[6] +set_location_assignment PIN_D5 -to BCK_RX[7] +set_location_assignment PIN_G7 -to BCK_RX[8] +set_location_assignment PIN_F5 -to BCK_RX[9] +set_location_assignment PIN_J7 -to BCK_RX[10] +set_location_assignment PIN_H5 -to BCK_RX[11] +set_location_assignment PIN_L7 -to BCK_RX[12] +set_location_assignment PIN_K5 -to BCK_RX[13] +set_location_assignment PIN_N7 -to BCK_RX[14] +set_location_assignment PIN_M5 -to BCK_RX[15] +set_location_assignment PIN_R7 -to BCK_RX[16] +set_location_assignment PIN_P5 -to BCK_RX[17] +set_location_assignment PIN_U7 -to BCK_RX[18] +set_location_assignment PIN_T5 -to BCK_RX[19] +set_location_assignment PIN_W7 -to BCK_RX[20] +set_location_assignment PIN_V5 -to BCK_RX[21] +set_location_assignment PIN_AA7 -to BCK_RX[22] +set_location_assignment PIN_Y5 -to BCK_RX[23] +set_location_assignment PIN_AC7 -to BCK_RX[24] +set_location_assignment PIN_AB5 -to BCK_RX[25] +set_location_assignment PIN_AE7 -to BCK_RX[26] +set_location_assignment PIN_AD5 -to BCK_RX[27] +set_location_assignment PIN_AG7 -to BCK_RX[28] +set_location_assignment PIN_AF5 -to BCK_RX[29] +set_location_assignment PIN_AJ7 -to BCK_RX[30] +set_location_assignment PIN_AH5 -to BCK_RX[31] +set_location_assignment PIN_AL7 -to BCK_RX[32] +set_location_assignment PIN_AK5 -to BCK_RX[33] +set_location_assignment PIN_AN7 -to BCK_RX[34] +set_location_assignment PIN_AM5 -to BCK_RX[35] +set_location_assignment PIN_AR7 -to BCK_RX[36] +set_location_assignment PIN_AP5 -to BCK_RX[37] +set_location_assignment PIN_AU7 -to BCK_RX[38] +set_location_assignment PIN_AT5 -to BCK_RX[39] +set_location_assignment PIN_AW7 -to BCK_RX[40] +set_location_assignment PIN_AV5 -to BCK_RX[41] +set_location_assignment PIN_BA7 -to BCK_RX[42] +set_location_assignment PIN_AY5 -to BCK_RX[43] +set_location_assignment PIN_BC7 -to BCK_RX[44] +set_location_assignment PIN_BB5 -to BCK_RX[45] +set_location_assignment PIN_AY9 -to BCK_RX[46] +set_location_assignment PIN_BB9 -to BCK_RX[47] + + +#set_instance_assignment -name IO_STANDARD "HSSI DIFFERENTIAL I/O" -to BCK_TX[0] +#set_instance_assignment -name XCVR_A10_TX_VOD_OUTPUT_SWING_CTRL 30 -to BCK_TX[0] +#set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to BCK_TX[0] +#set_instance_assignment -name XCVR_A10_TX_COMPENSATION_EN ENABLE -to BCK_TX[0] +#set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SWITCHING_CTRL_1ST_POST_TAP 0 -to BCK_TX[0] +#set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SIGN_1ST_POST_TAP FIR_POST_1T_POS -to BCK_TX[0] +# +#set_instance_assignment -name IO_STANDARD "HSSI DIFFERENTIAL I/O" -to BCK_TX[1] +#set_instance_assignment -name XCVR_A10_TX_VOD_OUTPUT_SWING_CTRL 30 -to BCK_TX[1] +#set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to BCK_TX[1] +#set_instance_assignment -name XCVR_A10_TX_COMPENSATION_EN ENABLE -to BCK_TX[1] +#set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SWITCHING_CTRL_1ST_POST_TAP 0 -to BCK_TX[1] +#set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SIGN_1ST_POST_TAP FIR_POST_1T_POS -to BCK_TX[1] +# +#set_instance_assignment -name IO_STANDARD "HSSI DIFFERENTIAL I/O" -to BCK_TX[2] +#set_instance_assignment -name XCVR_A10_TX_VOD_OUTPUT_SWING_CTRL 30 -to BCK_TX[2] +#set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to BCK_TX[2] +#set_instance_assignment -name XCVR_A10_TX_COMPENSATION_EN ENABLE -to BCK_TX[2] +#set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SWITCHING_CTRL_1ST_POST_TAP 0 -to BCK_TX[2] +#set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SIGN_1ST_POST_TAP FIR_POST_1T_POS -to BCK_TX[2] +# +#set_instance_assignment -name IO_STANDARD "HSSI DIFFERENTIAL I/O" -to BCK_TX[3] +#set_instance_assignment -name XCVR_A10_TX_VOD_OUTPUT_SWING_CTRL 30 -to BCK_TX[3] +#set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to BCK_TX[3] +#set_instance_assignment -name XCVR_A10_TX_COMPENSATION_EN ENABLE -to BCK_TX[3] +#set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SWITCHING_CTRL_1ST_POST_TAP 0 -to BCK_TX[3] +#set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SIGN_1ST_POST_TAP FIR_POST_1T_POS -to BCK_TX[3] +# +#set_instance_assignment -name IO_STANDARD "HSSI DIFFERENTIAL I/O" -to BCK_TX[4] +#set_instance_assignment -name XCVR_A10_TX_VOD_OUTPUT_SWING_CTRL 30 -to BCK_TX[4] +#set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to BCK_TX[4] +#set_instance_assignment -name XCVR_A10_TX_COMPENSATION_EN ENABLE -to BCK_TX[4] +#set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SWITCHING_CTRL_1ST_POST_TAP 0 -to BCK_TX[4] +#set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SIGN_1ST_POST_TAP FIR_POST_1T_POS -to BCK_TX[4] +# +#set_instance_assignment -name IO_STANDARD "HSSI DIFFERENTIAL I/O" -to BCK_TX[5] +#set_instance_assignment -name XCVR_A10_TX_VOD_OUTPUT_SWING_CTRL 30 -to BCK_TX[5] +#set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to BCK_TX[5] +#set_instance_assignment -name XCVR_A10_TX_COMPENSATION_EN ENABLE -to BCK_TX[5] +#set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SWITCHING_CTRL_1ST_POST_TAP 0 -to BCK_TX[5] +#set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SIGN_1ST_POST_TAP FIR_POST_1T_POS -to BCK_TX[5] +# +#set_instance_assignment -name IO_STANDARD "HSSI DIFFERENTIAL I/O" -to BCK_TX[6] +#set_instance_assignment -name XCVR_A10_TX_VOD_OUTPUT_SWING_CTRL 30 -to BCK_TX[6] +#set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to BCK_TX[6] +#set_instance_assignment -name XCVR_A10_TX_COMPENSATION_EN ENABLE -to BCK_TX[6] +#set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SWITCHING_CTRL_1ST_POST_TAP 0 -to BCK_TX[6] +#set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SIGN_1ST_POST_TAP FIR_POST_1T_POS -to BCK_TX[6] +# +#set_instance_assignment -name IO_STANDARD "HSSI DIFFERENTIAL I/O" -to BCK_TX[7] +#set_instance_assignment -name XCVR_A10_TX_VOD_OUTPUT_SWING_CTRL 30 -to BCK_TX[7] +#set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to BCK_TX[7] +#set_instance_assignment -name XCVR_A10_TX_COMPENSATION_EN ENABLE -to BCK_TX[7] +#set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SWITCHING_CTRL_1ST_POST_TAP 0 -to BCK_TX[7] +#set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SIGN_1ST_POST_TAP FIR_POST_1T_POS -to BCK_TX[7] +# +#set_instance_assignment -name IO_STANDARD "HSSI DIFFERENTIAL I/O" -to BCK_TX[8] +#set_instance_assignment -name XCVR_A10_TX_VOD_OUTPUT_SWING_CTRL 30 -to BCK_TX[8] +#set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to BCK_TX[8] +#set_instance_assignment -name XCVR_A10_TX_COMPENSATION_EN ENABLE -to BCK_TX[8] +#set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SWITCHING_CTRL_1ST_POST_TAP 0 -to BCK_TX[8] +#set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SIGN_1ST_POST_TAP FIR_POST_1T_POS -to BCK_TX[8] +# +#set_instance_assignment -name IO_STANDARD "HSSI DIFFERENTIAL I/O" -to BCK_TX[9] +#set_instance_assignment -name XCVR_A10_TX_VOD_OUTPUT_SWING_CTRL 30 -to BCK_TX[9] +#set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to BCK_TX[9] +#set_instance_assignment -name XCVR_A10_TX_COMPENSATION_EN ENABLE -to BCK_TX[9] +#set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SWITCHING_CTRL_1ST_POST_TAP 0 -to BCK_TX[9] +#set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SIGN_1ST_POST_TAP FIR_POST_1T_POS -to BCK_TX[9] +# +#set_instance_assignment -name IO_STANDARD "HSSI DIFFERENTIAL I/O" -to BCK_TX[10] +#set_instance_assignment -name XCVR_A10_TX_VOD_OUTPUT_SWING_CTRL 30 -to BCK_TX[10] +#set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to BCK_TX[10] +#set_instance_assignment -name XCVR_A10_TX_COMPENSATION_EN ENABLE -to BCK_TX[10] +#set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SWITCHING_CTRL_1ST_POST_TAP 0 -to BCK_TX[10] +#set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SIGN_1ST_POST_TAP FIR_POST_1T_POS -to BCK_TX[10] +# +#set_instance_assignment -name IO_STANDARD "HSSI DIFFERENTIAL I/O" -to BCK_TX[11] +#set_instance_assignment -name XCVR_A10_TX_VOD_OUTPUT_SWING_CTRL 30 -to BCK_TX[11] +#set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to BCK_TX[11] +#set_instance_assignment -name XCVR_A10_TX_COMPENSATION_EN ENABLE -to BCK_TX[11] +#set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SWITCHING_CTRL_1ST_POST_TAP 0 -to BCK_TX[11] +#set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SIGN_1ST_POST_TAP FIR_POST_1T_POS -to BCK_TX[11] + +set_instance_assignment -name IO_STANDARD "HSSI DIFFERENTIAL I/O" -to BCK_TX[12] +set_instance_assignment -name XCVR_A10_TX_VOD_OUTPUT_SWING_CTRL 30 -to BCK_TX[12] +set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to BCK_TX[12] +set_instance_assignment -name XCVR_A10_TX_COMPENSATION_EN ENABLE -to BCK_TX[12] +set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SWITCHING_CTRL_1ST_POST_TAP 0 -to BCK_TX[12] +set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SIGN_1ST_POST_TAP FIR_POST_1T_POS -to BCK_TX[12] + +set_instance_assignment -name IO_STANDARD "HSSI DIFFERENTIAL I/O" -to BCK_TX[13] +set_instance_assignment -name XCVR_A10_TX_VOD_OUTPUT_SWING_CTRL 30 -to BCK_TX[13] +set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to BCK_TX[13] +set_instance_assignment -name XCVR_A10_TX_COMPENSATION_EN ENABLE -to BCK_TX[13] +set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SWITCHING_CTRL_1ST_POST_TAP 0 -to BCK_TX[13] +set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SIGN_1ST_POST_TAP FIR_POST_1T_POS -to BCK_TX[13] + +set_instance_assignment -name IO_STANDARD "HSSI DIFFERENTIAL I/O" -to BCK_TX[14] +set_instance_assignment -name XCVR_A10_TX_VOD_OUTPUT_SWING_CTRL 30 -to BCK_TX[14] +set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to BCK_TX[14] +set_instance_assignment -name XCVR_A10_TX_COMPENSATION_EN ENABLE -to BCK_TX[14] +set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SWITCHING_CTRL_1ST_POST_TAP 0 -to BCK_TX[14] +set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SIGN_1ST_POST_TAP FIR_POST_1T_POS -to BCK_TX[14] + +set_instance_assignment -name IO_STANDARD "HSSI DIFFERENTIAL I/O" -to BCK_TX[15] +set_instance_assignment -name XCVR_A10_TX_VOD_OUTPUT_SWING_CTRL 30 -to BCK_TX[15] +set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to BCK_TX[15] +set_instance_assignment -name XCVR_A10_TX_COMPENSATION_EN ENABLE -to BCK_TX[15] +set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SWITCHING_CTRL_1ST_POST_TAP 0 -to BCK_TX[15] +set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SIGN_1ST_POST_TAP FIR_POST_1T_POS -to BCK_TX[15] + +set_instance_assignment -name IO_STANDARD "HSSI DIFFERENTIAL I/O" -to BCK_TX[16] +set_instance_assignment -name XCVR_A10_TX_VOD_OUTPUT_SWING_CTRL 30 -to BCK_TX[16] +set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to BCK_TX[16] +set_instance_assignment -name XCVR_A10_TX_COMPENSATION_EN ENABLE -to BCK_TX[16] +set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SWITCHING_CTRL_1ST_POST_TAP 0 -to BCK_TX[16] +set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SIGN_1ST_POST_TAP FIR_POST_1T_POS -to BCK_TX[16] + +set_instance_assignment -name IO_STANDARD "HSSI DIFFERENTIAL I/O" -to BCK_TX[17] +set_instance_assignment -name XCVR_A10_TX_VOD_OUTPUT_SWING_CTRL 30 -to BCK_TX[17] +set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to BCK_TX[17] +set_instance_assignment -name XCVR_A10_TX_COMPENSATION_EN ENABLE -to BCK_TX[17] +set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SWITCHING_CTRL_1ST_POST_TAP 0 -to BCK_TX[17] +set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SIGN_1ST_POST_TAP FIR_POST_1T_POS -to BCK_TX[17] + +set_instance_assignment -name IO_STANDARD "HSSI DIFFERENTIAL I/O" -to BCK_TX[18] +set_instance_assignment -name XCVR_A10_TX_VOD_OUTPUT_SWING_CTRL 30 -to BCK_TX[18] +set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to BCK_TX[18] +set_instance_assignment -name XCVR_A10_TX_COMPENSATION_EN ENABLE -to BCK_TX[18] +set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SWITCHING_CTRL_1ST_POST_TAP 0 -to BCK_TX[18] +set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SIGN_1ST_POST_TAP FIR_POST_1T_POS -to BCK_TX[18] + +set_instance_assignment -name IO_STANDARD "HSSI DIFFERENTIAL I/O" -to BCK_TX[19] +set_instance_assignment -name XCVR_A10_TX_VOD_OUTPUT_SWING_CTRL 30 -to BCK_TX[19] +set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to BCK_TX[19] +set_instance_assignment -name XCVR_A10_TX_COMPENSATION_EN ENABLE -to BCK_TX[19] +set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SWITCHING_CTRL_1ST_POST_TAP 0 -to BCK_TX[19] +set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SIGN_1ST_POST_TAP FIR_POST_1T_POS -to BCK_TX[19] + +set_instance_assignment -name IO_STANDARD "HSSI DIFFERENTIAL I/O" -to BCK_TX[20] +set_instance_assignment -name XCVR_A10_TX_VOD_OUTPUT_SWING_CTRL 30 -to BCK_TX[20] +set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to BCK_TX[20] +set_instance_assignment -name XCVR_A10_TX_COMPENSATION_EN ENABLE -to BCK_TX[20] +set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SWITCHING_CTRL_1ST_POST_TAP 0 -to BCK_TX[20] +set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SIGN_1ST_POST_TAP FIR_POST_1T_POS -to BCK_TX[20] + +set_instance_assignment -name IO_STANDARD "HSSI DIFFERENTIAL I/O" -to BCK_TX[21] +set_instance_assignment -name XCVR_A10_TX_VOD_OUTPUT_SWING_CTRL 30 -to BCK_TX[21] +set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to BCK_TX[21] +set_instance_assignment -name XCVR_A10_TX_COMPENSATION_EN ENABLE -to BCK_TX[21] +set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SWITCHING_CTRL_1ST_POST_TAP 0 -to BCK_TX[21] +set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SIGN_1ST_POST_TAP FIR_POST_1T_POS -to BCK_TX[21] + +set_instance_assignment -name IO_STANDARD "HSSI DIFFERENTIAL I/O" -to BCK_TX[22] +set_instance_assignment -name XCVR_A10_TX_VOD_OUTPUT_SWING_CTRL 30 -to BCK_TX[22] +set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to BCK_TX[22] +set_instance_assignment -name XCVR_A10_TX_COMPENSATION_EN ENABLE -to BCK_TX[22] +set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SWITCHING_CTRL_1ST_POST_TAP 0 -to BCK_TX[22] +set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SIGN_1ST_POST_TAP FIR_POST_1T_POS -to BCK_TX[22] + +set_instance_assignment -name IO_STANDARD "HSSI DIFFERENTIAL I/O" -to BCK_TX[23] +set_instance_assignment -name XCVR_A10_TX_VOD_OUTPUT_SWING_CTRL 30 -to BCK_TX[23] +set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to BCK_TX[23] +set_instance_assignment -name XCVR_A10_TX_COMPENSATION_EN ENABLE -to BCK_TX[23] +set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SWITCHING_CTRL_1ST_POST_TAP 0 -to BCK_TX[23] +set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SIGN_1ST_POST_TAP FIR_POST_1T_POS -to BCK_TX[23] + +set_instance_assignment -name IO_STANDARD "HSSI DIFFERENTIAL I/O" -to BCK_TX[24] +set_instance_assignment -name XCVR_A10_TX_VOD_OUTPUT_SWING_CTRL 30 -to BCK_TX[24] +set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to BCK_TX[24] +set_instance_assignment -name XCVR_A10_TX_COMPENSATION_EN ENABLE -to BCK_TX[24] +set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SWITCHING_CTRL_1ST_POST_TAP 0 -to BCK_TX[24] +set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SIGN_1ST_POST_TAP FIR_POST_1T_POS -to BCK_TX[24] + +set_instance_assignment -name IO_STANDARD "HSSI DIFFERENTIAL I/O" -to BCK_TX[25] +set_instance_assignment -name XCVR_A10_TX_VOD_OUTPUT_SWING_CTRL 30 -to BCK_TX[25] +set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to BCK_TX[25] +set_instance_assignment -name XCVR_A10_TX_COMPENSATION_EN ENABLE -to BCK_TX[25] +set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SWITCHING_CTRL_1ST_POST_TAP 0 -to BCK_TX[25] +set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SIGN_1ST_POST_TAP FIR_POST_1T_POS -to BCK_TX[25] + +set_instance_assignment -name IO_STANDARD "HSSI DIFFERENTIAL I/O" -to BCK_TX[26] +set_instance_assignment -name XCVR_A10_TX_VOD_OUTPUT_SWING_CTRL 30 -to BCK_TX[26] +set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to BCK_TX[26] +set_instance_assignment -name XCVR_A10_TX_COMPENSATION_EN ENABLE -to BCK_TX[26] +set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SWITCHING_CTRL_1ST_POST_TAP 0 -to BCK_TX[26] +set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SIGN_1ST_POST_TAP FIR_POST_1T_POS -to BCK_TX[26] + +set_instance_assignment -name IO_STANDARD "HSSI DIFFERENTIAL I/O" -to BCK_TX[27] +set_instance_assignment -name XCVR_A10_TX_VOD_OUTPUT_SWING_CTRL 30 -to BCK_TX[27] +set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to BCK_TX[27] +set_instance_assignment -name XCVR_A10_TX_COMPENSATION_EN ENABLE -to BCK_TX[27] +set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SWITCHING_CTRL_1ST_POST_TAP 0 -to BCK_TX[27] +set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SIGN_1ST_POST_TAP FIR_POST_1T_POS -to BCK_TX[27] + +set_instance_assignment -name IO_STANDARD "HSSI DIFFERENTIAL I/O" -to BCK_TX[28] +set_instance_assignment -name XCVR_A10_TX_VOD_OUTPUT_SWING_CTRL 30 -to BCK_TX[28] +set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to BCK_TX[28] +set_instance_assignment -name XCVR_A10_TX_COMPENSATION_EN ENABLE -to BCK_TX[28] +set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SWITCHING_CTRL_1ST_POST_TAP 0 -to BCK_TX[28] +set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SIGN_1ST_POST_TAP FIR_POST_1T_POS -to BCK_TX[28] + +set_instance_assignment -name IO_STANDARD "HSSI DIFFERENTIAL I/O" -to BCK_TX[29] +set_instance_assignment -name XCVR_A10_TX_VOD_OUTPUT_SWING_CTRL 30 -to BCK_TX[29] +set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to BCK_TX[29] +set_instance_assignment -name XCVR_A10_TX_COMPENSATION_EN ENABLE -to BCK_TX[29] +set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SWITCHING_CTRL_1ST_POST_TAP 0 -to BCK_TX[29] +set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SIGN_1ST_POST_TAP FIR_POST_1T_POS -to BCK_TX[29] + +set_instance_assignment -name IO_STANDARD "HSSI DIFFERENTIAL I/O" -to BCK_TX[30] +set_instance_assignment -name XCVR_A10_TX_VOD_OUTPUT_SWING_CTRL 30 -to BCK_TX[30] +set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to BCK_TX[30] +set_instance_assignment -name XCVR_A10_TX_COMPENSATION_EN ENABLE -to BCK_TX[30] +set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SWITCHING_CTRL_1ST_POST_TAP 0 -to BCK_TX[30] +set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SIGN_1ST_POST_TAP FIR_POST_1T_POS -to BCK_TX[30] + +set_instance_assignment -name IO_STANDARD "HSSI DIFFERENTIAL I/O" -to BCK_TX[31] +set_instance_assignment -name XCVR_A10_TX_VOD_OUTPUT_SWING_CTRL 30 -to BCK_TX[31] +set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to BCK_TX[31] +set_instance_assignment -name XCVR_A10_TX_COMPENSATION_EN ENABLE -to BCK_TX[31] +set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SWITCHING_CTRL_1ST_POST_TAP 0 -to BCK_TX[31] +set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SIGN_1ST_POST_TAP FIR_POST_1T_POS -to BCK_TX[31] + +set_instance_assignment -name IO_STANDARD "HSSI DIFFERENTIAL I/O" -to BCK_TX[32] +set_instance_assignment -name XCVR_A10_TX_VOD_OUTPUT_SWING_CTRL 30 -to BCK_TX[32] +set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to BCK_TX[32] +set_instance_assignment -name XCVR_A10_TX_COMPENSATION_EN ENABLE -to BCK_TX[32] +set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SWITCHING_CTRL_1ST_POST_TAP 0 -to BCK_TX[32] +set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SIGN_1ST_POST_TAP FIR_POST_1T_POS -to BCK_TX[32] + +set_instance_assignment -name IO_STANDARD "HSSI DIFFERENTIAL I/O" -to BCK_TX[33] +set_instance_assignment -name XCVR_A10_TX_VOD_OUTPUT_SWING_CTRL 30 -to BCK_TX[33] +set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to BCK_TX[33] +set_instance_assignment -name XCVR_A10_TX_COMPENSATION_EN ENABLE -to BCK_TX[33] +set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SWITCHING_CTRL_1ST_POST_TAP 0 -to BCK_TX[33] +set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SIGN_1ST_POST_TAP FIR_POST_1T_POS -to BCK_TX[33] + +set_instance_assignment -name IO_STANDARD "HSSI DIFFERENTIAL I/O" -to BCK_TX[34] +set_instance_assignment -name XCVR_A10_TX_VOD_OUTPUT_SWING_CTRL 30 -to BCK_TX[34] +set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to BCK_TX[34] +set_instance_assignment -name XCVR_A10_TX_COMPENSATION_EN ENABLE -to BCK_TX[34] +set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SWITCHING_CTRL_1ST_POST_TAP 0 -to BCK_TX[34] +set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SIGN_1ST_POST_TAP FIR_POST_1T_POS -to BCK_TX[34] + +set_instance_assignment -name IO_STANDARD "HSSI DIFFERENTIAL I/O" -to BCK_TX[35] +set_instance_assignment -name XCVR_A10_TX_VOD_OUTPUT_SWING_CTRL 30 -to BCK_TX[35] +set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to BCK_TX[35] +set_instance_assignment -name XCVR_A10_TX_COMPENSATION_EN ENABLE -to BCK_TX[35] +set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SWITCHING_CTRL_1ST_POST_TAP 0 -to BCK_TX[35] +set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SIGN_1ST_POST_TAP FIR_POST_1T_POS -to BCK_TX[35] + +set_instance_assignment -name IO_STANDARD "HSSI DIFFERENTIAL I/O" -to BCK_TX[36] +set_instance_assignment -name XCVR_A10_TX_VOD_OUTPUT_SWING_CTRL 30 -to BCK_TX[36] +set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to BCK_TX[36] +set_instance_assignment -name XCVR_A10_TX_COMPENSATION_EN ENABLE -to BCK_TX[36] +set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SWITCHING_CTRL_1ST_POST_TAP 0 -to BCK_TX[36] +set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SIGN_1ST_POST_TAP FIR_POST_1T_POS -to BCK_TX[36] + +set_instance_assignment -name IO_STANDARD "HSSI DIFFERENTIAL I/O" -to BCK_TX[37] +set_instance_assignment -name XCVR_A10_TX_VOD_OUTPUT_SWING_CTRL 30 -to BCK_TX[37] +set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to BCK_TX[37] +set_instance_assignment -name XCVR_A10_TX_COMPENSATION_EN ENABLE -to BCK_TX[37] +set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SWITCHING_CTRL_1ST_POST_TAP 0 -to BCK_TX[37] +set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SIGN_1ST_POST_TAP FIR_POST_1T_POS -to BCK_TX[37] + +set_instance_assignment -name IO_STANDARD "HSSI DIFFERENTIAL I/O" -to BCK_TX[38] +set_instance_assignment -name XCVR_A10_TX_VOD_OUTPUT_SWING_CTRL 30 -to BCK_TX[38] +set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to BCK_TX[38] +set_instance_assignment -name XCVR_A10_TX_COMPENSATION_EN ENABLE -to BCK_TX[38] +set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SWITCHING_CTRL_1ST_POST_TAP 0 -to BCK_TX[38] +set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SIGN_1ST_POST_TAP FIR_POST_1T_POS -to BCK_TX[38] + +set_instance_assignment -name IO_STANDARD "HSSI DIFFERENTIAL I/O" -to BCK_TX[39] +set_instance_assignment -name XCVR_A10_TX_VOD_OUTPUT_SWING_CTRL 30 -to BCK_TX[39] +set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to BCK_TX[39] +set_instance_assignment -name XCVR_A10_TX_COMPENSATION_EN ENABLE -to BCK_TX[39] +set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SWITCHING_CTRL_1ST_POST_TAP 0 -to BCK_TX[39] +set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SIGN_1ST_POST_TAP FIR_POST_1T_POS -to BCK_TX[39] + +set_instance_assignment -name IO_STANDARD "HSSI DIFFERENTIAL I/O" -to BCK_TX[40] +set_instance_assignment -name XCVR_A10_TX_VOD_OUTPUT_SWING_CTRL 30 -to BCK_TX[40] +set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to BCK_TX[40] +set_instance_assignment -name XCVR_A10_TX_COMPENSATION_EN ENABLE -to BCK_TX[40] +set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SWITCHING_CTRL_1ST_POST_TAP 0 -to BCK_TX[40] +set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SIGN_1ST_POST_TAP FIR_POST_1T_POS -to BCK_TX[40] + +set_instance_assignment -name IO_STANDARD "HSSI DIFFERENTIAL I/O" -to BCK_TX[41] +set_instance_assignment -name XCVR_A10_TX_VOD_OUTPUT_SWING_CTRL 30 -to BCK_TX[41] +set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to BCK_TX[41] +set_instance_assignment -name XCVR_A10_TX_COMPENSATION_EN ENABLE -to BCK_TX[41] +set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SWITCHING_CTRL_1ST_POST_TAP 0 -to BCK_TX[41] +set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SIGN_1ST_POST_TAP FIR_POST_1T_POS -to BCK_TX[41] + +set_instance_assignment -name IO_STANDARD "HSSI DIFFERENTIAL I/O" -to BCK_TX[42] +set_instance_assignment -name XCVR_A10_TX_VOD_OUTPUT_SWING_CTRL 30 -to BCK_TX[42] +set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to BCK_TX[42] +set_instance_assignment -name XCVR_A10_TX_COMPENSATION_EN ENABLE -to BCK_TX[42] +set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SWITCHING_CTRL_1ST_POST_TAP 0 -to BCK_TX[42] +set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SIGN_1ST_POST_TAP FIR_POST_1T_POS -to BCK_TX[42] + +set_instance_assignment -name IO_STANDARD "HSSI DIFFERENTIAL I/O" -to BCK_TX[43] +set_instance_assignment -name XCVR_A10_TX_VOD_OUTPUT_SWING_CTRL 30 -to BCK_TX[43] +set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to BCK_TX[43] +set_instance_assignment -name XCVR_A10_TX_COMPENSATION_EN ENABLE -to BCK_TX[43] +set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SWITCHING_CTRL_1ST_POST_TAP 0 -to BCK_TX[43] +set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SIGN_1ST_POST_TAP FIR_POST_1T_POS -to BCK_TX[43] + +set_instance_assignment -name IO_STANDARD "HSSI DIFFERENTIAL I/O" -to BCK_TX[44] +set_instance_assignment -name XCVR_A10_TX_VOD_OUTPUT_SWING_CTRL 30 -to BCK_TX[44] +set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to BCK_TX[44] +set_instance_assignment -name XCVR_A10_TX_COMPENSATION_EN ENABLE -to BCK_TX[44] +set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SWITCHING_CTRL_1ST_POST_TAP 0 -to BCK_TX[44] +set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SIGN_1ST_POST_TAP FIR_POST_1T_POS -to BCK_TX[44] + +set_instance_assignment -name IO_STANDARD "HSSI DIFFERENTIAL I/O" -to BCK_TX[45] +set_instance_assignment -name XCVR_A10_TX_VOD_OUTPUT_SWING_CTRL 30 -to BCK_TX[45] +set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to BCK_TX[45] +set_instance_assignment -name XCVR_A10_TX_COMPENSATION_EN ENABLE -to BCK_TX[45] +set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SWITCHING_CTRL_1ST_POST_TAP 0 -to BCK_TX[45] +set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SIGN_1ST_POST_TAP FIR_POST_1T_POS -to BCK_TX[45] + +set_instance_assignment -name IO_STANDARD "HSSI DIFFERENTIAL I/O" -to BCK_TX[46] +set_instance_assignment -name XCVR_A10_TX_VOD_OUTPUT_SWING_CTRL 30 -to BCK_TX[46] +set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to BCK_TX[46] +set_instance_assignment -name XCVR_A10_TX_COMPENSATION_EN ENABLE -to BCK_TX[46] +set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SWITCHING_CTRL_1ST_POST_TAP 0 -to BCK_TX[46] +set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SIGN_1ST_POST_TAP FIR_POST_1T_POS -to BCK_TX[46] + +set_instance_assignment -name IO_STANDARD "HSSI DIFFERENTIAL I/O" -to BCK_TX[47] +set_instance_assignment -name XCVR_A10_TX_VOD_OUTPUT_SWING_CTRL 30 -to BCK_TX[47] +set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to BCK_TX[47] +set_instance_assignment -name XCVR_A10_TX_COMPENSATION_EN ENABLE -to BCK_TX[47] +set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SWITCHING_CTRL_1ST_POST_TAP 0 -to BCK_TX[47] +set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SIGN_1ST_POST_TAP FIR_POST_1T_POS -to BCK_TX[47] + + +# Substitute new signal names from the jesd_simple design +#set_location_assignment PIN_BA7 -to BCK_RX[0] + +set_instance_assignment -name IO_STANDARD LVDS -to BCK_REF_CLK +set_instance_assignment -name IO_STANDARD LVDS -to "BCK_REF_CLK(n)" +set_instance_assignment -name XCVR_A10_RX_TERM_SEL R_R1 -to BCK_REF_CLK +set_location_assignment PIN_V9 -to BCK_REF_CLK +set_location_assignment PIN_V10 -to "BCK_REF_CLK(n)" + +set_location_assignment PIN_V12 -to JESD204B_SYSREF +set_instance_assignment -name IO_STANDARD "1.8 V" -to JESD204B_SYSREF + +set_location_assignment PIN_U12 -to JESD204B_SYNC_N[0] +set_instance_assignment -name IO_STANDARD "1.8 V" -to JESD204B_SYNC_N[0] +set_location_assignment PIN_U14 -to JESD204B_SYNC_N[1] +set_instance_assignment -name IO_STANDARD "1.8 V" -to JESD204B_SYNC_N[1] + + diff --git a/applications/lofar2/designs/lofar2_unb2b_sdp_station/quartus/lofar2_unb2b_sdp_station_pins.tcl b/applications/lofar2/designs/lofar2_unb2b_sdp_station/quartus/lofar2_unb2b_sdp_station_pins.tcl index ca2240dd710c3cd72cb96c527b84752e1561757b..736d08b812885002ead951ef1fd37bdfec638982 100644 --- a/applications/lofar2/designs/lofar2_unb2b_sdp_station/quartus/lofar2_unb2b_sdp_station_pins.tcl +++ b/applications/lofar2/designs/lofar2_unb2b_sdp_station/quartus/lofar2_unb2b_sdp_station_pins.tcl @@ -72,53 +72,6 @@ set_instance_assignment -name IO_STANDARD "1.8 V" -to QSFP_SCL[3] set_instance_assignment -name IO_STANDARD "1.8 V" -to QSFP_SCL[4] set_instance_assignment -name IO_STANDARD "1.8 V" -to QSFP_RST - -### QSFP_0_0 -set_instance_assignment -name IO_STANDARD "HSSI DIFFERENTIAL I/O" -to QSFP_0_RX[0] -set_instance_assignment -name XCVR_A10_RX_TERM_SEL R_R1 -to QSFP_0_RX[0] -set_instance_assignment -name XCVR_A10_RX_ADP_DFE_FXTAP5 RADP_DFE_FXTAP5_0 -to QSFP_0_RX[0] -set_instance_assignment -name XCVR_A10_RX_ADP_DFE_FXTAP4 RADP_DFE_FXTAP4_0 -to QSFP_0_RX[0] -set_instance_assignment -name XCVR_A10_RX_ADP_DFE_FXTAP1 RADP_DFE_FXTAP1_0 -to QSFP_0_RX[0] -set_instance_assignment -name XCVR_A10_RX_ADP_DFE_FXTAP7 RADP_DFE_FXTAP7_0 -to QSFP_0_RX[0] -set_instance_assignment -name XCVR_A10_RX_ADP_DFE_FXTAP6 RADP_DFE_FXTAP6_0 -to QSFP_0_RX[0] -set_instance_assignment -name XCVR_A10_RX_ADP_DFE_FXTAP3 RADP_DFE_FXTAP3_0 -to QSFP_0_RX[0] -set_instance_assignment -name XCVR_A10_RX_ADP_DFE_FXTAP2 RADP_DFE_FXTAP2_0 -to QSFP_0_RX[0] -set_instance_assignment -name XCVR_A10_RX_ONE_STAGE_ENABLE NON_S1_MODE -to QSFP_0_RX[0] -set_instance_assignment -name XCVR_A10_RX_ADP_CTLE_ACGAIN_4S RADP_CTLE_ACGAIN_4S_8 -to QSFP_0_RX[0] -set_instance_assignment -name XCVR_A10_RX_EQ_DC_GAIN_TRIM NO_DC_GAIN -to QSFP_0_RX[0] -set_instance_assignment -name XCVR_A10_RX_ADP_VGA_SEL RADP_VGA_SEL_5 -to QSFP_0_RX[0] -set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to QSFP_0_RX[0] - -set_instance_assignment -name IO_STANDARD "HSSI DIFFERENTIAL I/O" -to QSFP_0_TX[0] -set_instance_assignment -name XCVR_A10_TX_VOD_OUTPUT_SWING_CTRL 30 -to QSFP_0_TX[0] -set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to QSFP_0_TX[0] -set_instance_assignment -name XCVR_A10_TX_COMPENSATION_EN ENABLE -to QSFP_0_TX[0] -set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SWITCHING_CTRL_1ST_POST_TAP 0 -to QSFP_0_TX[0] -set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SIGN_1ST_POST_TAP FIR_POST_1T_POS -to QSFP_0_TX[0] - -### QSFP_1_0 -set_instance_assignment -name IO_STANDARD "HSSI DIFFERENTIAL I/O" -to QSFP_1_RX[0] -set_instance_assignment -name XCVR_A10_RX_TERM_SEL R_R1 -to QSFP_1_RX[0] -set_instance_assignment -name XCVR_A10_RX_ADP_DFE_FXTAP5 RADP_DFE_FXTAP5_0 -to QSFP_1_RX[0] -set_instance_assignment -name XCVR_A10_RX_ADP_DFE_FXTAP4 RADP_DFE_FXTAP4_0 -to QSFP_1_RX[0] -set_instance_assignment -name XCVR_A10_RX_ADP_DFE_FXTAP1 RADP_DFE_FXTAP1_0 -to QSFP_1_RX[0] -set_instance_assignment -name XCVR_A10_RX_ADP_DFE_FXTAP7 RADP_DFE_FXTAP7_0 -to QSFP_1_RX[0] -set_instance_assignment -name XCVR_A10_RX_ADP_DFE_FXTAP6 RADP_DFE_FXTAP6_0 -to QSFP_1_RX[0] -set_instance_assignment -name XCVR_A10_RX_ADP_DFE_FXTAP3 RADP_DFE_FXTAP3_0 -to QSFP_1_RX[0] -set_instance_assignment -name XCVR_A10_RX_ADP_DFE_FXTAP2 RADP_DFE_FXTAP2_0 -to QSFP_1_RX[0] -set_instance_assignment -name XCVR_A10_RX_ONE_STAGE_ENABLE NON_S1_MODE -to QSFP_1_RX[0] -set_instance_assignment -name XCVR_A10_RX_ADP_CTLE_ACGAIN_4S RADP_CTLE_ACGAIN_4S_8 -to QSFP_1_RX[0] -set_instance_assignment -name XCVR_A10_RX_EQ_DC_GAIN_TRIM NO_DC_GAIN -to QSFP_1_RX[0] -set_instance_assignment -name XCVR_A10_RX_ADP_VGA_SEL RADP_VGA_SEL_5 -to QSFP_1_RX[0] -set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to QSFP_1_RX[0] - -set_instance_assignment -name IO_STANDARD "HSSI DIFFERENTIAL I/O" -to QSFP_1_TX[0] -set_instance_assignment -name XCVR_A10_TX_VOD_OUTPUT_SWING_CTRL 30 -to QSFP_1_TX[0] -set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to QSFP_1_TX[0] -set_instance_assignment -name XCVR_A10_TX_COMPENSATION_EN ENABLE -to QSFP_1_TX[0] -set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SWITCHING_CTRL_1ST_POST_TAP 0 -to QSFP_1_TX[0] -set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SIGN_1ST_POST_TAP FIR_POST_1T_POS -to QSFP_1_TX[0] - # QSFP_0_RX set_location_assignment PIN_AN38 -to QSFP_0_RX[0] set_location_assignment PIN_AM40 -to QSFP_0_RX[1] @@ -162,476 +115,5 @@ set_location_assignment PIN_J42 -to RING_1_TX[1] set_location_assignment PIN_G42 -to RING_1_TX[2] set_location_assignment PIN_F44 -to RING_1_TX[3] -#RING_0 RX assignments -set_instance_assignment -name IO_STANDARD "HSSI DIFFERENTIAL I/O" -to RING_0_RX[0] -set_instance_assignment -name XCVR_A10_RX_TERM_SEL R_R1 -to RING_0_RX[0] -set_instance_assignment -name XCVR_A10_RX_ADP_DFE_FXTAP5 RADP_DFE_FXTAP5_0 -to RING_0_RX[0] -set_instance_assignment -name XCVR_A10_RX_ADP_DFE_FXTAP4 RADP_DFE_FXTAP4_0 -to RING_0_RX[0] -set_instance_assignment -name XCVR_A10_RX_ADP_DFE_FXTAP1 RADP_DFE_FXTAP1_0 -to RING_0_RX[0] -set_instance_assignment -name XCVR_A10_RX_ADP_DFE_FXTAP7 RADP_DFE_FXTAP7_0 -to RING_0_RX[0] -set_instance_assignment -name XCVR_A10_RX_ADP_DFE_FXTAP6 RADP_DFE_FXTAP6_0 -to RING_0_RX[0] -set_instance_assignment -name XCVR_A10_RX_ADP_DFE_FXTAP3 RADP_DFE_FXTAP3_0 -to RING_0_RX[0] -set_instance_assignment -name XCVR_A10_RX_ADP_DFE_FXTAP2 RADP_DFE_FXTAP2_0 -to RING_0_RX[0] -set_instance_assignment -name XCVR_A10_RX_ONE_STAGE_ENABLE NON_S1_MODE -to RING_0_RX[0] -set_instance_assignment -name XCVR_A10_RX_ADP_CTLE_ACGAIN_4S RADP_CTLE_ACGAIN_4S_12 -to RING_0_RX[0] -set_instance_assignment -name XCVR_A10_RX_EQ_DC_GAIN_TRIM NO_DC_GAIN -to RING_0_RX[0] -set_instance_assignment -name XCVR_A10_RX_ADP_VGA_SEL RADP_VGA_SEL_3 -to RING_0_RX[0] -set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to RING_0_RX[0] - -#RING_1 RX assignments -set_instance_assignment -name IO_STANDARD "HSSI DIFFERENTIAL I/O" -to RING_1_RX[0] -set_instance_assignment -name XCVR_A10_RX_TERM_SEL R_R1 -to RING_1_RX[0] -set_instance_assignment -name XCVR_A10_RX_ADP_DFE_FXTAP5 RADP_DFE_FXTAP5_0 -to RING_1_RX[0] -set_instance_assignment -name XCVR_A10_RX_ADP_DFE_FXTAP4 RADP_DFE_FXTAP4_0 -to RING_1_RX[0] -set_instance_assignment -name XCVR_A10_RX_ADP_DFE_FXTAP1 RADP_DFE_FXTAP1_0 -to RING_1_RX[0] -set_instance_assignment -name XCVR_A10_RX_ADP_DFE_FXTAP7 RADP_DFE_FXTAP7_0 -to RING_1_RX[0] -set_instance_assignment -name XCVR_A10_RX_ADP_DFE_FXTAP6 RADP_DFE_FXTAP6_0 -to RING_1_RX[0] -set_instance_assignment -name XCVR_A10_RX_ADP_DFE_FXTAP3 RADP_DFE_FXTAP3_0 -to RING_1_RX[0] -set_instance_assignment -name XCVR_A10_RX_ADP_DFE_FXTAP2 RADP_DFE_FXTAP2_0 -to RING_1_RX[0] -set_instance_assignment -name XCVR_A10_RX_ONE_STAGE_ENABLE NON_S1_MODE -to RING_1_RX[0] -set_instance_assignment -name XCVR_A10_RX_ADP_CTLE_ACGAIN_4S RADP_CTLE_ACGAIN_4S_12 -to RING_1_RX[0] -set_instance_assignment -name XCVR_A10_RX_EQ_DC_GAIN_TRIM NO_DC_GAIN -to RING_1_RX[0] -set_instance_assignment -name XCVR_A10_RX_ADP_VGA_SEL RADP_VGA_SEL_3 -to RING_1_RX[0] -set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to RING_1_RX[0] - -#RING_0 TX assignments -set_instance_assignment -name IO_STANDARD "HSSI DIFFERENTIAL I/O" -to RING_0_TX[0] -set_instance_assignment -name XCVR_A10_TX_VOD_OUTPUT_SWING_CTRL 30 -to RING_0_TX[0] -set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to RING_0_TX[0] -set_instance_assignment -name XCVR_A10_TX_COMPENSATION_EN ENABLE -to RING_0_TX[0] -set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SWITCHING_CTRL_1ST_POST_TAP 0 -to RING_0_TX[0] -set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SIGN_1ST_POST_TAP FIR_POST_1T_POS -to RING_0_TX[0] - -#RING_1 TX assignments -set_instance_assignment -name IO_STANDARD "HSSI DIFFERENTIAL I/O" -to RING_1_TX[0] -set_instance_assignment -name XCVR_A10_TX_VOD_OUTPUT_SWING_CTRL 30 -to RING_1_TX[0] -set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to RING_1_TX[0] -set_instance_assignment -name XCVR_A10_TX_COMPENSATION_EN ENABLE -to RING_1_TX[0] -set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SWITCHING_CTRL_1ST_POST_TAP 0 -to RING_1_TX[0] -set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SIGN_1ST_POST_TAP FIR_POST_1T_POS -to RING_1_TX[0] - - -#===================== -# JESD pins -# ==================== -# Pins needed for the 12 channel JESD204B interface to the ADCs -set_instance_assignment -name IO_STANDARD LVDS -to JESD204B_SYSREF -set_instance_assignment -name IO_STANDARD LVDS -to "JESD204B_SYSREF(n)" -set_instance_assignment -name IO_STANDARD "1.8 V" -to JESD204B_SYNC_N[0] -set_instance_assignment -name IO_STANDARD "1.8 V" -to JESD204B_SYNC_N[1] -set_instance_assignment -name IO_STANDARD "1.8 V" -to JESD204B_SYNC_N[2] -set_instance_assignment -name IO_STANDARD "1.8 V" -to JESD204B_SYNC_N[3] -set_instance_assignment -name IO_STANDARD "1.8 V" -to JESD204B_SYNC_N[4] -set_instance_assignment -name IO_STANDARD "1.8 V" -to JESD204B_SYNC_N[5] -set_instance_assignment -name IO_STANDARD "1.8 V" -to JESD204B_SYNC_N[6] -set_instance_assignment -name IO_STANDARD "1.8 V" -to JESD204B_SYNC_N[7] -set_instance_assignment -name IO_STANDARD "1.8 V" -to JESD204B_SYNC_N[8] -set_instance_assignment -name IO_STANDARD "1.8 V" -to JESD204B_SYNC_N[9] -set_instance_assignment -name IO_STANDARD "1.8 V" -to JESD204B_SYNC_N[10] -set_instance_assignment -name IO_STANDARD "1.8 V" -to JESD204B_SYNC_N[11] - -#set_location_assignment PIN_B9 -to BCK_RX[0] -set_location_assignment PIN_D9 -to BCK_RX[1] -set_location_assignment PIN_C11 -to BCK_RX[2] -set_location_assignment PIN_F9 -to BCK_RX[3] -set_location_assignment PIN_C7 -to BCK_RX[4] -set_location_assignment PIN_E11 -to BCK_RX[5] -set_location_assignment PIN_E7 -to BCK_RX[6] -set_location_assignment PIN_D5 -to BCK_RX[7] -set_location_assignment PIN_G7 -to BCK_RX[8] -set_location_assignment PIN_F5 -to BCK_RX[9] -set_location_assignment PIN_J7 -to BCK_RX[10] -set_location_assignment PIN_H5 -to BCK_RX[11] -set_location_assignment PIN_L7 -to BCK_RX[12] -set_location_assignment PIN_K5 -to BCK_RX[13] -set_location_assignment PIN_N7 -to BCK_RX[14] -set_location_assignment PIN_M5 -to BCK_RX[15] -set_location_assignment PIN_R7 -to BCK_RX[16] -set_location_assignment PIN_P5 -to BCK_RX[17] -set_location_assignment PIN_U7 -to BCK_RX[18] -set_location_assignment PIN_T5 -to BCK_RX[19] -set_location_assignment PIN_W7 -to BCK_RX[20] -set_location_assignment PIN_V5 -to BCK_RX[21] -set_location_assignment PIN_AA7 -to BCK_RX[22] -set_location_assignment PIN_Y5 -to BCK_RX[23] -set_location_assignment PIN_AC7 -to BCK_RX[24] -set_location_assignment PIN_AB5 -to BCK_RX[25] -set_location_assignment PIN_AE7 -to BCK_RX[26] -set_location_assignment PIN_AD5 -to BCK_RX[27] -set_location_assignment PIN_AG7 -to BCK_RX[28] -set_location_assignment PIN_AF5 -to BCK_RX[29] -set_location_assignment PIN_AJ7 -to BCK_RX[30] -set_location_assignment PIN_AH5 -to BCK_RX[31] -set_location_assignment PIN_AL7 -to BCK_RX[32] -set_location_assignment PIN_AK5 -to BCK_RX[33] -set_location_assignment PIN_AN7 -to BCK_RX[34] -set_location_assignment PIN_AM5 -to BCK_RX[35] -set_location_assignment PIN_AR7 -to BCK_RX[36] -set_location_assignment PIN_AP5 -to BCK_RX[37] -set_location_assignment PIN_AU7 -to BCK_RX[38] -set_location_assignment PIN_AT5 -to BCK_RX[39] -set_location_assignment PIN_AW7 -to BCK_RX[40] -set_location_assignment PIN_AV5 -to BCK_RX[41] -set_location_assignment PIN_BA7 -to BCK_RX[42] -set_location_assignment PIN_AY5 -to BCK_RX[43] -set_location_assignment PIN_BC7 -to BCK_RX[44] -set_location_assignment PIN_BB5 -to BCK_RX[45] -set_location_assignment PIN_AY9 -to BCK_RX[46] -set_location_assignment PIN_BB9 -to BCK_RX[47] - - -#set_instance_assignment -name IO_STANDARD "HSSI DIFFERENTIAL I/O" -to BCK_TX[0] -#set_instance_assignment -name XCVR_A10_TX_VOD_OUTPUT_SWING_CTRL 30 -to BCK_TX[0] -#set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to BCK_TX[0] -#set_instance_assignment -name XCVR_A10_TX_COMPENSATION_EN ENABLE -to BCK_TX[0] -#set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SWITCHING_CTRL_1ST_POST_TAP 0 -to BCK_TX[0] -#set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SIGN_1ST_POST_TAP FIR_POST_1T_POS -to BCK_TX[0] -# -#set_instance_assignment -name IO_STANDARD "HSSI DIFFERENTIAL I/O" -to BCK_TX[1] -#set_instance_assignment -name XCVR_A10_TX_VOD_OUTPUT_SWING_CTRL 30 -to BCK_TX[1] -#set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to BCK_TX[1] -#set_instance_assignment -name XCVR_A10_TX_COMPENSATION_EN ENABLE -to BCK_TX[1] -#set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SWITCHING_CTRL_1ST_POST_TAP 0 -to BCK_TX[1] -#set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SIGN_1ST_POST_TAP FIR_POST_1T_POS -to BCK_TX[1] -# -#set_instance_assignment -name IO_STANDARD "HSSI DIFFERENTIAL I/O" -to BCK_TX[2] -#set_instance_assignment -name XCVR_A10_TX_VOD_OUTPUT_SWING_CTRL 30 -to BCK_TX[2] -#set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to BCK_TX[2] -#set_instance_assignment -name XCVR_A10_TX_COMPENSATION_EN ENABLE -to BCK_TX[2] -#set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SWITCHING_CTRL_1ST_POST_TAP 0 -to BCK_TX[2] -#set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SIGN_1ST_POST_TAP FIR_POST_1T_POS -to BCK_TX[2] -# -#set_instance_assignment -name IO_STANDARD "HSSI DIFFERENTIAL I/O" -to BCK_TX[3] -#set_instance_assignment -name XCVR_A10_TX_VOD_OUTPUT_SWING_CTRL 30 -to BCK_TX[3] -#set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to BCK_TX[3] -#set_instance_assignment -name XCVR_A10_TX_COMPENSATION_EN ENABLE -to BCK_TX[3] -#set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SWITCHING_CTRL_1ST_POST_TAP 0 -to BCK_TX[3] -#set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SIGN_1ST_POST_TAP FIR_POST_1T_POS -to BCK_TX[3] -# -#set_instance_assignment -name IO_STANDARD "HSSI DIFFERENTIAL I/O" -to BCK_TX[4] -#set_instance_assignment -name XCVR_A10_TX_VOD_OUTPUT_SWING_CTRL 30 -to BCK_TX[4] -#set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to BCK_TX[4] -#set_instance_assignment -name XCVR_A10_TX_COMPENSATION_EN ENABLE -to BCK_TX[4] -#set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SWITCHING_CTRL_1ST_POST_TAP 0 -to BCK_TX[4] -#set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SIGN_1ST_POST_TAP FIR_POST_1T_POS -to BCK_TX[4] -# -#set_instance_assignment -name IO_STANDARD "HSSI DIFFERENTIAL I/O" -to BCK_TX[5] -#set_instance_assignment -name XCVR_A10_TX_VOD_OUTPUT_SWING_CTRL 30 -to BCK_TX[5] -#set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to BCK_TX[5] -#set_instance_assignment -name XCVR_A10_TX_COMPENSATION_EN ENABLE -to BCK_TX[5] -#set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SWITCHING_CTRL_1ST_POST_TAP 0 -to BCK_TX[5] -#set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SIGN_1ST_POST_TAP FIR_POST_1T_POS -to BCK_TX[5] -# -#set_instance_assignment -name IO_STANDARD "HSSI DIFFERENTIAL I/O" -to BCK_TX[6] -#set_instance_assignment -name XCVR_A10_TX_VOD_OUTPUT_SWING_CTRL 30 -to BCK_TX[6] -#set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to BCK_TX[6] -#set_instance_assignment -name XCVR_A10_TX_COMPENSATION_EN ENABLE -to BCK_TX[6] -#set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SWITCHING_CTRL_1ST_POST_TAP 0 -to BCK_TX[6] -#set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SIGN_1ST_POST_TAP FIR_POST_1T_POS -to BCK_TX[6] -# -#set_instance_assignment -name IO_STANDARD "HSSI DIFFERENTIAL I/O" -to BCK_TX[7] -#set_instance_assignment -name XCVR_A10_TX_VOD_OUTPUT_SWING_CTRL 30 -to BCK_TX[7] -#set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to BCK_TX[7] -#set_instance_assignment -name XCVR_A10_TX_COMPENSATION_EN ENABLE -to BCK_TX[7] -#set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SWITCHING_CTRL_1ST_POST_TAP 0 -to BCK_TX[7] -#set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SIGN_1ST_POST_TAP FIR_POST_1T_POS -to BCK_TX[7] -# -#set_instance_assignment -name IO_STANDARD "HSSI DIFFERENTIAL I/O" -to BCK_TX[8] -#set_instance_assignment -name XCVR_A10_TX_VOD_OUTPUT_SWING_CTRL 30 -to BCK_TX[8] -#set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to BCK_TX[8] -#set_instance_assignment -name XCVR_A10_TX_COMPENSATION_EN ENABLE -to BCK_TX[8] -#set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SWITCHING_CTRL_1ST_POST_TAP 0 -to BCK_TX[8] -#set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SIGN_1ST_POST_TAP FIR_POST_1T_POS -to BCK_TX[8] -# -#set_instance_assignment -name IO_STANDARD "HSSI DIFFERENTIAL I/O" -to BCK_TX[9] -#set_instance_assignment -name XCVR_A10_TX_VOD_OUTPUT_SWING_CTRL 30 -to BCK_TX[9] -#set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to BCK_TX[9] -#set_instance_assignment -name XCVR_A10_TX_COMPENSATION_EN ENABLE -to BCK_TX[9] -#set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SWITCHING_CTRL_1ST_POST_TAP 0 -to BCK_TX[9] -#set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SIGN_1ST_POST_TAP FIR_POST_1T_POS -to BCK_TX[9] -# -#set_instance_assignment -name IO_STANDARD "HSSI DIFFERENTIAL I/O" -to BCK_TX[10] -#set_instance_assignment -name XCVR_A10_TX_VOD_OUTPUT_SWING_CTRL 30 -to BCK_TX[10] -#set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to BCK_TX[10] -#set_instance_assignment -name XCVR_A10_TX_COMPENSATION_EN ENABLE -to BCK_TX[10] -#set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SWITCHING_CTRL_1ST_POST_TAP 0 -to BCK_TX[10] -#set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SIGN_1ST_POST_TAP FIR_POST_1T_POS -to BCK_TX[10] -# -#set_instance_assignment -name IO_STANDARD "HSSI DIFFERENTIAL I/O" -to BCK_TX[11] -#set_instance_assignment -name XCVR_A10_TX_VOD_OUTPUT_SWING_CTRL 30 -to BCK_TX[11] -#set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to BCK_TX[11] -#set_instance_assignment -name XCVR_A10_TX_COMPENSATION_EN ENABLE -to BCK_TX[11] -#set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SWITCHING_CTRL_1ST_POST_TAP 0 -to BCK_TX[11] -#set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SIGN_1ST_POST_TAP FIR_POST_1T_POS -to BCK_TX[11] - -set_instance_assignment -name IO_STANDARD "HSSI DIFFERENTIAL I/O" -to BCK_TX[12] -set_instance_assignment -name XCVR_A10_TX_VOD_OUTPUT_SWING_CTRL 30 -to BCK_TX[12] -set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to BCK_TX[12] -set_instance_assignment -name XCVR_A10_TX_COMPENSATION_EN ENABLE -to BCK_TX[12] -set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SWITCHING_CTRL_1ST_POST_TAP 0 -to BCK_TX[12] -set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SIGN_1ST_POST_TAP FIR_POST_1T_POS -to BCK_TX[12] - -set_instance_assignment -name IO_STANDARD "HSSI DIFFERENTIAL I/O" -to BCK_TX[13] -set_instance_assignment -name XCVR_A10_TX_VOD_OUTPUT_SWING_CTRL 30 -to BCK_TX[13] -set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to BCK_TX[13] -set_instance_assignment -name XCVR_A10_TX_COMPENSATION_EN ENABLE -to BCK_TX[13] -set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SWITCHING_CTRL_1ST_POST_TAP 0 -to BCK_TX[13] -set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SIGN_1ST_POST_TAP FIR_POST_1T_POS -to BCK_TX[13] - -set_instance_assignment -name IO_STANDARD "HSSI DIFFERENTIAL I/O" -to BCK_TX[14] -set_instance_assignment -name XCVR_A10_TX_VOD_OUTPUT_SWING_CTRL 30 -to BCK_TX[14] -set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to BCK_TX[14] -set_instance_assignment -name XCVR_A10_TX_COMPENSATION_EN ENABLE -to BCK_TX[14] -set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SWITCHING_CTRL_1ST_POST_TAP 0 -to BCK_TX[14] -set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SIGN_1ST_POST_TAP FIR_POST_1T_POS -to BCK_TX[14] - -set_instance_assignment -name IO_STANDARD "HSSI DIFFERENTIAL I/O" -to BCK_TX[15] -set_instance_assignment -name XCVR_A10_TX_VOD_OUTPUT_SWING_CTRL 30 -to BCK_TX[15] -set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to BCK_TX[15] -set_instance_assignment -name XCVR_A10_TX_COMPENSATION_EN ENABLE -to BCK_TX[15] -set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SWITCHING_CTRL_1ST_POST_TAP 0 -to BCK_TX[15] -set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SIGN_1ST_POST_TAP FIR_POST_1T_POS -to BCK_TX[15] - -set_instance_assignment -name IO_STANDARD "HSSI DIFFERENTIAL I/O" -to BCK_TX[16] -set_instance_assignment -name XCVR_A10_TX_VOD_OUTPUT_SWING_CTRL 30 -to BCK_TX[16] -set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to BCK_TX[16] -set_instance_assignment -name XCVR_A10_TX_COMPENSATION_EN ENABLE -to BCK_TX[16] -set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SWITCHING_CTRL_1ST_POST_TAP 0 -to BCK_TX[16] -set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SIGN_1ST_POST_TAP FIR_POST_1T_POS -to BCK_TX[16] - -set_instance_assignment -name IO_STANDARD "HSSI DIFFERENTIAL I/O" -to BCK_TX[17] -set_instance_assignment -name XCVR_A10_TX_VOD_OUTPUT_SWING_CTRL 30 -to BCK_TX[17] -set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to BCK_TX[17] -set_instance_assignment -name XCVR_A10_TX_COMPENSATION_EN ENABLE -to BCK_TX[17] -set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SWITCHING_CTRL_1ST_POST_TAP 0 -to BCK_TX[17] -set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SIGN_1ST_POST_TAP FIR_POST_1T_POS -to BCK_TX[17] - -set_instance_assignment -name IO_STANDARD "HSSI DIFFERENTIAL I/O" -to BCK_TX[18] -set_instance_assignment -name XCVR_A10_TX_VOD_OUTPUT_SWING_CTRL 30 -to BCK_TX[18] -set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to BCK_TX[18] -set_instance_assignment -name XCVR_A10_TX_COMPENSATION_EN ENABLE -to BCK_TX[18] -set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SWITCHING_CTRL_1ST_POST_TAP 0 -to BCK_TX[18] -set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SIGN_1ST_POST_TAP FIR_POST_1T_POS -to BCK_TX[18] - -set_instance_assignment -name IO_STANDARD "HSSI DIFFERENTIAL I/O" -to BCK_TX[19] -set_instance_assignment -name XCVR_A10_TX_VOD_OUTPUT_SWING_CTRL 30 -to BCK_TX[19] -set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to BCK_TX[19] -set_instance_assignment -name XCVR_A10_TX_COMPENSATION_EN ENABLE -to BCK_TX[19] -set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SWITCHING_CTRL_1ST_POST_TAP 0 -to BCK_TX[19] -set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SIGN_1ST_POST_TAP FIR_POST_1T_POS -to BCK_TX[19] - -set_instance_assignment -name IO_STANDARD "HSSI DIFFERENTIAL I/O" -to BCK_TX[20] -set_instance_assignment -name XCVR_A10_TX_VOD_OUTPUT_SWING_CTRL 30 -to BCK_TX[20] -set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to BCK_TX[20] -set_instance_assignment -name XCVR_A10_TX_COMPENSATION_EN ENABLE -to BCK_TX[20] -set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SWITCHING_CTRL_1ST_POST_TAP 0 -to BCK_TX[20] -set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SIGN_1ST_POST_TAP FIR_POST_1T_POS -to BCK_TX[20] - -set_instance_assignment -name IO_STANDARD "HSSI DIFFERENTIAL I/O" -to BCK_TX[21] -set_instance_assignment -name XCVR_A10_TX_VOD_OUTPUT_SWING_CTRL 30 -to BCK_TX[21] -set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to BCK_TX[21] -set_instance_assignment -name XCVR_A10_TX_COMPENSATION_EN ENABLE -to BCK_TX[21] -set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SWITCHING_CTRL_1ST_POST_TAP 0 -to BCK_TX[21] -set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SIGN_1ST_POST_TAP FIR_POST_1T_POS -to BCK_TX[21] - -set_instance_assignment -name IO_STANDARD "HSSI DIFFERENTIAL I/O" -to BCK_TX[22] -set_instance_assignment -name XCVR_A10_TX_VOD_OUTPUT_SWING_CTRL 30 -to BCK_TX[22] -set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to BCK_TX[22] -set_instance_assignment -name XCVR_A10_TX_COMPENSATION_EN ENABLE -to BCK_TX[22] -set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SWITCHING_CTRL_1ST_POST_TAP 0 -to BCK_TX[22] -set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SIGN_1ST_POST_TAP FIR_POST_1T_POS -to BCK_TX[22] - -set_instance_assignment -name IO_STANDARD "HSSI DIFFERENTIAL I/O" -to BCK_TX[23] -set_instance_assignment -name XCVR_A10_TX_VOD_OUTPUT_SWING_CTRL 30 -to BCK_TX[23] -set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to BCK_TX[23] -set_instance_assignment -name XCVR_A10_TX_COMPENSATION_EN ENABLE -to BCK_TX[23] -set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SWITCHING_CTRL_1ST_POST_TAP 0 -to BCK_TX[23] -set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SIGN_1ST_POST_TAP FIR_POST_1T_POS -to BCK_TX[23] - -set_instance_assignment -name IO_STANDARD "HSSI DIFFERENTIAL I/O" -to BCK_TX[24] -set_instance_assignment -name XCVR_A10_TX_VOD_OUTPUT_SWING_CTRL 30 -to BCK_TX[24] -set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to BCK_TX[24] -set_instance_assignment -name XCVR_A10_TX_COMPENSATION_EN ENABLE -to BCK_TX[24] -set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SWITCHING_CTRL_1ST_POST_TAP 0 -to BCK_TX[24] -set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SIGN_1ST_POST_TAP FIR_POST_1T_POS -to BCK_TX[24] - -set_instance_assignment -name IO_STANDARD "HSSI DIFFERENTIAL I/O" -to BCK_TX[25] -set_instance_assignment -name XCVR_A10_TX_VOD_OUTPUT_SWING_CTRL 30 -to BCK_TX[25] -set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to BCK_TX[25] -set_instance_assignment -name XCVR_A10_TX_COMPENSATION_EN ENABLE -to BCK_TX[25] -set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SWITCHING_CTRL_1ST_POST_TAP 0 -to BCK_TX[25] -set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SIGN_1ST_POST_TAP FIR_POST_1T_POS -to BCK_TX[25] - -set_instance_assignment -name IO_STANDARD "HSSI DIFFERENTIAL I/O" -to BCK_TX[26] -set_instance_assignment -name XCVR_A10_TX_VOD_OUTPUT_SWING_CTRL 30 -to BCK_TX[26] -set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to BCK_TX[26] -set_instance_assignment -name XCVR_A10_TX_COMPENSATION_EN ENABLE -to BCK_TX[26] -set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SWITCHING_CTRL_1ST_POST_TAP 0 -to BCK_TX[26] -set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SIGN_1ST_POST_TAP FIR_POST_1T_POS -to BCK_TX[26] - -set_instance_assignment -name IO_STANDARD "HSSI DIFFERENTIAL I/O" -to BCK_TX[27] -set_instance_assignment -name XCVR_A10_TX_VOD_OUTPUT_SWING_CTRL 30 -to BCK_TX[27] -set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to BCK_TX[27] -set_instance_assignment -name XCVR_A10_TX_COMPENSATION_EN ENABLE -to BCK_TX[27] -set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SWITCHING_CTRL_1ST_POST_TAP 0 -to BCK_TX[27] -set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SIGN_1ST_POST_TAP FIR_POST_1T_POS -to BCK_TX[27] - -set_instance_assignment -name IO_STANDARD "HSSI DIFFERENTIAL I/O" -to BCK_TX[28] -set_instance_assignment -name XCVR_A10_TX_VOD_OUTPUT_SWING_CTRL 30 -to BCK_TX[28] -set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to BCK_TX[28] -set_instance_assignment -name XCVR_A10_TX_COMPENSATION_EN ENABLE -to BCK_TX[28] -set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SWITCHING_CTRL_1ST_POST_TAP 0 -to BCK_TX[28] -set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SIGN_1ST_POST_TAP FIR_POST_1T_POS -to BCK_TX[28] - -set_instance_assignment -name IO_STANDARD "HSSI DIFFERENTIAL I/O" -to BCK_TX[29] -set_instance_assignment -name XCVR_A10_TX_VOD_OUTPUT_SWING_CTRL 30 -to BCK_TX[29] -set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to BCK_TX[29] -set_instance_assignment -name XCVR_A10_TX_COMPENSATION_EN ENABLE -to BCK_TX[29] -set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SWITCHING_CTRL_1ST_POST_TAP 0 -to BCK_TX[29] -set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SIGN_1ST_POST_TAP FIR_POST_1T_POS -to BCK_TX[29] - -set_instance_assignment -name IO_STANDARD "HSSI DIFFERENTIAL I/O" -to BCK_TX[30] -set_instance_assignment -name XCVR_A10_TX_VOD_OUTPUT_SWING_CTRL 30 -to BCK_TX[30] -set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to BCK_TX[30] -set_instance_assignment -name XCVR_A10_TX_COMPENSATION_EN ENABLE -to BCK_TX[30] -set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SWITCHING_CTRL_1ST_POST_TAP 0 -to BCK_TX[30] -set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SIGN_1ST_POST_TAP FIR_POST_1T_POS -to BCK_TX[30] - -set_instance_assignment -name IO_STANDARD "HSSI DIFFERENTIAL I/O" -to BCK_TX[31] -set_instance_assignment -name XCVR_A10_TX_VOD_OUTPUT_SWING_CTRL 30 -to BCK_TX[31] -set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to BCK_TX[31] -set_instance_assignment -name XCVR_A10_TX_COMPENSATION_EN ENABLE -to BCK_TX[31] -set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SWITCHING_CTRL_1ST_POST_TAP 0 -to BCK_TX[31] -set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SIGN_1ST_POST_TAP FIR_POST_1T_POS -to BCK_TX[31] - -set_instance_assignment -name IO_STANDARD "HSSI DIFFERENTIAL I/O" -to BCK_TX[32] -set_instance_assignment -name XCVR_A10_TX_VOD_OUTPUT_SWING_CTRL 30 -to BCK_TX[32] -set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to BCK_TX[32] -set_instance_assignment -name XCVR_A10_TX_COMPENSATION_EN ENABLE -to BCK_TX[32] -set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SWITCHING_CTRL_1ST_POST_TAP 0 -to BCK_TX[32] -set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SIGN_1ST_POST_TAP FIR_POST_1T_POS -to BCK_TX[32] - -set_instance_assignment -name IO_STANDARD "HSSI DIFFERENTIAL I/O" -to BCK_TX[33] -set_instance_assignment -name XCVR_A10_TX_VOD_OUTPUT_SWING_CTRL 30 -to BCK_TX[33] -set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to BCK_TX[33] -set_instance_assignment -name XCVR_A10_TX_COMPENSATION_EN ENABLE -to BCK_TX[33] -set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SWITCHING_CTRL_1ST_POST_TAP 0 -to BCK_TX[33] -set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SIGN_1ST_POST_TAP FIR_POST_1T_POS -to BCK_TX[33] - -set_instance_assignment -name IO_STANDARD "HSSI DIFFERENTIAL I/O" -to BCK_TX[34] -set_instance_assignment -name XCVR_A10_TX_VOD_OUTPUT_SWING_CTRL 30 -to BCK_TX[34] -set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to BCK_TX[34] -set_instance_assignment -name XCVR_A10_TX_COMPENSATION_EN ENABLE -to BCK_TX[34] -set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SWITCHING_CTRL_1ST_POST_TAP 0 -to BCK_TX[34] -set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SIGN_1ST_POST_TAP FIR_POST_1T_POS -to BCK_TX[34] - -set_instance_assignment -name IO_STANDARD "HSSI DIFFERENTIAL I/O" -to BCK_TX[35] -set_instance_assignment -name XCVR_A10_TX_VOD_OUTPUT_SWING_CTRL 30 -to BCK_TX[35] -set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to BCK_TX[35] -set_instance_assignment -name XCVR_A10_TX_COMPENSATION_EN ENABLE -to BCK_TX[35] -set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SWITCHING_CTRL_1ST_POST_TAP 0 -to BCK_TX[35] -set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SIGN_1ST_POST_TAP FIR_POST_1T_POS -to BCK_TX[35] - -set_instance_assignment -name IO_STANDARD "HSSI DIFFERENTIAL I/O" -to BCK_TX[36] -set_instance_assignment -name XCVR_A10_TX_VOD_OUTPUT_SWING_CTRL 30 -to BCK_TX[36] -set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to BCK_TX[36] -set_instance_assignment -name XCVR_A10_TX_COMPENSATION_EN ENABLE -to BCK_TX[36] -set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SWITCHING_CTRL_1ST_POST_TAP 0 -to BCK_TX[36] -set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SIGN_1ST_POST_TAP FIR_POST_1T_POS -to BCK_TX[36] - -set_instance_assignment -name IO_STANDARD "HSSI DIFFERENTIAL I/O" -to BCK_TX[37] -set_instance_assignment -name XCVR_A10_TX_VOD_OUTPUT_SWING_CTRL 30 -to BCK_TX[37] -set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to BCK_TX[37] -set_instance_assignment -name XCVR_A10_TX_COMPENSATION_EN ENABLE -to BCK_TX[37] -set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SWITCHING_CTRL_1ST_POST_TAP 0 -to BCK_TX[37] -set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SIGN_1ST_POST_TAP FIR_POST_1T_POS -to BCK_TX[37] - -set_instance_assignment -name IO_STANDARD "HSSI DIFFERENTIAL I/O" -to BCK_TX[38] -set_instance_assignment -name XCVR_A10_TX_VOD_OUTPUT_SWING_CTRL 30 -to BCK_TX[38] -set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to BCK_TX[38] -set_instance_assignment -name XCVR_A10_TX_COMPENSATION_EN ENABLE -to BCK_TX[38] -set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SWITCHING_CTRL_1ST_POST_TAP 0 -to BCK_TX[38] -set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SIGN_1ST_POST_TAP FIR_POST_1T_POS -to BCK_TX[38] - -set_instance_assignment -name IO_STANDARD "HSSI DIFFERENTIAL I/O" -to BCK_TX[39] -set_instance_assignment -name XCVR_A10_TX_VOD_OUTPUT_SWING_CTRL 30 -to BCK_TX[39] -set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to BCK_TX[39] -set_instance_assignment -name XCVR_A10_TX_COMPENSATION_EN ENABLE -to BCK_TX[39] -set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SWITCHING_CTRL_1ST_POST_TAP 0 -to BCK_TX[39] -set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SIGN_1ST_POST_TAP FIR_POST_1T_POS -to BCK_TX[39] - -set_instance_assignment -name IO_STANDARD "HSSI DIFFERENTIAL I/O" -to BCK_TX[40] -set_instance_assignment -name XCVR_A10_TX_VOD_OUTPUT_SWING_CTRL 30 -to BCK_TX[40] -set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to BCK_TX[40] -set_instance_assignment -name XCVR_A10_TX_COMPENSATION_EN ENABLE -to BCK_TX[40] -set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SWITCHING_CTRL_1ST_POST_TAP 0 -to BCK_TX[40] -set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SIGN_1ST_POST_TAP FIR_POST_1T_POS -to BCK_TX[40] - -set_instance_assignment -name IO_STANDARD "HSSI DIFFERENTIAL I/O" -to BCK_TX[41] -set_instance_assignment -name XCVR_A10_TX_VOD_OUTPUT_SWING_CTRL 30 -to BCK_TX[41] -set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to BCK_TX[41] -set_instance_assignment -name XCVR_A10_TX_COMPENSATION_EN ENABLE -to BCK_TX[41] -set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SWITCHING_CTRL_1ST_POST_TAP 0 -to BCK_TX[41] -set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SIGN_1ST_POST_TAP FIR_POST_1T_POS -to BCK_TX[41] - -set_instance_assignment -name IO_STANDARD "HSSI DIFFERENTIAL I/O" -to BCK_TX[42] -set_instance_assignment -name XCVR_A10_TX_VOD_OUTPUT_SWING_CTRL 30 -to BCK_TX[42] -set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to BCK_TX[42] -set_instance_assignment -name XCVR_A10_TX_COMPENSATION_EN ENABLE -to BCK_TX[42] -set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SWITCHING_CTRL_1ST_POST_TAP 0 -to BCK_TX[42] -set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SIGN_1ST_POST_TAP FIR_POST_1T_POS -to BCK_TX[42] - -set_instance_assignment -name IO_STANDARD "HSSI DIFFERENTIAL I/O" -to BCK_TX[43] -set_instance_assignment -name XCVR_A10_TX_VOD_OUTPUT_SWING_CTRL 30 -to BCK_TX[43] -set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to BCK_TX[43] -set_instance_assignment -name XCVR_A10_TX_COMPENSATION_EN ENABLE -to BCK_TX[43] -set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SWITCHING_CTRL_1ST_POST_TAP 0 -to BCK_TX[43] -set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SIGN_1ST_POST_TAP FIR_POST_1T_POS -to BCK_TX[43] - -set_instance_assignment -name IO_STANDARD "HSSI DIFFERENTIAL I/O" -to BCK_TX[44] -set_instance_assignment -name XCVR_A10_TX_VOD_OUTPUT_SWING_CTRL 30 -to BCK_TX[44] -set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to BCK_TX[44] -set_instance_assignment -name XCVR_A10_TX_COMPENSATION_EN ENABLE -to BCK_TX[44] -set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SWITCHING_CTRL_1ST_POST_TAP 0 -to BCK_TX[44] -set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SIGN_1ST_POST_TAP FIR_POST_1T_POS -to BCK_TX[44] - -set_instance_assignment -name IO_STANDARD "HSSI DIFFERENTIAL I/O" -to BCK_TX[45] -set_instance_assignment -name XCVR_A10_TX_VOD_OUTPUT_SWING_CTRL 30 -to BCK_TX[45] -set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to BCK_TX[45] -set_instance_assignment -name XCVR_A10_TX_COMPENSATION_EN ENABLE -to BCK_TX[45] -set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SWITCHING_CTRL_1ST_POST_TAP 0 -to BCK_TX[45] -set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SIGN_1ST_POST_TAP FIR_POST_1T_POS -to BCK_TX[45] - -set_instance_assignment -name IO_STANDARD "HSSI DIFFERENTIAL I/O" -to BCK_TX[46] -set_instance_assignment -name XCVR_A10_TX_VOD_OUTPUT_SWING_CTRL 30 -to BCK_TX[46] -set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to BCK_TX[46] -set_instance_assignment -name XCVR_A10_TX_COMPENSATION_EN ENABLE -to BCK_TX[46] -set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SWITCHING_CTRL_1ST_POST_TAP 0 -to BCK_TX[46] -set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SIGN_1ST_POST_TAP FIR_POST_1T_POS -to BCK_TX[46] - -set_instance_assignment -name IO_STANDARD "HSSI DIFFERENTIAL I/O" -to BCK_TX[47] -set_instance_assignment -name XCVR_A10_TX_VOD_OUTPUT_SWING_CTRL 30 -to BCK_TX[47] -set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to BCK_TX[47] -set_instance_assignment -name XCVR_A10_TX_COMPENSATION_EN ENABLE -to BCK_TX[47] -set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SWITCHING_CTRL_1ST_POST_TAP 0 -to BCK_TX[47] -set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SIGN_1ST_POST_TAP FIR_POST_1T_POS -to BCK_TX[47] - - -# Substitute new signal names from the jesd_simple design -#set_location_assignment PIN_BA7 -to BCK_RX[0] - -set_instance_assignment -name IO_STANDARD LVDS -to BCK_REF_CLK -set_instance_assignment -name IO_STANDARD LVDS -to "BCK_REF_CLK(n)" -set_instance_assignment -name XCVR_A10_RX_TERM_SEL R_R1 -to BCK_REF_CLK -set_location_assignment PIN_V9 -to BCK_REF_CLK -set_location_assignment PIN_V10 -to "BCK_REF_CLK(n)" - -set_location_assignment PIN_V12 -to JESD204B_SYSREF -set_instance_assignment -name IO_STANDARD "1.8 V" -to JESD204B_SYSREF - -set_location_assignment PIN_U12 -to JESD204B_SYNC_N[0] -set_instance_assignment -name IO_STANDARD "1.8 V" -to JESD204B_SYNC_N[0] -set_location_assignment PIN_U14 -to JESD204B_SYNC_N[1] -set_instance_assignment -name IO_STANDARD "1.8 V" -to JESD204B_SYNC_N[1] diff --git a/applications/lofar2/designs/lofar2_unb2b_sdp_station/quartus/lofar2_unb2b_sdp_station_ring_pins.tcl b/applications/lofar2/designs/lofar2_unb2b_sdp_station/quartus/lofar2_unb2b_sdp_station_ring_pins.tcl index 748bc03e9fe88d28b0ff06e1824c539e1813f286..4501f2eb662068aa7a8d5bb523615787d5b4c6fe 100644 --- a/applications/lofar2/designs/lofar2_unb2b_sdp_station/quartus/lofar2_unb2b_sdp_station_ring_pins.tcl +++ b/applications/lofar2/designs/lofar2_unb2b_sdp_station/quartus/lofar2_unb2b_sdp_station_ring_pins.tcl @@ -89,27 +89,27 @@ set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SWITCHING_CTRL_1ST_POST_TAP 0 set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SIGN_1ST_POST_TAP FIR_POST_1T_POS -to QSFP_0_TX[2] ### QSFP_0_3 For ring -set_instance_assignment -name IO_STANDARD "HSSI DIFFERENTIAL I/O" -to QSFP_0_RX[3] -set_instance_assignment -name XCVR_A10_RX_TERM_SEL R_R1 -to QSFP_0_RX[3] -set_instance_assignment -name XCVR_A10_RX_ADP_DFE_FXTAP5 RADP_DFE_FXTAP5_0 -to QSFP_0_RX[3] -set_instance_assignment -name XCVR_A10_RX_ADP_DFE_FXTAP4 RADP_DFE_FXTAP4_0 -to QSFP_0_RX[3] -set_instance_assignment -name XCVR_A10_RX_ADP_DFE_FXTAP1 RADP_DFE_FXTAP1_0 -to QSFP_0_RX[3] -set_instance_assignment -name XCVR_A10_RX_ADP_DFE_FXTAP7 RADP_DFE_FXTAP7_0 -to QSFP_0_RX[3] -set_instance_assignment -name XCVR_A10_RX_ADP_DFE_FXTAP6 RADP_DFE_FXTAP6_0 -to QSFP_0_RX[3] -set_instance_assignment -name XCVR_A10_RX_ADP_DFE_FXTAP3 RADP_DFE_FXTAP3_0 -to QSFP_0_RX[3] -set_instance_assignment -name XCVR_A10_RX_ADP_DFE_FXTAP2 RADP_DFE_FXTAP2_0 -to QSFP_0_RX[3] -set_instance_assignment -name XCVR_A10_RX_ONE_STAGE_ENABLE NON_S1_MODE -to QSFP_0_RX[3] -set_instance_assignment -name XCVR_A10_RX_ADP_CTLE_ACGAIN_4S RADP_CTLE_ACGAIN_4S_8 -to QSFP_0_RX[3] -set_instance_assignment -name XCVR_A10_RX_EQ_DC_GAIN_TRIM NO_DC_GAIN -to QSFP_0_RX[3] -set_instance_assignment -name XCVR_A10_RX_ADP_VGA_SEL RADP_VGA_SEL_5 -to QSFP_0_RX[3] -set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to QSFP_0_RX[3] - -set_instance_assignment -name IO_STANDARD "HSSI DIFFERENTIAL I/O" -to QSFP_0_TX[3] -set_instance_assignment -name XCVR_A10_TX_VOD_OUTPUT_SWING_CTRL 30 -to QSFP_0_TX[3] -set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to QSFP_0_TX[3] -set_instance_assignment -name XCVR_A10_TX_COMPENSATION_EN ENABLE -to QSFP_0_TX[3] -set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SWITCHING_CTRL_1ST_POST_TAP 0 -to QSFP_0_TX[3] -set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SIGN_1ST_POST_TAP FIR_POST_1T_POS -to QSFP_0_TX[3] +#set_instance_assignment -name IO_STANDARD "HSSI DIFFERENTIAL I/O" -to QSFP_0_RX[3] +#set_instance_assignment -name XCVR_A10_RX_TERM_SEL R_R1 -to QSFP_0_RX[3] +#set_instance_assignment -name XCVR_A10_RX_ADP_DFE_FXTAP5 RADP_DFE_FXTAP5_0 -to QSFP_0_RX[3] +#set_instance_assignment -name XCVR_A10_RX_ADP_DFE_FXTAP4 RADP_DFE_FXTAP4_0 -to QSFP_0_RX[3] +#set_instance_assignment -name XCVR_A10_RX_ADP_DFE_FXTAP1 RADP_DFE_FXTAP1_0 -to QSFP_0_RX[3] +#set_instance_assignment -name XCVR_A10_RX_ADP_DFE_FXTAP7 RADP_DFE_FXTAP7_0 -to QSFP_0_RX[3] +#set_instance_assignment -name XCVR_A10_RX_ADP_DFE_FXTAP6 RADP_DFE_FXTAP6_0 -to QSFP_0_RX[3] +#set_instance_assignment -name XCVR_A10_RX_ADP_DFE_FXTAP3 RADP_DFE_FXTAP3_0 -to QSFP_0_RX[3] +#set_instance_assignment -name XCVR_A10_RX_ADP_DFE_FXTAP2 RADP_DFE_FXTAP2_0 -to QSFP_0_RX[3] +#set_instance_assignment -name XCVR_A10_RX_ONE_STAGE_ENABLE NON_S1_MODE -to QSFP_0_RX[3] +#set_instance_assignment -name XCVR_A10_RX_ADP_CTLE_ACGAIN_4S RADP_CTLE_ACGAIN_4S_8 -to QSFP_0_RX[3] +#set_instance_assignment -name XCVR_A10_RX_EQ_DC_GAIN_TRIM NO_DC_GAIN -to QSFP_0_RX[3] +#set_instance_assignment -name XCVR_A10_RX_ADP_VGA_SEL RADP_VGA_SEL_5 -to QSFP_0_RX[3] +#set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to QSFP_0_RX[3] +# +#set_instance_assignment -name IO_STANDARD "HSSI DIFFERENTIAL I/O" -to QSFP_0_TX[3] +#set_instance_assignment -name XCVR_A10_TX_VOD_OUTPUT_SWING_CTRL 30 -to QSFP_0_TX[3] +#set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to QSFP_0_TX[3] +#set_instance_assignment -name XCVR_A10_TX_COMPENSATION_EN ENABLE -to QSFP_0_TX[3] +#set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SWITCHING_CTRL_1ST_POST_TAP 0 -to QSFP_0_TX[3] +#set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SIGN_1ST_POST_TAP FIR_POST_1T_POS -to QSFP_0_TX[3] #RING_0 RX assignments set_instance_assignment -name IO_STANDARD "HSSI DIFFERENTIAL I/O" -to RING_0_RX[0] @@ -157,20 +157,20 @@ set_instance_assignment -name XCVR_A10_RX_EQ_DC_GAIN_TRIM NO_DC_GAIN -to set_instance_assignment -name XCVR_A10_RX_ADP_VGA_SEL RADP_VGA_SEL_3 -to RING_0_RX[2] set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to RING_0_RX[2] -set_instance_assignment -name IO_STANDARD "HSSI DIFFERENTIAL I/O" -to RING_0_RX[3] -set_instance_assignment -name XCVR_A10_RX_TERM_SEL R_R1 -to RING_0_RX[3] -set_instance_assignment -name XCVR_A10_RX_ADP_DFE_FXTAP5 RADP_DFE_FXTAP5_0 -to RING_0_RX[3] -set_instance_assignment -name XCVR_A10_RX_ADP_DFE_FXTAP4 RADP_DFE_FXTAP4_0 -to RING_0_RX[3] -set_instance_assignment -name XCVR_A10_RX_ADP_DFE_FXTAP1 RADP_DFE_FXTAP1_0 -to RING_0_RX[3] -set_instance_assignment -name XCVR_A10_RX_ADP_DFE_FXTAP7 RADP_DFE_FXTAP7_0 -to RING_0_RX[3] -set_instance_assignment -name XCVR_A10_RX_ADP_DFE_FXTAP6 RADP_DFE_FXTAP6_0 -to RING_0_RX[3] -set_instance_assignment -name XCVR_A10_RX_ADP_DFE_FXTAP3 RADP_DFE_FXTAP3_0 -to RING_0_RX[3] -set_instance_assignment -name XCVR_A10_RX_ADP_DFE_FXTAP2 RADP_DFE_FXTAP2_0 -to RING_0_RX[3] -set_instance_assignment -name XCVR_A10_RX_ONE_STAGE_ENABLE NON_S1_MODE -to RING_0_RX[3] -set_instance_assignment -name XCVR_A10_RX_ADP_CTLE_ACGAIN_4S RADP_CTLE_ACGAIN_4S_12 -to RING_0_RX[3] -set_instance_assignment -name XCVR_A10_RX_EQ_DC_GAIN_TRIM NO_DC_GAIN -to RING_0_RX[3] -set_instance_assignment -name XCVR_A10_RX_ADP_VGA_SEL RADP_VGA_SEL_3 -to RING_0_RX[3] -set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to RING_0_RX[3] +#set_instance_assignment -name IO_STANDARD "HSSI DIFFERENTIAL I/O" -to RING_0_RX[3] +#set_instance_assignment -name XCVR_A10_RX_TERM_SEL R_R1 -to RING_0_RX[3] +#set_instance_assignment -name XCVR_A10_RX_ADP_DFE_FXTAP5 RADP_DFE_FXTAP5_0 -to RING_0_RX[3] +#set_instance_assignment -name XCVR_A10_RX_ADP_DFE_FXTAP4 RADP_DFE_FXTAP4_0 -to RING_0_RX[3] +#set_instance_assignment -name XCVR_A10_RX_ADP_DFE_FXTAP1 RADP_DFE_FXTAP1_0 -to RING_0_RX[3] +#set_instance_assignment -name XCVR_A10_RX_ADP_DFE_FXTAP7 RADP_DFE_FXTAP7_0 -to RING_0_RX[3] +#set_instance_assignment -name XCVR_A10_RX_ADP_DFE_FXTAP6 RADP_DFE_FXTAP6_0 -to RING_0_RX[3] +#set_instance_assignment -name XCVR_A10_RX_ADP_DFE_FXTAP3 RADP_DFE_FXTAP3_0 -to RING_0_RX[3] +#set_instance_assignment -name XCVR_A10_RX_ADP_DFE_FXTAP2 RADP_DFE_FXTAP2_0 -to RING_0_RX[3] +#set_instance_assignment -name XCVR_A10_RX_ONE_STAGE_ENABLE NON_S1_MODE -to RING_0_RX[3] +#set_instance_assignment -name XCVR_A10_RX_ADP_CTLE_ACGAIN_4S RADP_CTLE_ACGAIN_4S_12 -to RING_0_RX[3] +#set_instance_assignment -name XCVR_A10_RX_EQ_DC_GAIN_TRIM NO_DC_GAIN -to RING_0_RX[3] +#set_instance_assignment -name XCVR_A10_RX_ADP_VGA_SEL RADP_VGA_SEL_3 -to RING_0_RX[3] +#set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to RING_0_RX[3] #RING_1 RX assignments @@ -219,20 +219,20 @@ set_instance_assignment -name XCVR_A10_RX_EQ_DC_GAIN_TRIM NO_DC_GAIN -to set_instance_assignment -name XCVR_A10_RX_ADP_VGA_SEL RADP_VGA_SEL_3 -to RING_1_RX[2] set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to RING_1_RX[2] -set_instance_assignment -name IO_STANDARD "HSSI DIFFERENTIAL I/O" -to RING_1_RX[3] -set_instance_assignment -name XCVR_A10_RX_TERM_SEL R_R1 -to RING_1_RX[3] -set_instance_assignment -name XCVR_A10_RX_ADP_DFE_FXTAP5 RADP_DFE_FXTAP5_0 -to RING_1_RX[3] -set_instance_assignment -name XCVR_A10_RX_ADP_DFE_FXTAP4 RADP_DFE_FXTAP4_0 -to RING_1_RX[3] -set_instance_assignment -name XCVR_A10_RX_ADP_DFE_FXTAP1 RADP_DFE_FXTAP1_0 -to RING_1_RX[3] -set_instance_assignment -name XCVR_A10_RX_ADP_DFE_FXTAP7 RADP_DFE_FXTAP7_0 -to RING_1_RX[3] -set_instance_assignment -name XCVR_A10_RX_ADP_DFE_FXTAP6 RADP_DFE_FXTAP6_0 -to RING_1_RX[3] -set_instance_assignment -name XCVR_A10_RX_ADP_DFE_FXTAP3 RADP_DFE_FXTAP3_0 -to RING_1_RX[3] -set_instance_assignment -name XCVR_A10_RX_ADP_DFE_FXTAP2 RADP_DFE_FXTAP2_0 -to RING_1_RX[3] -set_instance_assignment -name XCVR_A10_RX_ONE_STAGE_ENABLE NON_S1_MODE -to RING_1_RX[3] -set_instance_assignment -name XCVR_A10_RX_ADP_CTLE_ACGAIN_4S RADP_CTLE_ACGAIN_4S_12 -to RING_1_RX[3] -set_instance_assignment -name XCVR_A10_RX_EQ_DC_GAIN_TRIM NO_DC_GAIN -to RING_1_RX[3] -set_instance_assignment -name XCVR_A10_RX_ADP_VGA_SEL RADP_VGA_SEL_3 -to RING_1_RX[3] -set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to RING_1_RX[3] +#set_instance_assignment -name IO_STANDARD "HSSI DIFFERENTIAL I/O" -to RING_1_RX[3] +#set_instance_assignment -name XCVR_A10_RX_TERM_SEL R_R1 -to RING_1_RX[3] +#set_instance_assignment -name XCVR_A10_RX_ADP_DFE_FXTAP5 RADP_DFE_FXTAP5_0 -to RING_1_RX[3] +#set_instance_assignment -name XCVR_A10_RX_ADP_DFE_FXTAP4 RADP_DFE_FXTAP4_0 -to RING_1_RX[3] +#set_instance_assignment -name XCVR_A10_RX_ADP_DFE_FXTAP1 RADP_DFE_FXTAP1_0 -to RING_1_RX[3] +#set_instance_assignment -name XCVR_A10_RX_ADP_DFE_FXTAP7 RADP_DFE_FXTAP7_0 -to RING_1_RX[3] +#set_instance_assignment -name XCVR_A10_RX_ADP_DFE_FXTAP6 RADP_DFE_FXTAP6_0 -to RING_1_RX[3] +#set_instance_assignment -name XCVR_A10_RX_ADP_DFE_FXTAP3 RADP_DFE_FXTAP3_0 -to RING_1_RX[3] +#set_instance_assignment -name XCVR_A10_RX_ADP_DFE_FXTAP2 RADP_DFE_FXTAP2_0 -to RING_1_RX[3] +#set_instance_assignment -name XCVR_A10_RX_ONE_STAGE_ENABLE NON_S1_MODE -to RING_1_RX[3] +#set_instance_assignment -name XCVR_A10_RX_ADP_CTLE_ACGAIN_4S RADP_CTLE_ACGAIN_4S_12 -to RING_1_RX[3] +#set_instance_assignment -name XCVR_A10_RX_EQ_DC_GAIN_TRIM NO_DC_GAIN -to RING_1_RX[3] +#set_instance_assignment -name XCVR_A10_RX_ADP_VGA_SEL RADP_VGA_SEL_3 -to RING_1_RX[3] +#set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to RING_1_RX[3] #RING_0 TX assignments @@ -257,12 +257,12 @@ set_instance_assignment -name XCVR_A10_TX_COMPENSATION_EN ENABLE -to set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SWITCHING_CTRL_1ST_POST_TAP 0 -to RING_0_TX[2] set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SIGN_1ST_POST_TAP FIR_POST_1T_POS -to RING_0_TX[2] -set_instance_assignment -name IO_STANDARD "HSSI DIFFERENTIAL I/O" -to RING_0_TX[3] -set_instance_assignment -name XCVR_A10_TX_VOD_OUTPUT_SWING_CTRL 30 -to RING_0_TX[3] -set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to RING_0_TX[3] -set_instance_assignment -name XCVR_A10_TX_COMPENSATION_EN ENABLE -to RING_0_TX[3] -set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SWITCHING_CTRL_1ST_POST_TAP 0 -to RING_0_TX[3] -set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SIGN_1ST_POST_TAP FIR_POST_1T_POS -to RING_0_TX[3] +#set_instance_assignment -name IO_STANDARD "HSSI DIFFERENTIAL I/O" -to RING_0_TX[3] +#set_instance_assignment -name XCVR_A10_TX_VOD_OUTPUT_SWING_CTRL 30 -to RING_0_TX[3] +#set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to RING_0_TX[3] +#set_instance_assignment -name XCVR_A10_TX_COMPENSATION_EN ENABLE -to RING_0_TX[3] +#set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SWITCHING_CTRL_1ST_POST_TAP 0 -to RING_0_TX[3] +#set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SIGN_1ST_POST_TAP FIR_POST_1T_POS -to RING_0_TX[3] #RING_1 TX assignments @@ -287,11 +287,11 @@ set_instance_assignment -name XCVR_A10_TX_COMPENSATION_EN ENABLE -to set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SWITCHING_CTRL_1ST_POST_TAP 0 -to RING_1_TX[2] set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SIGN_1ST_POST_TAP FIR_POST_1T_POS -to RING_1_TX[2] -set_instance_assignment -name IO_STANDARD "HSSI DIFFERENTIAL I/O" -to RING_1_TX[3] -set_instance_assignment -name XCVR_A10_TX_VOD_OUTPUT_SWING_CTRL 30 -to RING_1_TX[3] -set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to RING_1_TX[3] -set_instance_assignment -name XCVR_A10_TX_COMPENSATION_EN ENABLE -to RING_1_TX[3] -set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SWITCHING_CTRL_1ST_POST_TAP 0 -to RING_1_TX[3] -set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SIGN_1ST_POST_TAP FIR_POST_1T_POS -to RING_1_TX[3] +#set_instance_assignment -name IO_STANDARD "HSSI DIFFERENTIAL I/O" -to RING_1_TX[3] +#set_instance_assignment -name XCVR_A10_TX_VOD_OUTPUT_SWING_CTRL 30 -to RING_1_TX[3] +#set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to RING_1_TX[3] +#set_instance_assignment -name XCVR_A10_TX_COMPENSATION_EN ENABLE -to RING_1_TX[3] +#set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SWITCHING_CTRL_1ST_POST_TAP 0 -to RING_1_TX[3] +#set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SIGN_1ST_POST_TAP FIR_POST_1T_POS -to RING_1_TX[3] diff --git a/applications/lofar2/designs/lofar2_unb2b_sdp_station/revisions/lofar2_unb2b_sdp_station_adc/hdllib.cfg b/applications/lofar2/designs/lofar2_unb2b_sdp_station/revisions/lofar2_unb2b_sdp_station_adc/hdllib.cfg index 5132d4af711473771bbcd6d29950da5f88808c2e..47e72aafd1e3ef6d7f7527541f4cecfea6e7f821 100644 --- a/applications/lofar2/designs/lofar2_unb2b_sdp_station/revisions/lofar2_unb2b_sdp_station_adc/hdllib.cfg +++ b/applications/lofar2/designs/lofar2_unb2b_sdp_station/revisions/lofar2_unb2b_sdp_station_adc/hdllib.cfg @@ -32,7 +32,7 @@ quartus_sdc_files = ../../quartus/lofar2_unb2b_sdp_station.sdc quartus_tcl_files = - ../../quartus/lofar2_unb2b_sdp_station_pins.tcl + lofar2_unb2b_sdp_station_adc_pins.tcl quartus_vhdl_files = diff --git a/applications/lofar2/designs/lofar2_unb2b_sdp_station/revisions/lofar2_unb2b_sdp_station_adc/lofar2_unb2b_sdp_station_adc_pins.tcl b/applications/lofar2/designs/lofar2_unb2b_sdp_station/revisions/lofar2_unb2b_sdp_station_adc/lofar2_unb2b_sdp_station_adc_pins.tcl new file mode 100644 index 0000000000000000000000000000000000000000..1951a9467db81c29743ddc496672c7fb0f0e6b41 --- /dev/null +++ b/applications/lofar2/designs/lofar2_unb2b_sdp_station/revisions/lofar2_unb2b_sdp_station_adc/lofar2_unb2b_sdp_station_adc_pins.tcl @@ -0,0 +1,24 @@ +############################################################################### +# +# Copyright (C) 2022 +# ASTRON (Netherlands Institute for Radio Astronomy) <http://www.astron.nl/> +# P.O.Box 2, 7990 AA Dwingeloo, The Netherlands +# +# This program is free software: you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation, either version 3 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program. If not, see <http://www.gnu.org/licenses/>. +# +############################################################################### +source $::env(RADIOHDL_WORK)/applications/lofar2/designs/lofar2_unb2b_sdp_station/quartus/lofar2_unb2b_sdp_station_pins.tcl +source $::env(RADIOHDL_WORK)/applications/lofar2/designs/lofar2_unb2b_sdp_station/quartus/lofar2_unb2b_sdp_station_jesd_pins.tcl + + diff --git a/applications/lofar2/designs/lofar2_unb2b_sdp_station/revisions/lofar2_unb2b_sdp_station_bf/lofar2_unb2b_sdp_station_bf_pins.tcl b/applications/lofar2/designs/lofar2_unb2b_sdp_station/revisions/lofar2_unb2b_sdp_station_bf/lofar2_unb2b_sdp_station_bf_pins.tcl index b6ac3a835ddf345431fbe007c4b0a38db007e172..4c0efdf4ecb475bea47c7efdb0cd104a1ffaadcd 100644 --- a/applications/lofar2/designs/lofar2_unb2b_sdp_station/revisions/lofar2_unb2b_sdp_station_bf/lofar2_unb2b_sdp_station_bf_pins.tcl +++ b/applications/lofar2/designs/lofar2_unb2b_sdp_station/revisions/lofar2_unb2b_sdp_station_bf/lofar2_unb2b_sdp_station_bf_pins.tcl @@ -19,6 +19,7 @@ # ############################################################################### source $::env(RADIOHDL_WORK)/applications/lofar2/designs/lofar2_unb2b_sdp_station/quartus/lofar2_unb2b_sdp_station_pins.tcl +source $::env(RADIOHDL_WORK)/applications/lofar2/designs/lofar2_unb2b_sdp_station/quartus/lofar2_unb2b_sdp_station_jesd_pins.tcl source $::env(RADIOHDL_WORK)/applications/lofar2/designs/lofar2_unb2b_sdp_station/quartus/lofar2_unb2b_sdp_station_beamlets_pins.tcl diff --git a/applications/lofar2/designs/lofar2_unb2b_sdp_station/revisions/lofar2_unb2b_sdp_station_fsub/hdllib.cfg b/applications/lofar2/designs/lofar2_unb2b_sdp_station/revisions/lofar2_unb2b_sdp_station_fsub/hdllib.cfg index 7f07d67e74698c4b31369c7ae28cf4163de9edca..a44d4c512bf8c128077ea7ac257068af6286b2a2 100644 --- a/applications/lofar2/designs/lofar2_unb2b_sdp_station/revisions/lofar2_unb2b_sdp_station_fsub/hdllib.cfg +++ b/applications/lofar2/designs/lofar2_unb2b_sdp_station/revisions/lofar2_unb2b_sdp_station_fsub/hdllib.cfg @@ -39,7 +39,7 @@ quartus_sdc_files = #$RADIOHDL_WORK/boards/uniboard2b/libraries/unb2b_board/quartus/unb2b_board.sdc quartus_tcl_files = - ../../quartus/lofar2_unb2b_sdp_station_pins.tcl + lofar2_unb2b_sdp_station_fsub_pins.tcl quartus_vhdl_files = diff --git a/applications/lofar2/designs/lofar2_unb2b_sdp_station/revisions/lofar2_unb2b_sdp_station_fsub/lofar2_unb2b_sdp_station_fsub_pins.tcl b/applications/lofar2/designs/lofar2_unb2b_sdp_station/revisions/lofar2_unb2b_sdp_station_fsub/lofar2_unb2b_sdp_station_fsub_pins.tcl new file mode 100644 index 0000000000000000000000000000000000000000..1951a9467db81c29743ddc496672c7fb0f0e6b41 --- /dev/null +++ b/applications/lofar2/designs/lofar2_unb2b_sdp_station/revisions/lofar2_unb2b_sdp_station_fsub/lofar2_unb2b_sdp_station_fsub_pins.tcl @@ -0,0 +1,24 @@ +############################################################################### +# +# Copyright (C) 2022 +# ASTRON (Netherlands Institute for Radio Astronomy) <http://www.astron.nl/> +# P.O.Box 2, 7990 AA Dwingeloo, The Netherlands +# +# This program is free software: you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation, either version 3 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program. If not, see <http://www.gnu.org/licenses/>. +# +############################################################################### +source $::env(RADIOHDL_WORK)/applications/lofar2/designs/lofar2_unb2b_sdp_station/quartus/lofar2_unb2b_sdp_station_pins.tcl +source $::env(RADIOHDL_WORK)/applications/lofar2/designs/lofar2_unb2b_sdp_station/quartus/lofar2_unb2b_sdp_station_jesd_pins.tcl + + diff --git a/applications/lofar2/designs/lofar2_unb2b_sdp_station/revisions/lofar2_unb2b_sdp_station_full/lofar2_unb2b_sdp_station_full.vhd b/applications/lofar2/designs/lofar2_unb2b_sdp_station/revisions/lofar2_unb2b_sdp_station_full/lofar2_unb2b_sdp_station_full.vhd index 43623ac2bc174a5aaa9ff1106c4315e37ff26849..e89d875b7b5b62e35fc228473a088f0da4017afd 100644 --- a/applications/lofar2/designs/lofar2_unb2b_sdp_station/revisions/lofar2_unb2b_sdp_station_full/lofar2_unb2b_sdp_station_full.vhd +++ b/applications/lofar2/designs/lofar2_unb2b_sdp_station/revisions/lofar2_unb2b_sdp_station_full/lofar2_unb2b_sdp_station_full.vhd @@ -23,7 +23,7 @@ -- Wrapper for Lofar2 SDP Station full design -- Description: -- Unb2b version for lab testing --- Contains complete SDP station design with AIT input stage with 12 ADC streams, FSUB, XSUB and BF +-- Contains complete SDP station design with AIT input stage with 12 ADC streams, FSUB, XSUB, BF and RING LIBRARY IEEE, common_lib, unb2b_board_lib, technology_lib, diag_lib, dp_lib, tech_jesd204b_lib, lofar2_unb2b_sdp_station_lib; @@ -76,13 +76,22 @@ ENTITY lofar2_unb2b_sdp_station_full IS -- Transceiver clocks SA_CLK : IN STD_LOGIC := '0'; -- Clock 10GbE front (qsfp) and ring lines - -- front transceivers + -- front transceivers QSFP0 for Ring. + QSFP_0_RX : IN STD_LOGIC_VECTOR(c_unb2b_board_tr_qsfp.bus_w-1 downto 0) := (OTHERS=>'0'); + QSFP_0_TX : OUT STD_LOGIC_VECTOR(c_unb2b_board_tr_qsfp.bus_w-1 downto 0); + + -- front transceivers QSFP1 for 10GbE output to CEP. QSFP_1_RX : IN STD_LOGIC_VECTOR(c_unb2b_board_tr_qsfp.bus_w-1 downto 0) := (OTHERS=>'0'); QSFP_1_TX : OUT STD_LOGIC_VECTOR(c_unb2b_board_tr_qsfp.bus_w-1 downto 0); - -- LEDs QSFP_LED : OUT STD_LOGIC_VECTOR(c_unb2b_board_tr_qsfp_nof_leds-1 DOWNTO 0); + -- ring transceivers + RING_0_RX : IN STD_LOGIC_VECTOR(c_unb2b_board_tr_qsfp.bus_w-1 DOWNTO 0) := (OTHERS => '0'); -- Using qsfp bus width also for ring interfaces + RING_0_TX : OUT STD_LOGIC_VECTOR(c_unb2b_board_tr_qsfp.bus_w-1 DOWNTO 0); + RING_1_RX : IN STD_LOGIC_VECTOR(c_unb2b_board_tr_qsfp.bus_w-1 DOWNTO 0) := (OTHERS=>'0'); + RING_1_TX : OUT STD_LOGIC_VECTOR(c_unb2b_board_tr_qsfp.bus_w-1 DOWNTO 0); + -- back transceivers (note only 6 are used in unb2b) BCK_RX : IN STD_LOGIC_VECTOR(c_unb2b_board_nof_tr_jesd204b + c_unb2b_board_start_tr_jesd204b-1 downto c_unb2b_board_nof_tr_jesd204b); -- c_unb2b_board_nof_tr_jesd204b = 6, c_sdp_S_pn = 12 BCK_REF_CLK : IN STD_LOGIC; -- Use as JESD204B_REFCLK @@ -159,13 +168,22 @@ BEGIN -- Transceiver clocks SA_CLK => SA_CLK, - -- front transceivers + -- front transceivers QSFP0 for Ring. + QSFP_0_RX => QSFP_0_RX, + QSFP_0_TX => QSFP_0_TX, + + -- front transceivers QSFP1 for 10GbE output to CEP. QSFP_1_RX => QSFP_1_RX, QSFP_1_TX => QSFP_1_TX, - -- LEDs QSFP_LED => QSFP_LED, + -- ring transceivers + RING_0_RX => RING_0_RX, + RING_0_TX => RING_0_TX, + RING_1_RX => RING_1_RX, + RING_1_TX => RING_1_TX, + -- back transceivers JESD204B_SERIAL_DATA => JESD204B_SERIAL_DATA, JESD204B_REFCLK => JESD204B_REFCLK, diff --git a/applications/lofar2/designs/lofar2_unb2b_sdp_station/revisions/lofar2_unb2b_sdp_station_full/lofar2_unb2b_sdp_station_full_pins.tcl b/applications/lofar2/designs/lofar2_unb2b_sdp_station/revisions/lofar2_unb2b_sdp_station_full/lofar2_unb2b_sdp_station_full_pins.tcl index 689b010fb83a0f4df276dd070b6e8cc383755595..b85bc78b08035457af0eed4a6fae25007a1f4bef 100644 --- a/applications/lofar2/designs/lofar2_unb2b_sdp_station/revisions/lofar2_unb2b_sdp_station_full/lofar2_unb2b_sdp_station_full_pins.tcl +++ b/applications/lofar2/designs/lofar2_unb2b_sdp_station/revisions/lofar2_unb2b_sdp_station_full/lofar2_unb2b_sdp_station_full_pins.tcl @@ -19,6 +19,7 @@ # ############################################################################### source $::env(RADIOHDL_WORK)/applications/lofar2/designs/lofar2_unb2b_sdp_station/quartus/lofar2_unb2b_sdp_station_pins.tcl +source $::env(RADIOHDL_WORK)/applications/lofar2/designs/lofar2_unb2b_sdp_station/quartus/lofar2_unb2b_sdp_station_jesd_pins.tcl source $::env(RADIOHDL_WORK)/applications/lofar2/designs/lofar2_unb2b_sdp_station/quartus/lofar2_unb2b_sdp_station_ring_pins.tcl source $::env(RADIOHDL_WORK)/applications/lofar2/designs/lofar2_unb2b_sdp_station/quartus/lofar2_unb2b_sdp_station_beamlets_pins.tcl diff --git a/applications/lofar2/designs/lofar2_unb2b_sdp_station/revisions/lofar2_unb2b_sdp_station_full_wg/hdllib.cfg b/applications/lofar2/designs/lofar2_unb2b_sdp_station/revisions/lofar2_unb2b_sdp_station_full_wg/hdllib.cfg new file mode 100644 index 0000000000000000000000000000000000000000..8c6453b5bb4a43f992e2397e5e589081dc3fe6fd --- /dev/null +++ b/applications/lofar2/designs/lofar2_unb2b_sdp_station/revisions/lofar2_unb2b_sdp_station_full_wg/hdllib.cfg @@ -0,0 +1,131 @@ +hdl_lib_name = lofar2_unb2b_sdp_station_full_wg +hdl_library_clause_name = lofar2_unb2b_sdp_station_full_wg_lib +hdl_lib_uses_synth = common mm technology unb2b_board lofar2_unb2b_sdp_station +hdl_lib_uses_sim = eth +hdl_lib_technology = ip_arria10_e1sg + + synth_files = + lofar2_unb2b_sdp_station_full_wg.vhd + +test_bench_files = + +regression_test_vhdl = + +[modelsim_project_file] +modelsim_copy_files = + ../../src/data data + $RADIOHDL_WORK/libraries/dsp/filter/src/hex data # FIR filter coefficients + # Overwrite bf weights with sim data + ../../tb/data data + +[quartus_project_file] +synth_top_level_entity = + +quartus_copy_files = + # Note: path $RADIOHDL_WORK is equivalent to relative path ../../../../../../ + ../../quartus . + ../../src/data data + $RADIOHDL_WORK/libraries/dsp/filter/src/hex data # FIR filter coefficients + +quartus_qsf_files = + $RADIOHDL_WORK/boards/uniboard2b/libraries/unb2b_board/quartus/unb2b_board.qsf + +# use lofar2_unb2b_sdp_station.sdc instead because BCK_REF_CLK is 200MHz, not 644.33MHz. +quartus_sdc_files = + ../../quartus/lofar2_unb2b_sdp_station.sdc + #$RADIOHDL_WORK/boards/uniboard2b/libraries/unb2b_board/quartus/unb2b_board.sdc + +quartus_tcl_files = + lofar2_unb2b_sdp_station_full_wg_pins.tcl + +quartus_vhdl_files = + +quartus_qip_files = + $RADIOHDL_BUILD_DIR/unb2b/quartus/lofar2_unb2b_sdp_station_full_wg/qsys_lofar2_unb2b_sdp_station/qsys_lofar2_unb2b_sdp_station.qip + +quartus_ip_files = + $RADIOHDL_BUILD_DIR/unb2b/quartus/lofar2_unb2b_sdp_station/ip/qsys_lofar2_unb2b_sdp_station/qsys_lofar2_unb2b_sdp_station_avs_common_mm_0.ip + $RADIOHDL_BUILD_DIR/unb2b/quartus/lofar2_unb2b_sdp_station/ip/qsys_lofar2_unb2b_sdp_station/qsys_lofar2_unb2b_sdp_station_avs_common_mm_1.ip + $RADIOHDL_BUILD_DIR/unb2b/quartus/lofar2_unb2b_sdp_station/ip/qsys_lofar2_unb2b_sdp_station/qsys_lofar2_unb2b_sdp_station_avs_eth_0.ip + $RADIOHDL_BUILD_DIR/unb2b/quartus/lofar2_unb2b_sdp_station/ip/qsys_lofar2_unb2b_sdp_station/qsys_lofar2_unb2b_sdp_station_clk_0.ip + $RADIOHDL_BUILD_DIR/unb2b/quartus/lofar2_unb2b_sdp_station/ip/qsys_lofar2_unb2b_sdp_station/qsys_lofar2_unb2b_sdp_station_cpu_0.ip + $RADIOHDL_BUILD_DIR/unb2b/quartus/lofar2_unb2b_sdp_station/ip/qsys_lofar2_unb2b_sdp_station/qsys_lofar2_unb2b_sdp_station_jesd204b.ip + $RADIOHDL_BUILD_DIR/unb2b/quartus/lofar2_unb2b_sdp_station/ip/qsys_lofar2_unb2b_sdp_station/qsys_lofar2_unb2b_sdp_station_jtag_uart_0.ip + $RADIOHDL_BUILD_DIR/unb2b/quartus/lofar2_unb2b_sdp_station/ip/qsys_lofar2_unb2b_sdp_station/qsys_lofar2_unb2b_sdp_station_onchip_memory2_0.ip + $RADIOHDL_BUILD_DIR/unb2b/quartus/lofar2_unb2b_sdp_station/ip/qsys_lofar2_unb2b_sdp_station/qsys_lofar2_unb2b_sdp_station_pio_jesd_ctrl.ip + $RADIOHDL_BUILD_DIR/unb2b/quartus/lofar2_unb2b_sdp_station/ip/qsys_lofar2_unb2b_sdp_station/qsys_lofar2_unb2b_sdp_station_pio_pps.ip + $RADIOHDL_BUILD_DIR/unb2b/quartus/lofar2_unb2b_sdp_station/ip/qsys_lofar2_unb2b_sdp_station/qsys_lofar2_unb2b_sdp_station_pio_system_info.ip + $RADIOHDL_BUILD_DIR/unb2b/quartus/lofar2_unb2b_sdp_station/ip/qsys_lofar2_unb2b_sdp_station/qsys_lofar2_unb2b_sdp_station_pio_wdi.ip + $RADIOHDL_BUILD_DIR/unb2b/quartus/lofar2_unb2b_sdp_station/ip/qsys_lofar2_unb2b_sdp_station/qsys_lofar2_unb2b_sdp_station_ram_bf_weights.ip + $RADIOHDL_BUILD_DIR/unb2b/quartus/lofar2_unb2b_sdp_station/ip/qsys_lofar2_unb2b_sdp_station/qsys_lofar2_unb2b_sdp_station_ram_diag_data_buffer_bsn.ip + $RADIOHDL_BUILD_DIR/unb2b/quartus/lofar2_unb2b_sdp_station/ip/qsys_lofar2_unb2b_sdp_station/qsys_lofar2_unb2b_sdp_station_ram_equalizer_gains.ip + $RADIOHDL_BUILD_DIR/unb2b/quartus/lofar2_unb2b_sdp_station/ip/qsys_lofar2_unb2b_sdp_station/qsys_lofar2_unb2b_sdp_station_ram_fil_coefs.ip + $RADIOHDL_BUILD_DIR/unb2b/quartus/lofar2_unb2b_sdp_station/ip/qsys_lofar2_unb2b_sdp_station/qsys_lofar2_unb2b_sdp_station_ram_scrap.ip + $RADIOHDL_BUILD_DIR/unb2b/quartus/lofar2_unb2b_sdp_station/ip/qsys_lofar2_unb2b_sdp_station/qsys_lofar2_unb2b_sdp_station_ram_ss_ss_wide.ip + $RADIOHDL_BUILD_DIR/unb2b/quartus/lofar2_unb2b_sdp_station/ip/qsys_lofar2_unb2b_sdp_station/qsys_lofar2_unb2b_sdp_station_ram_st_bst.ip + $RADIOHDL_BUILD_DIR/unb2b/quartus/lofar2_unb2b_sdp_station/ip/qsys_lofar2_unb2b_sdp_station/qsys_lofar2_unb2b_sdp_station_ram_st_histogram.ip + $RADIOHDL_BUILD_DIR/unb2b/quartus/lofar2_unb2b_sdp_station/ip/qsys_lofar2_unb2b_sdp_station/qsys_lofar2_unb2b_sdp_station_ram_st_sst.ip + $RADIOHDL_BUILD_DIR/unb2b/quartus/lofar2_unb2b_sdp_station/ip/qsys_lofar2_unb2b_sdp_station/qsys_lofar2_unb2b_sdp_station_ram_st_xsq.ip + $RADIOHDL_BUILD_DIR/unb2b/quartus/lofar2_unb2b_sdp_station/ip/qsys_lofar2_unb2b_sdp_station/qsys_lofar2_unb2b_sdp_station_ram_wg.ip + $RADIOHDL_BUILD_DIR/unb2b/quartus/lofar2_unb2b_sdp_station/ip/qsys_lofar2_unb2b_sdp_station/qsys_lofar2_unb2b_sdp_station_reg_aduh_monitor.ip + $RADIOHDL_BUILD_DIR/unb2b/quartus/lofar2_unb2b_sdp_station/ip/qsys_lofar2_unb2b_sdp_station/qsys_lofar2_unb2b_sdp_station_reg_bf_scale.ip + $RADIOHDL_BUILD_DIR/unb2b/quartus/lofar2_unb2b_sdp_station/ip/qsys_lofar2_unb2b_sdp_station/qsys_lofar2_unb2b_sdp_station_reg_bsn_align_v2_bf.ip + $RADIOHDL_BUILD_DIR/unb2b/quartus/lofar2_unb2b_sdp_station/ip/qsys_lofar2_unb2b_sdp_station/qsys_lofar2_unb2b_sdp_station_reg_bsn_align_v2_xsub.ip + $RADIOHDL_BUILD_DIR/unb2b/quartus/lofar2_unb2b_sdp_station/ip/qsys_lofar2_unb2b_sdp_station/qsys_lofar2_unb2b_sdp_station_reg_bsn_monitor_input.ip + $RADIOHDL_BUILD_DIR/unb2b/quartus/lofar2_unb2b_sdp_station/ip/qsys_lofar2_unb2b_sdp_station/qsys_lofar2_unb2b_sdp_station_reg_bsn_monitor_v2_aligned_bf.ip + $RADIOHDL_BUILD_DIR/unb2b/quartus/lofar2_unb2b_sdp_station/ip/qsys_lofar2_unb2b_sdp_station/qsys_lofar2_unb2b_sdp_station_reg_bsn_monitor_v2_aligned_xsub.ip + $RADIOHDL_BUILD_DIR/unb2b/quartus/lofar2_unb2b_sdp_station/ip/qsys_lofar2_unb2b_sdp_station/qsys_lofar2_unb2b_sdp_station_reg_bsn_monitor_v2_beamlet_output.ip + $RADIOHDL_BUILD_DIR/unb2b/quartus/lofar2_unb2b_sdp_station/ip/qsys_lofar2_unb2b_sdp_station/qsys_lofar2_unb2b_sdp_station_reg_bsn_monitor_v2_bst_offload.ip + $RADIOHDL_BUILD_DIR/unb2b/quartus/lofar2_unb2b_sdp_station/ip/qsys_lofar2_unb2b_sdp_station/qsys_lofar2_unb2b_sdp_station_reg_bsn_monitor_v2_ring_rx_bf.ip + $RADIOHDL_BUILD_DIR/unb2b/quartus/lofar2_unb2b_sdp_station/ip/qsys_lofar2_unb2b_sdp_station/qsys_lofar2_unb2b_sdp_station_reg_bsn_monitor_v2_ring_rx_xst.ip + $RADIOHDL_BUILD_DIR/unb2b/quartus/lofar2_unb2b_sdp_station/ip/qsys_lofar2_unb2b_sdp_station/qsys_lofar2_unb2b_sdp_station_reg_bsn_monitor_v2_ring_tx_bf.ip + $RADIOHDL_BUILD_DIR/unb2b/quartus/lofar2_unb2b_sdp_station/ip/qsys_lofar2_unb2b_sdp_station/qsys_lofar2_unb2b_sdp_station_reg_bsn_monitor_v2_ring_tx_xst.ip + $RADIOHDL_BUILD_DIR/unb2b/quartus/lofar2_unb2b_sdp_station/ip/qsys_lofar2_unb2b_sdp_station/qsys_lofar2_unb2b_sdp_station_reg_bsn_monitor_v2_rx_align_bf.ip + $RADIOHDL_BUILD_DIR/unb2b/quartus/lofar2_unb2b_sdp_station/ip/qsys_lofar2_unb2b_sdp_station/qsys_lofar2_unb2b_sdp_station_reg_bsn_monitor_v2_rx_align_xsub.ip + $RADIOHDL_BUILD_DIR/unb2b/quartus/lofar2_unb2b_sdp_station/ip/qsys_lofar2_unb2b_sdp_station/qsys_lofar2_unb2b_sdp_station_reg_bsn_monitor_v2_sst_offload.ip + $RADIOHDL_BUILD_DIR/unb2b/quartus/lofar2_unb2b_sdp_station/ip/qsys_lofar2_unb2b_sdp_station/qsys_lofar2_unb2b_sdp_station_reg_bsn_monitor_v2_xst_offload.ip + $RADIOHDL_BUILD_DIR/unb2b/quartus/lofar2_unb2b_sdp_station/ip/qsys_lofar2_unb2b_sdp_station/qsys_lofar2_unb2b_sdp_station_reg_bsn_scheduler.ip + $RADIOHDL_BUILD_DIR/unb2b/quartus/lofar2_unb2b_sdp_station/ip/qsys_lofar2_unb2b_sdp_station/qsys_lofar2_unb2b_sdp_station_reg_bsn_source_v2.ip + $RADIOHDL_BUILD_DIR/unb2b/quartus/lofar2_unb2b_sdp_station/ip/qsys_lofar2_unb2b_sdp_station/qsys_lofar2_unb2b_sdp_station_reg_bsn_sync_scheduler_xsub.ip + $RADIOHDL_BUILD_DIR/unb2b/quartus/lofar2_unb2b_sdp_station/ip/qsys_lofar2_unb2b_sdp_station/qsys_lofar2_unb2b_sdp_station_reg_crosslets_info.ip + $RADIOHDL_BUILD_DIR/unb2b/quartus/lofar2_unb2b_sdp_station/ip/qsys_lofar2_unb2b_sdp_station/qsys_lofar2_unb2b_sdp_station_reg_diag_data_buffer_bsn.ip + $RADIOHDL_BUILD_DIR/unb2b/quartus/lofar2_unb2b_sdp_station/ip/qsys_lofar2_unb2b_sdp_station/qsys_lofar2_unb2b_sdp_station_reg_dp_block_validate_bsn_at_sync_bf.ip + $RADIOHDL_BUILD_DIR/unb2b/quartus/lofar2_unb2b_sdp_station/ip/qsys_lofar2_unb2b_sdp_station/qsys_lofar2_unb2b_sdp_station_reg_dp_block_validate_bsn_at_sync_xst.ip + $RADIOHDL_BUILD_DIR/unb2b/quartus/lofar2_unb2b_sdp_station/ip/qsys_lofar2_unb2b_sdp_station/qsys_lofar2_unb2b_sdp_station_reg_dp_block_validate_err_bf.ip + $RADIOHDL_BUILD_DIR/unb2b/quartus/lofar2_unb2b_sdp_station/ip/qsys_lofar2_unb2b_sdp_station/qsys_lofar2_unb2b_sdp_station_reg_dp_block_validate_err_xst.ip + $RADIOHDL_BUILD_DIR/unb2b/quartus/lofar2_unb2b_sdp_station/ip/qsys_lofar2_unb2b_sdp_station/qsys_lofar2_unb2b_sdp_station_reg_dpmm_ctrl.ip + $RADIOHDL_BUILD_DIR/unb2b/quartus/lofar2_unb2b_sdp_station/ip/qsys_lofar2_unb2b_sdp_station/qsys_lofar2_unb2b_sdp_station_reg_dpmm_data.ip + $RADIOHDL_BUILD_DIR/unb2b/quartus/lofar2_unb2b_sdp_station/ip/qsys_lofar2_unb2b_sdp_station/qsys_lofar2_unb2b_sdp_station_reg_dp_selector.ip + $RADIOHDL_BUILD_DIR/unb2b/quartus/lofar2_unb2b_sdp_station/ip/qsys_lofar2_unb2b_sdp_station/qsys_lofar2_unb2b_sdp_station_reg_dp_shiftram.ip + $RADIOHDL_BUILD_DIR/unb2b/quartus/lofar2_unb2b_sdp_station/ip/qsys_lofar2_unb2b_sdp_station/qsys_lofar2_unb2b_sdp_station_reg_dp_xonoff.ip + $RADIOHDL_BUILD_DIR/unb2b/quartus/lofar2_unb2b_sdp_station/ip/qsys_lofar2_unb2b_sdp_station/qsys_lofar2_unb2b_sdp_station_reg_epcs.ip + $RADIOHDL_BUILD_DIR/unb2b/quartus/lofar2_unb2b_sdp_station/ip/qsys_lofar2_unb2b_sdp_station/qsys_lofar2_unb2b_sdp_station_reg_fpga_temp_sens.ip + $RADIOHDL_BUILD_DIR/unb2b/quartus/lofar2_unb2b_sdp_station/ip/qsys_lofar2_unb2b_sdp_station/qsys_lofar2_unb2b_sdp_station_reg_fpga_voltage_sens.ip + $RADIOHDL_BUILD_DIR/unb2b/quartus/lofar2_unb2b_sdp_station/ip/qsys_lofar2_unb2b_sdp_station/qsys_lofar2_unb2b_sdp_station_reg_hdr_dat.ip + $RADIOHDL_BUILD_DIR/unb2b/quartus/lofar2_unb2b_sdp_station/ip/qsys_lofar2_unb2b_sdp_station/qsys_lofar2_unb2b_sdp_station_reg_mmdp_ctrl.ip + $RADIOHDL_BUILD_DIR/unb2b/quartus/lofar2_unb2b_sdp_station/ip/qsys_lofar2_unb2b_sdp_station/qsys_lofar2_unb2b_sdp_station_reg_mmdp_data.ip + $RADIOHDL_BUILD_DIR/unb2b/quartus/lofar2_unb2b_sdp_station/ip/qsys_lofar2_unb2b_sdp_station/qsys_lofar2_unb2b_sdp_station_reg_nof_crosslets.ip + $RADIOHDL_BUILD_DIR/unb2b/quartus/lofar2_unb2b_sdp_station/ip/qsys_lofar2_unb2b_sdp_station/qsys_lofar2_unb2b_sdp_station_reg_nw_10gbe_eth10g.ip + $RADIOHDL_BUILD_DIR/unb2b/quartus/lofar2_unb2b_sdp_station/ip/qsys_lofar2_unb2b_sdp_station/qsys_lofar2_unb2b_sdp_station_reg_nw_10gbe_mac.ip + $RADIOHDL_BUILD_DIR/unb2b/quartus/lofar2_unb2b_sdp_station/ip/qsys_lofar2_unb2b_sdp_station/qsys_lofar2_unb2b_sdp_station_reg_remu.ip + $RADIOHDL_BUILD_DIR/unb2b/quartus/lofar2_unb2b_sdp_station/ip/qsys_lofar2_unb2b_sdp_station/qsys_lofar2_unb2b_sdp_station_reg_ring_info.ip + $RADIOHDL_BUILD_DIR/unb2b/quartus/lofar2_unb2b_sdp_station/ip/qsys_lofar2_unb2b_sdp_station/qsys_lofar2_unb2b_sdp_station_reg_ring_lane_info_bf.ip + $RADIOHDL_BUILD_DIR/unb2b/quartus/lofar2_unb2b_sdp_station/ip/qsys_lofar2_unb2b_sdp_station/qsys_lofar2_unb2b_sdp_station_reg_ring_lane_info_xst.ip + $RADIOHDL_BUILD_DIR/unb2b/quartus/lofar2_unb2b_sdp_station/ip/qsys_lofar2_unb2b_sdp_station/qsys_lofar2_unb2b_sdp_station_reg_sdp_info.ip + $RADIOHDL_BUILD_DIR/unb2b/quartus/lofar2_unb2b_sdp_station/ip/qsys_lofar2_unb2b_sdp_station/qsys_lofar2_unb2b_sdp_station_reg_si.ip + $RADIOHDL_BUILD_DIR/unb2b/quartus/lofar2_unb2b_sdp_station/ip/qsys_lofar2_unb2b_sdp_station/qsys_lofar2_unb2b_sdp_station_reg_stat_enable_bst.ip + $RADIOHDL_BUILD_DIR/unb2b/quartus/lofar2_unb2b_sdp_station/ip/qsys_lofar2_unb2b_sdp_station/qsys_lofar2_unb2b_sdp_station_reg_stat_enable_sst.ip + $RADIOHDL_BUILD_DIR/unb2b/quartus/lofar2_unb2b_sdp_station/ip/qsys_lofar2_unb2b_sdp_station/qsys_lofar2_unb2b_sdp_station_reg_stat_enable_xst.ip + $RADIOHDL_BUILD_DIR/unb2b/quartus/lofar2_unb2b_sdp_station/ip/qsys_lofar2_unb2b_sdp_station/qsys_lofar2_unb2b_sdp_station_reg_stat_hdr_dat_bst.ip + $RADIOHDL_BUILD_DIR/unb2b/quartus/lofar2_unb2b_sdp_station/ip/qsys_lofar2_unb2b_sdp_station/qsys_lofar2_unb2b_sdp_station_reg_stat_hdr_dat_sst.ip + $RADIOHDL_BUILD_DIR/unb2b/quartus/lofar2_unb2b_sdp_station/ip/qsys_lofar2_unb2b_sdp_station/qsys_lofar2_unb2b_sdp_station_reg_stat_hdr_dat_xst.ip + $RADIOHDL_BUILD_DIR/unb2b/quartus/lofar2_unb2b_sdp_station/ip/qsys_lofar2_unb2b_sdp_station/qsys_lofar2_unb2b_sdp_station_reg_tr_10gbe_eth10g.ip + $RADIOHDL_BUILD_DIR/unb2b/quartus/lofar2_unb2b_sdp_station/ip/qsys_lofar2_unb2b_sdp_station/qsys_lofar2_unb2b_sdp_station_reg_tr_10gbe_mac.ip + $RADIOHDL_BUILD_DIR/unb2b/quartus/lofar2_unb2b_sdp_station/ip/qsys_lofar2_unb2b_sdp_station/qsys_lofar2_unb2b_sdp_station_reg_unb_pmbus.ip + $RADIOHDL_BUILD_DIR/unb2b/quartus/lofar2_unb2b_sdp_station/ip/qsys_lofar2_unb2b_sdp_station/qsys_lofar2_unb2b_sdp_station_reg_unb_sens.ip + $RADIOHDL_BUILD_DIR/unb2b/quartus/lofar2_unb2b_sdp_station/ip/qsys_lofar2_unb2b_sdp_station/qsys_lofar2_unb2b_sdp_station_reg_wdi.ip + $RADIOHDL_BUILD_DIR/unb2b/quartus/lofar2_unb2b_sdp_station/ip/qsys_lofar2_unb2b_sdp_station/qsys_lofar2_unb2b_sdp_station_reg_wg.ip + $RADIOHDL_BUILD_DIR/unb2b/quartus/lofar2_unb2b_sdp_station/ip/qsys_lofar2_unb2b_sdp_station/qsys_lofar2_unb2b_sdp_station_rom_system_info.ip + $RADIOHDL_BUILD_DIR/unb2b/quartus/lofar2_unb2b_sdp_station/ip/qsys_lofar2_unb2b_sdp_station/qsys_lofar2_unb2b_sdp_station_timer_0.ip + +nios2_app_userflags = -DCOMPILE_FOR_GEN2_UNB2 diff --git a/applications/lofar2/designs/lofar2_unb2b_sdp_station/revisions/lofar2_unb2b_sdp_station_full_wg/lofar2_unb2b_sdp_station_full_wg.vhd b/applications/lofar2/designs/lofar2_unb2b_sdp_station/revisions/lofar2_unb2b_sdp_station_full_wg/lofar2_unb2b_sdp_station_full_wg.vhd new file mode 100644 index 0000000000000000000000000000000000000000..953d71413f9d8e77a27e841d4a466e0cedb144dc --- /dev/null +++ b/applications/lofar2/designs/lofar2_unb2b_sdp_station/revisions/lofar2_unb2b_sdp_station_full_wg/lofar2_unb2b_sdp_station_full_wg.vhd @@ -0,0 +1,158 @@ +------------------------------------------------------------------------------- +-- +-- Copyright 2022 +-- ASTRON (Netherlands Institute for Radio Astronomy) <http://www.astron.nl/> +-- P.O.Box 2, 7990 AA Dwingeloo, The Netherlands +-- +-- Licensed under the Apache License, Version 2.0 (the "License"); +-- you may not use this file except in compliance with the License. +-- You may obtain a copy of the License at +-- +-- http://www.apache.org/licenses/LICENSE-2.0 +-- +-- Unless required by applicable law or agreed to in writing, software +-- distributed under the License is distributed on an "AS IS" BASIS, +-- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +-- See the License for the specific language governing permissions and +-- limitations under the License. +-- +------------------------------------------------------------------------------- + +-- Author : R. van der Walle +-- Purpose: +-- Wrapper for Lofar2 SDP Station full design +-- Description: +-- Unb2b version for lab testing +-- Contains AIT input stage with WG, FSUB, XSUB, BF and RING + + +LIBRARY IEEE, common_lib, unb2b_board_lib, technology_lib, diag_lib, dp_lib, tech_jesd204b_lib, lofar2_unb2b_sdp_station_lib; +USE IEEE.STD_LOGIC_1164.ALL; +USE IEEE.NUMERIC_STD.ALL; +USE common_lib.common_pkg.ALL; +USE common_lib.common_mem_pkg.ALL; +USE technology_lib.technology_pkg.ALL; +USE unb2b_board_lib.unb2b_board_pkg.ALL; +USE diag_lib.diag_pkg.ALL; +USE dp_lib.dp_stream_pkg.ALL; + +ENTITY lofar2_unb2b_sdp_station_full_wg IS + GENERIC ( + g_design_name : STRING := "lofar2_unb2b_sdp_station_full_wg"; + g_design_note : STRING := "Lofar2 SDP station full design WG"; + g_sim : BOOLEAN := FALSE; --Overridden by TB + g_sim_unb_nr : NATURAL := 0; + g_sim_node_nr : NATURAL := 0; + g_stamp_date : NATURAL := 0; -- Date (YYYYMMDD) -- set by QSF + g_stamp_time : NATURAL := 0; -- Time (HHMMSS) -- set by QSF + g_revision_id : STRING := "" -- revision ID -- set by QSF + ); + PORT ( + -- GENERAL + CLK : IN STD_LOGIC; -- System Clock + PPS : IN STD_LOGIC; -- System Sync + WDI : OUT STD_LOGIC; -- Watchdog Clear + INTA : INOUT STD_LOGIC; -- FPGA interconnect line + INTB : INOUT STD_LOGIC; -- FPGA interconnect line + + -- Others + VERSION : IN STD_LOGIC_VECTOR(c_unb2b_board_aux.version_w-1 DOWNTO 0); + ID : IN STD_LOGIC_VECTOR(c_unb2b_board_aux.id_w-1 DOWNTO 0); + TESTIO : INOUT STD_LOGIC_VECTOR(c_unb2b_board_aux.testio_w-1 DOWNTO 0); + + -- I2C Interface to Sensors + SENS_SC : INOUT STD_LOGIC; + SENS_SD : INOUT STD_LOGIC; + + PMBUS_SC : INOUT STD_LOGIC; + PMBUS_SD : INOUT STD_LOGIC; + PMBUS_ALERT : IN STD_LOGIC := '0'; + + -- 1GbE Control Interface + ETH_CLK : IN STD_LOGIC; + ETH_SGIN : IN STD_LOGIC_VECTOR(c_unb2b_board_nof_eth-1 DOWNTO 0); + ETH_SGOUT : OUT STD_LOGIC_VECTOR(c_unb2b_board_nof_eth-1 DOWNTO 0); + + -- Transceiver clocks + SA_CLK : IN STD_LOGIC := '0'; -- Clock 10GbE front (qsfp) and ring lines + + -- front transceivers QSFP0 for Ring. + QSFP_0_RX : IN STD_LOGIC_VECTOR(c_unb2b_board_tr_qsfp.bus_w-1 downto 0) := (OTHERS=>'0'); + QSFP_0_TX : OUT STD_LOGIC_VECTOR(c_unb2b_board_tr_qsfp.bus_w-1 downto 0); + + -- front transceivers + QSFP_1_RX : IN STD_LOGIC_VECTOR(c_unb2b_board_tr_qsfp.bus_w-1 downto 0) := (OTHERS=>'0'); + QSFP_1_TX : OUT STD_LOGIC_VECTOR(c_unb2b_board_tr_qsfp.bus_w-1 downto 0); + + -- LEDs + QSFP_LED : OUT STD_LOGIC_VECTOR(c_unb2b_board_tr_qsfp_nof_leds-1 DOWNTO 0); + + -- ring transceivers + RING_0_RX : IN STD_LOGIC_VECTOR(c_unb2b_board_tr_qsfp.bus_w-1 DOWNTO 0) := (OTHERS => '0'); -- Using qsfp bus width also for ring interfaces + RING_0_TX : OUT STD_LOGIC_VECTOR(c_unb2b_board_tr_qsfp.bus_w-1 DOWNTO 0); + RING_1_RX : IN STD_LOGIC_VECTOR(c_unb2b_board_tr_qsfp.bus_w-1 DOWNTO 0) := (OTHERS=>'0'); + RING_1_TX : OUT STD_LOGIC_VECTOR(c_unb2b_board_tr_qsfp.bus_w-1 DOWNTO 0) + ); +END lofar2_unb2b_sdp_station_full_wg; + +ARCHITECTURE str OF lofar2_unb2b_sdp_station_full_wg IS + +BEGIN + + u_revision : ENTITY lofar2_unb2b_sdp_station_lib.lofar2_unb2b_sdp_station + GENERIC MAP ( + g_design_name => g_design_name, + g_design_note => g_design_note, + g_sim => g_sim, + g_sim_unb_nr => g_sim_unb_nr, + g_sim_node_nr => g_sim_node_nr, + g_stamp_date => g_stamp_date, + g_stamp_time => g_stamp_time, + g_revision_id => g_revision_id + ) + PORT MAP ( + -- GENERAL + CLK => CLK, + PPS => PPS, + WDI => WDI, + INTA => INTA, + INTB => INTB, + + -- Others + VERSION => VERSION, + ID => ID, + TESTIO => TESTIO, + + -- I2C Interface to Sensors + SENS_SC => SENS_SC, + SENS_SD => SENS_SD, + + PMBUS_SC => PMBUS_SC, + PMBUS_SD => PMBUS_SD, + PMBUS_ALERT => PMBUS_ALERT, + + -- 1GbE Control Interface + ETH_clk => ETH_clk, + ETH_SGIN => ETH_SGIN, + ETH_SGOUT => ETH_SGOUT, + + -- Transceiver clocks + SA_CLK => SA_CLK, + + -- front transceivers QSFP0 for Ring. + QSFP_0_RX => QSFP_0_RX, + QSFP_0_TX => QSFP_0_TX, + + -- front transceivers QSFP1 for 10GbE output to CEP. + QSFP_1_RX => QSFP_1_RX, + QSFP_1_TX => QSFP_1_TX, + -- LEDs + QSFP_LED => QSFP_LED, + + -- ring transceivers + RING_0_RX => RING_0_RX, + RING_0_TX => RING_0_TX, + RING_1_RX => RING_1_RX, + RING_1_TX => RING_1_TX + ); +END str; diff --git a/applications/lofar2/designs/lofar2_unb2b_sdp_station/revisions/lofar2_unb2b_sdp_station_full_wg/lofar2_unb2b_sdp_station_full_wg_pins.tcl b/applications/lofar2/designs/lofar2_unb2b_sdp_station/revisions/lofar2_unb2b_sdp_station_full_wg/lofar2_unb2b_sdp_station_full_wg_pins.tcl new file mode 100644 index 0000000000000000000000000000000000000000..689b010fb83a0f4df276dd070b6e8cc383755595 --- /dev/null +++ b/applications/lofar2/designs/lofar2_unb2b_sdp_station/revisions/lofar2_unb2b_sdp_station_full_wg/lofar2_unb2b_sdp_station_full_wg_pins.tcl @@ -0,0 +1,25 @@ +############################################################################### +# +# Copyright (C) 2022 +# ASTRON (Netherlands Institute for Radio Astronomy) <http://www.astron.nl/> +# P.O.Box 2, 7990 AA Dwingeloo, The Netherlands +# +# This program is free software: you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation, either version 3 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program. If not, see <http://www.gnu.org/licenses/>. +# +############################################################################### +source $::env(RADIOHDL_WORK)/applications/lofar2/designs/lofar2_unb2b_sdp_station/quartus/lofar2_unb2b_sdp_station_pins.tcl +source $::env(RADIOHDL_WORK)/applications/lofar2/designs/lofar2_unb2b_sdp_station/quartus/lofar2_unb2b_sdp_station_ring_pins.tcl +source $::env(RADIOHDL_WORK)/applications/lofar2/designs/lofar2_unb2b_sdp_station/quartus/lofar2_unb2b_sdp_station_beamlets_pins.tcl + + diff --git a/applications/lofar2/designs/lofar2_unb2b_sdp_station/revisions/lofar2_unb2b_sdp_station_xsub_one/hdllib.cfg b/applications/lofar2/designs/lofar2_unb2b_sdp_station/revisions/lofar2_unb2b_sdp_station_xsub_one/hdllib.cfg index f2d428a5a540d2fdb2d14e26192b07f9c68cfd18..b1e3cfd9e4be1250ed1ab05ddee127de07c10ad1 100644 --- a/applications/lofar2/designs/lofar2_unb2b_sdp_station/revisions/lofar2_unb2b_sdp_station_xsub_one/hdllib.cfg +++ b/applications/lofar2/designs/lofar2_unb2b_sdp_station/revisions/lofar2_unb2b_sdp_station_xsub_one/hdllib.cfg @@ -39,7 +39,7 @@ quartus_sdc_files = #$RADIOHDL_WORK/boards/uniboard2b/libraries/unb2b_board/quartus/unb2b_board.sdc quartus_tcl_files = - ../../quartus/lofar2_unb2b_sdp_station_pins.tcl + lofar2_unb2b_sdp_station_xsub_one_pins.tcl quartus_vhdl_files = diff --git a/applications/lofar2/designs/lofar2_unb2b_sdp_station/revisions/lofar2_unb2b_sdp_station_xsub_one/lofar2_unb2b_sdp_station_xsub_one_pins.tcl b/applications/lofar2/designs/lofar2_unb2b_sdp_station/revisions/lofar2_unb2b_sdp_station_xsub_one/lofar2_unb2b_sdp_station_xsub_one_pins.tcl new file mode 100644 index 0000000000000000000000000000000000000000..1951a9467db81c29743ddc496672c7fb0f0e6b41 --- /dev/null +++ b/applications/lofar2/designs/lofar2_unb2b_sdp_station/revisions/lofar2_unb2b_sdp_station_xsub_one/lofar2_unb2b_sdp_station_xsub_one_pins.tcl @@ -0,0 +1,24 @@ +############################################################################### +# +# Copyright (C) 2022 +# ASTRON (Netherlands Institute for Radio Astronomy) <http://www.astron.nl/> +# P.O.Box 2, 7990 AA Dwingeloo, The Netherlands +# +# This program is free software: you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation, either version 3 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program. If not, see <http://www.gnu.org/licenses/>. +# +############################################################################### +source $::env(RADIOHDL_WORK)/applications/lofar2/designs/lofar2_unb2b_sdp_station/quartus/lofar2_unb2b_sdp_station_pins.tcl +source $::env(RADIOHDL_WORK)/applications/lofar2/designs/lofar2_unb2b_sdp_station/quartus/lofar2_unb2b_sdp_station_jesd_pins.tcl + + diff --git a/applications/lofar2/designs/lofar2_unb2b_sdp_station/revisions/lofar2_unb2b_sdp_station_xsub_ring/lofar2_unb2b_sdp_station_xsub_ring_pins.tcl b/applications/lofar2/designs/lofar2_unb2b_sdp_station/revisions/lofar2_unb2b_sdp_station_xsub_ring/lofar2_unb2b_sdp_station_xsub_ring_pins.tcl index 7f07397bbe43c4c8c054a7e43374dcd6f71266a8..29347861db580a487457a4c698ccfec42f264ec0 100644 --- a/applications/lofar2/designs/lofar2_unb2b_sdp_station/revisions/lofar2_unb2b_sdp_station_xsub_ring/lofar2_unb2b_sdp_station_xsub_ring_pins.tcl +++ b/applications/lofar2/designs/lofar2_unb2b_sdp_station/revisions/lofar2_unb2b_sdp_station_xsub_ring/lofar2_unb2b_sdp_station_xsub_ring_pins.tcl @@ -19,6 +19,7 @@ # ############################################################################### source $::env(RADIOHDL_WORK)/applications/lofar2/designs/lofar2_unb2b_sdp_station/quartus/lofar2_unb2b_sdp_station_pins.tcl +source $::env(RADIOHDL_WORK)/applications/lofar2/designs/lofar2_unb2b_sdp_station/quartus/lofar2_unb2b_sdp_station_jesd_pins.tcl source $::env(RADIOHDL_WORK)/applications/lofar2/designs/lofar2_unb2b_sdp_station/quartus/lofar2_unb2b_sdp_station_ring_pins.tcl diff --git a/applications/lofar2/designs/lofar2_unb2b_sdp_station/src/vhdl/lofar2_unb2b_sdp_station.vhd b/applications/lofar2/designs/lofar2_unb2b_sdp_station/src/vhdl/lofar2_unb2b_sdp_station.vhd index 46dfd712acd880c0ee827ecfb7b7589c19bb8e44..3e7aea525e5bd1afc6569562ad4ed14aab8d3619 100644 --- a/applications/lofar2/designs/lofar2_unb2b_sdp_station/src/vhdl/lofar2_unb2b_sdp_station.vhd +++ b/applications/lofar2/designs/lofar2_unb2b_sdp_station/src/vhdl/lofar2_unb2b_sdp_station.vhd @@ -107,12 +107,12 @@ ENTITY lofar2_unb2b_sdp_station IS RING_1_TX : OUT STD_LOGIC_VECTOR(c_unb2b_board_tr_qsfp.bus_w-1 DOWNTO 0); -- back transceivers (Note: numbered from 0) - JESD204B_SERIAL_DATA : IN STD_LOGIC_VECTOR(c_sdp_S_pn-1 downto 0); -- c_sdp_S_pn = 12, c_unb2b_board_nof_tr_jesd204b = 6 + JESD204B_SERIAL_DATA : IN STD_LOGIC_VECTOR(c_sdp_S_pn-1 DOWNTO 0) := (OTHERS => '0'); -- c_sdp_S_pn = 12, c_unb2b_board_nof_tr_jesd204b = 6 -- Connect to the BCK_RX pins in the top wrapper - JESD204B_REFCLK : IN STD_LOGIC; -- Connect to BCK_REF_CLK pin in the top level wrapper + JESD204B_REFCLK : IN STD_LOGIC := '0'; -- Connect to BCK_REF_CLK pin in the top level wrapper -- jesd204b syncronization signals - JESD204B_SYSREF : IN STD_LOGIC; + JESD204B_SYSREF : IN STD_LOGIC := '0'; JESD204B_SYNC_N : OUT STD_LOGIC_VECTOR(c_sdp_N_sync_jesd-1 DOWNTO 0) -- c_unb2b_board_nof_sync_jesd204b = c_sdp_N_sync_jesd = 4 ); END lofar2_unb2b_sdp_station; @@ -811,6 +811,7 @@ BEGIN g_wpfb => g_wpfb, g_bsn_nof_clk_per_sync => g_bsn_nof_clk_per_sync, g_scope_selected_subband => g_scope_selected_subband, + g_no_jesd => c_revision_select.no_jesd, g_use_fsub => c_revision_select.use_fsub, g_use_xsub => c_revision_select.use_xsub, g_use_bf => c_revision_select.use_bf, diff --git a/applications/lofar2/designs/lofar2_unb2b_sdp_station/src/vhdl/lofar2_unb2b_sdp_station_pkg.vhd b/applications/lofar2/designs/lofar2_unb2b_sdp_station/src/vhdl/lofar2_unb2b_sdp_station_pkg.vhd index a11519eeffed0924215d62d651f8230403a4b293..f30f8846296984174033903e141b5d2d5c3f7877 100644 --- a/applications/lofar2/designs/lofar2_unb2b_sdp_station/src/vhdl/lofar2_unb2b_sdp_station_pkg.vhd +++ b/applications/lofar2/designs/lofar2_unb2b_sdp_station/src/vhdl/lofar2_unb2b_sdp_station_pkg.vhd @@ -35,17 +35,19 @@ PACKAGE lofar2_unb2b_sdp_station_pkg IS no_jesd : BOOLEAN; use_fsub : BOOLEAN; use_bf : BOOLEAN; - use_xsub : BOOLEAN; - use_ring : BOOLEAN; + use_xsub : BOOLEAN; + use_ring : BOOLEAN; P_sq : NATURAL; END RECORD; CONSTANT c_ait : t_lofar2_unb2b_sdp_station_config := (FALSE, FALSE, FALSE, FALSE, FALSE, 0); CONSTANT c_fsub : t_lofar2_unb2b_sdp_station_config := (FALSE, TRUE, FALSE, FALSE, FALSE, 0); CONSTANT c_bf : t_lofar2_unb2b_sdp_station_config := (FALSE, TRUE, TRUE, FALSE, FALSE, 0); + CONSTANT c_bf_ring : t_lofar2_unb2b_sdp_station_config := (FALSE, TRUE, TRUE, FALSE, TRUE, 0); CONSTANT c_xsub_one : t_lofar2_unb2b_sdp_station_config := (FALSE, TRUE, FALSE, TRUE, FALSE, 1); CONSTANT c_xsub_ring : t_lofar2_unb2b_sdp_station_config := (FALSE, TRUE, FALSE, TRUE, TRUE, 9); - CONSTANT c_full : t_lofar2_unb2b_sdp_station_config := (FALSE, TRUE, TRUE, TRUE, FALSE, 1); + CONSTANT c_full_wg : t_lofar2_unb2b_sdp_station_config := (TRUE, TRUE, TRUE, TRUE, TRUE, 9); + CONSTANT c_full : t_lofar2_unb2b_sdp_station_config := (FALSE, TRUE, TRUE, TRUE, TRUE, 9); -- Function to select the revision configuration. FUNCTION func_sel_revision_rec(g_design_name : STRING) RETURN t_lofar2_unb2b_sdp_station_config; @@ -61,8 +63,10 @@ PACKAGE BODY lofar2_unb2b_sdp_station_pkg IS IF g_design_name = "lofar2_unb2b_sdp_station_adc" THEN RETURN c_ait; ELSIF g_design_name = "lofar2_unb2b_sdp_station_fsub" THEN RETURN c_fsub; ELSIF g_design_name = "lofar2_unb2b_sdp_station_bf" THEN RETURN c_bf; + ELSIF g_design_name = "lofar2_unb2b_sdp_station_bf_ring" THEN RETURN c_bf_ring; ELSIF g_design_name = "lofar2_unb2b_sdp_station_xsub_one" THEN RETURN c_xsub_one; ELSIF g_design_name = "lofar2_unb2b_sdp_station_xsub_ring" THEN RETURN c_xsub_ring; + ELSIF g_design_name = "lofar2_unb2b_sdp_station_full_wg" THEN RETURN c_full_wg; ELSE RETURN c_full; END IF; END; diff --git a/applications/lofar2/designs/lofar2_unb2c_sdp_station/quartus/lofar2_unb2c_sdp_station_jesd_pins.tcl b/applications/lofar2/designs/lofar2_unb2c_sdp_station/quartus/lofar2_unb2c_sdp_station_jesd_pins.tcl new file mode 100644 index 0000000000000000000000000000000000000000..4c1458f377e0f097733b6f7c81d1fac5c730a511 --- /dev/null +++ b/applications/lofar2/designs/lofar2_unb2c_sdp_station/quartus/lofar2_unb2c_sdp_station_jesd_pins.tcl @@ -0,0 +1,249 @@ +############################################################################### +# +# Copyright (C) 2022 +# ASTRON (Netherlands Institute for Radio Astronomy) <http://www.astron.nl/> +# P.O.Box 2, 7990 AA Dwingeloo, The Netherlands +# +# This program is free software: you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation, either version 3 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program. If not, see <http://www.gnu.org/licenses/>. +# +############################################################################### + +#===================== +# JESD pins +# ==================== +# Pins needed for the 12 channel JESD204B interface to the ADCs + +set_instance_assignment -name IO_STANDARD "1.8 V" -to JESD204B_SYNC_N[0] +set_instance_assignment -name IO_STANDARD "1.8 V" -to JESD204B_SYNC_N[1] +set_instance_assignment -name IO_STANDARD "1.8 V" -to JESD204B_SYNC_N[2] +set_instance_assignment -name IO_STANDARD "1.8 V" -to JESD204B_SYNC_N[3] +#set_instance_assignment -name IO_STANDARD "1.8 V" -to JESD204B_SYNC_N[4] +#set_instance_assignment -name IO_STANDARD "1.8 V" -to JESD204B_SYNC_N[5] +#set_instance_assignment -name IO_STANDARD "1.8 V" -to JESD204B_SYNC_N[6] +#set_instance_assignment -name IO_STANDARD "1.8 V" -to JESD204B_SYNC_N[7] + +#set_location_assignment PIN_AC7 -to BCK_RX[23] +#set_location_assignment PIN_AB5 -to BCK_RX[22] +#set_location_assignment PIN_AE7 -to BCK_RX[21] +#set_location_assignment PIN_AD5 -to BCK_RX[20] +#set_location_assignment PIN_AG7 -to BCK_RX[19] +#set_location_assignment PIN_AF5 -to BCK_RX[18] +#set_location_assignment PIN_AJ7 -to BCK_RX[17] +#set_location_assignment PIN_AH5 -to BCK_RX[16] +#set_location_assignment PIN_AL7 -to BCK_RX[15] +#set_location_assignment PIN_AK5 -to BCK_RX[14] +#set_location_assignment PIN_AN7 -to BCK_RX[13] +#set_location_assignment PIN_AM5 -to BCK_RX[12] +set_location_assignment PIN_AR7 -to BCK_RX[11] +set_location_assignment PIN_AP5 -to BCK_RX[10] +set_location_assignment PIN_AU7 -to BCK_RX[9] +set_location_assignment PIN_AT5 -to BCK_RX[8] +set_location_assignment PIN_AW7 -to BCK_RX[7] +set_location_assignment PIN_AV5 -to BCK_RX[6] +set_location_assignment PIN_BA7 -to BCK_RX[5] +set_location_assignment PIN_AY5 -to BCK_RX[4] +set_location_assignment PIN_BC7 -to BCK_RX[3] +set_location_assignment PIN_BB5 -to BCK_RX[2] +set_location_assignment PIN_AY9 -to BCK_RX[1] +set_location_assignment PIN_BB9 -to BCK_RX[0] + +set_instance_assignment -name IO_STANDARD "HSSI DIFFERENTIAL I/O" -to BCK_TX[0] +set_instance_assignment -name XCVR_A10_TX_VOD_OUTPUT_SWING_CTRL 30 -to BCK_TX[0] +set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to BCK_TX[0] +set_instance_assignment -name XCVR_A10_TX_COMPENSATION_EN ENABLE -to BCK_TX[0] +set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SWITCHING_CTRL_1ST_POST_TAP 0 -to BCK_TX[0] +set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SIGN_1ST_POST_TAP FIR_POST_1T_POS -to BCK_TX[0] + +set_instance_assignment -name IO_STANDARD "HSSI DIFFERENTIAL I/O" -to BCK_TX[1] +set_instance_assignment -name XCVR_A10_TX_VOD_OUTPUT_SWING_CTRL 30 -to BCK_TX[1] +set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to BCK_TX[1] +set_instance_assignment -name XCVR_A10_TX_COMPENSATION_EN ENABLE -to BCK_TX[1] +set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SWITCHING_CTRL_1ST_POST_TAP 0 -to BCK_TX[1] +set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SIGN_1ST_POST_TAP FIR_POST_1T_POS -to BCK_TX[1] + +set_instance_assignment -name IO_STANDARD "HSSI DIFFERENTIAL I/O" -to BCK_TX[2] +set_instance_assignment -name XCVR_A10_TX_VOD_OUTPUT_SWING_CTRL 30 -to BCK_TX[2] +set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to BCK_TX[2] +set_instance_assignment -name XCVR_A10_TX_COMPENSATION_EN ENABLE -to BCK_TX[2] +set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SWITCHING_CTRL_1ST_POST_TAP 0 -to BCK_TX[2] +set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SIGN_1ST_POST_TAP FIR_POST_1T_POS -to BCK_TX[2] + +set_instance_assignment -name IO_STANDARD "HSSI DIFFERENTIAL I/O" -to BCK_TX[3] +set_instance_assignment -name XCVR_A10_TX_VOD_OUTPUT_SWING_CTRL 30 -to BCK_TX[3] +set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to BCK_TX[3] +set_instance_assignment -name XCVR_A10_TX_COMPENSATION_EN ENABLE -to BCK_TX[3] +set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SWITCHING_CTRL_1ST_POST_TAP 0 -to BCK_TX[3] +set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SIGN_1ST_POST_TAP FIR_POST_1T_POS -to BCK_TX[3] + +set_instance_assignment -name IO_STANDARD "HSSI DIFFERENTIAL I/O" -to BCK_TX[4] +set_instance_assignment -name XCVR_A10_TX_VOD_OUTPUT_SWING_CTRL 30 -to BCK_TX[4] +set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to BCK_TX[4] +set_instance_assignment -name XCVR_A10_TX_COMPENSATION_EN ENABLE -to BCK_TX[4] +set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SWITCHING_CTRL_1ST_POST_TAP 0 -to BCK_TX[4] +set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SIGN_1ST_POST_TAP FIR_POST_1T_POS -to BCK_TX[4] + +set_instance_assignment -name IO_STANDARD "HSSI DIFFERENTIAL I/O" -to BCK_TX[5] +set_instance_assignment -name XCVR_A10_TX_VOD_OUTPUT_SWING_CTRL 30 -to BCK_TX[5] +set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to BCK_TX[5] +set_instance_assignment -name XCVR_A10_TX_COMPENSATION_EN ENABLE -to BCK_TX[5] +set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SWITCHING_CTRL_1ST_POST_TAP 0 -to BCK_TX[5] +set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SIGN_1ST_POST_TAP FIR_POST_1T_POS -to BCK_TX[5] + +set_instance_assignment -name IO_STANDARD "HSSI DIFFERENTIAL I/O" -to BCK_TX[6] +set_instance_assignment -name XCVR_A10_TX_VOD_OUTPUT_SWING_CTRL 30 -to BCK_TX[6] +set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to BCK_TX[6] +set_instance_assignment -name XCVR_A10_TX_COMPENSATION_EN ENABLE -to BCK_TX[6] +set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SWITCHING_CTRL_1ST_POST_TAP 0 -to BCK_TX[6] +set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SIGN_1ST_POST_TAP FIR_POST_1T_POS -to BCK_TX[6] + +set_instance_assignment -name IO_STANDARD "HSSI DIFFERENTIAL I/O" -to BCK_TX[7] +set_instance_assignment -name XCVR_A10_TX_VOD_OUTPUT_SWING_CTRL 30 -to BCK_TX[7] +set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to BCK_TX[7] +set_instance_assignment -name XCVR_A10_TX_COMPENSATION_EN ENABLE -to BCK_TX[7] +set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SWITCHING_CTRL_1ST_POST_TAP 0 -to BCK_TX[7] +set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SIGN_1ST_POST_TAP FIR_POST_1T_POS -to BCK_TX[7] + +set_instance_assignment -name IO_STANDARD "HSSI DIFFERENTIAL I/O" -to BCK_TX[8] +set_instance_assignment -name XCVR_A10_TX_VOD_OUTPUT_SWING_CTRL 30 -to BCK_TX[8] +set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to BCK_TX[8] +set_instance_assignment -name XCVR_A10_TX_COMPENSATION_EN ENABLE -to BCK_TX[8] +set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SWITCHING_CTRL_1ST_POST_TAP 0 -to BCK_TX[8] +set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SIGN_1ST_POST_TAP FIR_POST_1T_POS -to BCK_TX[8] + +set_instance_assignment -name IO_STANDARD "HSSI DIFFERENTIAL I/O" -to BCK_TX[9] +set_instance_assignment -name XCVR_A10_TX_VOD_OUTPUT_SWING_CTRL 30 -to BCK_TX[9] +set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to BCK_TX[9] +set_instance_assignment -name XCVR_A10_TX_COMPENSATION_EN ENABLE -to BCK_TX[9] +set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SWITCHING_CTRL_1ST_POST_TAP 0 -to BCK_TX[9] +set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SIGN_1ST_POST_TAP FIR_POST_1T_POS -to BCK_TX[9] + +set_instance_assignment -name IO_STANDARD "HSSI DIFFERENTIAL I/O" -to BCK_TX[10] +set_instance_assignment -name XCVR_A10_TX_VOD_OUTPUT_SWING_CTRL 30 -to BCK_TX[10] +set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to BCK_TX[10] +set_instance_assignment -name XCVR_A10_TX_COMPENSATION_EN ENABLE -to BCK_TX[10] +set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SWITCHING_CTRL_1ST_POST_TAP 0 -to BCK_TX[10] +set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SIGN_1ST_POST_TAP FIR_POST_1T_POS -to BCK_TX[10] + +set_instance_assignment -name IO_STANDARD "HSSI DIFFERENTIAL I/O" -to BCK_TX[11] +set_instance_assignment -name XCVR_A10_TX_VOD_OUTPUT_SWING_CTRL 30 -to BCK_TX[11] +set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to BCK_TX[11] +set_instance_assignment -name XCVR_A10_TX_COMPENSATION_EN ENABLE -to BCK_TX[11] +set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SWITCHING_CTRL_1ST_POST_TAP 0 -to BCK_TX[11] +set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SIGN_1ST_POST_TAP FIR_POST_1T_POS -to BCK_TX[11] + +set_instance_assignment -name IO_STANDARD "HSSI DIFFERENTIAL I/O" -to BCK_TX[12] +set_instance_assignment -name XCVR_A10_TX_VOD_OUTPUT_SWING_CTRL 30 -to BCK_TX[12] +set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to BCK_TX[12] +set_instance_assignment -name XCVR_A10_TX_COMPENSATION_EN ENABLE -to BCK_TX[12] +set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SWITCHING_CTRL_1ST_POST_TAP 0 -to BCK_TX[12] +set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SIGN_1ST_POST_TAP FIR_POST_1T_POS -to BCK_TX[12] + +set_instance_assignment -name IO_STANDARD "HSSI DIFFERENTIAL I/O" -to BCK_TX[13] +set_instance_assignment -name XCVR_A10_TX_VOD_OUTPUT_SWING_CTRL 30 -to BCK_TX[13] +set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to BCK_TX[13] +set_instance_assignment -name XCVR_A10_TX_COMPENSATION_EN ENABLE -to BCK_TX[13] +set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SWITCHING_CTRL_1ST_POST_TAP 0 -to BCK_TX[13] +set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SIGN_1ST_POST_TAP FIR_POST_1T_POS -to BCK_TX[13] + +set_instance_assignment -name IO_STANDARD "HSSI DIFFERENTIAL I/O" -to BCK_TX[14] +set_instance_assignment -name XCVR_A10_TX_VOD_OUTPUT_SWING_CTRL 30 -to BCK_TX[14] +set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to BCK_TX[14] +set_instance_assignment -name XCVR_A10_TX_COMPENSATION_EN ENABLE -to BCK_TX[14] +set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SWITCHING_CTRL_1ST_POST_TAP 0 -to BCK_TX[14] +set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SIGN_1ST_POST_TAP FIR_POST_1T_POS -to BCK_TX[14] + +set_instance_assignment -name IO_STANDARD "HSSI DIFFERENTIAL I/O" -to BCK_TX[15] +set_instance_assignment -name XCVR_A10_TX_VOD_OUTPUT_SWING_CTRL 30 -to BCK_TX[15] +set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to BCK_TX[15] +set_instance_assignment -name XCVR_A10_TX_COMPENSATION_EN ENABLE -to BCK_TX[15] +set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SWITCHING_CTRL_1ST_POST_TAP 0 -to BCK_TX[15] +set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SIGN_1ST_POST_TAP FIR_POST_1T_POS -to BCK_TX[15] + +set_instance_assignment -name IO_STANDARD "HSSI DIFFERENTIAL I/O" -to BCK_TX[16] +set_instance_assignment -name XCVR_A10_TX_VOD_OUTPUT_SWING_CTRL 30 -to BCK_TX[16] +set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to BCK_TX[16] +set_instance_assignment -name XCVR_A10_TX_COMPENSATION_EN ENABLE -to BCK_TX[16] +set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SWITCHING_CTRL_1ST_POST_TAP 0 -to BCK_TX[16] +set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SIGN_1ST_POST_TAP FIR_POST_1T_POS -to BCK_TX[16] + +set_instance_assignment -name IO_STANDARD "HSSI DIFFERENTIAL I/O" -to BCK_TX[17] +set_instance_assignment -name XCVR_A10_TX_VOD_OUTPUT_SWING_CTRL 30 -to BCK_TX[17] +set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to BCK_TX[17] +set_instance_assignment -name XCVR_A10_TX_COMPENSATION_EN ENABLE -to BCK_TX[17] +set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SWITCHING_CTRL_1ST_POST_TAP 0 -to BCK_TX[17] +set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SIGN_1ST_POST_TAP FIR_POST_1T_POS -to BCK_TX[17] + +set_instance_assignment -name IO_STANDARD "HSSI DIFFERENTIAL I/O" -to BCK_TX[18] +set_instance_assignment -name XCVR_A10_TX_VOD_OUTPUT_SWING_CTRL 30 -to BCK_TX[18] +set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to BCK_TX[18] +set_instance_assignment -name XCVR_A10_TX_COMPENSATION_EN ENABLE -to BCK_TX[18] +set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SWITCHING_CTRL_1ST_POST_TAP 0 -to BCK_TX[18] +set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SIGN_1ST_POST_TAP FIR_POST_1T_POS -to BCK_TX[18] + +set_instance_assignment -name IO_STANDARD "HSSI DIFFERENTIAL I/O" -to BCK_TX[19] +set_instance_assignment -name XCVR_A10_TX_VOD_OUTPUT_SWING_CTRL 30 -to BCK_TX[19] +set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to BCK_TX[19] +set_instance_assignment -name XCVR_A10_TX_COMPENSATION_EN ENABLE -to BCK_TX[19] +set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SWITCHING_CTRL_1ST_POST_TAP 0 -to BCK_TX[19] +set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SIGN_1ST_POST_TAP FIR_POST_1T_POS -to BCK_TX[19] + +set_instance_assignment -name IO_STANDARD "HSSI DIFFERENTIAL I/O" -to BCK_TX[20] +set_instance_assignment -name XCVR_A10_TX_VOD_OUTPUT_SWING_CTRL 30 -to BCK_TX[20] +set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to BCK_TX[20] +set_instance_assignment -name XCVR_A10_TX_COMPENSATION_EN ENABLE -to BCK_TX[20] +set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SWITCHING_CTRL_1ST_POST_TAP 0 -to BCK_TX[20] +set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SIGN_1ST_POST_TAP FIR_POST_1T_POS -to BCK_TX[20] + +set_instance_assignment -name IO_STANDARD "HSSI DIFFERENTIAL I/O" -to BCK_TX[21] +set_instance_assignment -name XCVR_A10_TX_VOD_OUTPUT_SWING_CTRL 30 -to BCK_TX[21] +set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to BCK_TX[21] +set_instance_assignment -name XCVR_A10_TX_COMPENSATION_EN ENABLE -to BCK_TX[21] +set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SWITCHING_CTRL_1ST_POST_TAP 0 -to BCK_TX[21] +set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SIGN_1ST_POST_TAP FIR_POST_1T_POS -to BCK_TX[21] + +set_instance_assignment -name IO_STANDARD "HSSI DIFFERENTIAL I/O" -to BCK_TX[22] +set_instance_assignment -name XCVR_A10_TX_VOD_OUTPUT_SWING_CTRL 30 -to BCK_TX[22] +set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to BCK_TX[22] +set_instance_assignment -name XCVR_A10_TX_COMPENSATION_EN ENABLE -to BCK_TX[22] +set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SWITCHING_CTRL_1ST_POST_TAP 0 -to BCK_TX[22] +set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SIGN_1ST_POST_TAP FIR_POST_1T_POS -to BCK_TX[22] + +set_instance_assignment -name IO_STANDARD "HSSI DIFFERENTIAL I/O" -to BCK_TX[23] +set_instance_assignment -name XCVR_A10_TX_VOD_OUTPUT_SWING_CTRL 30 -to BCK_TX[23] +set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to BCK_TX[23] +set_instance_assignment -name XCVR_A10_TX_COMPENSATION_EN ENABLE -to BCK_TX[23] +set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SWITCHING_CTRL_1ST_POST_TAP 0 -to BCK_TX[23] +set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SIGN_1ST_POST_TAP FIR_POST_1T_POS -to BCK_TX[23] + +# Substitute new signal names from the jesd_simple design +set_instance_assignment -name IO_STANDARD LVDS -to BCK_REF_CLK +set_instance_assignment -name IO_STANDARD LVDS -to "BCK_REF_CLK(n)" +set_instance_assignment -name XCVR_A10_RX_TERM_SEL R_R1 -to BCK_REF_CLK +set_location_assignment PIN_V9 -to BCK_REF_CLK +set_location_assignment PIN_V10 -to "BCK_REF_CLK(n)" + +set_instance_assignment -name IO_STANDARD LVDS -to JESD204B_SYSREF +set_instance_assignment -name IO_STANDARD LVDS -to "JESD204B_SYSREF(n)" +set_instance_assignment -name XCVR_A10_RX_TERM_SEL R_R1 -to JESD204B_SYSREF +set_location_assignment PIN_Y13 -to JESD204B_SYSREF +set_location_assignment PIN_Y12 -to "JESD204B_SYSREF(n)" + +set_location_assignment PIN_AD12 -to JESD204B_SYNC_N[0] +set_location_assignment PIN_AC13 -to JESD204B_SYNC_N[1] +set_location_assignment PIN_AA13 -to JESD204B_SYNC_N[2] +set_location_assignment PIN_AA12 -to JESD204B_SYNC_N[3] +#set_location_assignment PIN_V14 -to JESD204B_SYNC_N[4] +#set_location_assignment PIN_V12 -to JESD204B_SYNC_N[5] +#set_location_assignment PIN_U14 -to JESD204B_SYNC_N[6] +#set_location_assignment PIN_R13 -to JESD204B_SYNC_N[7] diff --git a/applications/lofar2/designs/lofar2_unb2c_sdp_station/quartus/lofar2_unb2c_sdp_station_pins.tcl b/applications/lofar2/designs/lofar2_unb2c_sdp_station/quartus/lofar2_unb2c_sdp_station_pins.tcl index 2d6b00be0a9e149508a7a50de80f4257e1a78bc9..99176de66880a3f3c752d77e371d2578c9bf6143 100644 --- a/applications/lofar2/designs/lofar2_unb2c_sdp_station/quartus/lofar2_unb2c_sdp_station_pins.tcl +++ b/applications/lofar2/designs/lofar2_unb2c_sdp_station/quartus/lofar2_unb2c_sdp_station_pins.tcl @@ -88,231 +88,3 @@ set_location_assignment PIN_J42 -to RING_1_TX[1] set_location_assignment PIN_G42 -to RING_1_TX[2] set_location_assignment PIN_F44 -to RING_1_TX[3] -#===================== -# JESD pins -# ==================== -# Pins needed for the 12 channel JESD204B interface to the ADCs - -set_instance_assignment -name IO_STANDARD "1.8 V" -to JESD204B_SYNC_N[0] -set_instance_assignment -name IO_STANDARD "1.8 V" -to JESD204B_SYNC_N[1] -set_instance_assignment -name IO_STANDARD "1.8 V" -to JESD204B_SYNC_N[2] -set_instance_assignment -name IO_STANDARD "1.8 V" -to JESD204B_SYNC_N[3] -#set_instance_assignment -name IO_STANDARD "1.8 V" -to JESD204B_SYNC_N[4] -#set_instance_assignment -name IO_STANDARD "1.8 V" -to JESD204B_SYNC_N[5] -#set_instance_assignment -name IO_STANDARD "1.8 V" -to JESD204B_SYNC_N[6] -#set_instance_assignment -name IO_STANDARD "1.8 V" -to JESD204B_SYNC_N[7] - -#set_location_assignment PIN_AC7 -to BCK_RX[23] -#set_location_assignment PIN_AB5 -to BCK_RX[22] -#set_location_assignment PIN_AE7 -to BCK_RX[21] -#set_location_assignment PIN_AD5 -to BCK_RX[20] -#set_location_assignment PIN_AG7 -to BCK_RX[19] -#set_location_assignment PIN_AF5 -to BCK_RX[18] -#set_location_assignment PIN_AJ7 -to BCK_RX[17] -#set_location_assignment PIN_AH5 -to BCK_RX[16] -#set_location_assignment PIN_AL7 -to BCK_RX[15] -#set_location_assignment PIN_AK5 -to BCK_RX[14] -#set_location_assignment PIN_AN7 -to BCK_RX[13] -#set_location_assignment PIN_AM5 -to BCK_RX[12] -set_location_assignment PIN_AR7 -to BCK_RX[11] -set_location_assignment PIN_AP5 -to BCK_RX[10] -set_location_assignment PIN_AU7 -to BCK_RX[9] -set_location_assignment PIN_AT5 -to BCK_RX[8] -set_location_assignment PIN_AW7 -to BCK_RX[7] -set_location_assignment PIN_AV5 -to BCK_RX[6] -set_location_assignment PIN_BA7 -to BCK_RX[5] -set_location_assignment PIN_AY5 -to BCK_RX[4] -set_location_assignment PIN_BC7 -to BCK_RX[3] -set_location_assignment PIN_BB5 -to BCK_RX[2] -set_location_assignment PIN_AY9 -to BCK_RX[1] -set_location_assignment PIN_BB9 -to BCK_RX[0] - -set_instance_assignment -name IO_STANDARD "HSSI DIFFERENTIAL I/O" -to BCK_TX[0] -set_instance_assignment -name XCVR_A10_TX_VOD_OUTPUT_SWING_CTRL 30 -to BCK_TX[0] -set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to BCK_TX[0] -set_instance_assignment -name XCVR_A10_TX_COMPENSATION_EN ENABLE -to BCK_TX[0] -set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SWITCHING_CTRL_1ST_POST_TAP 0 -to BCK_TX[0] -set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SIGN_1ST_POST_TAP FIR_POST_1T_POS -to BCK_TX[0] - -set_instance_assignment -name IO_STANDARD "HSSI DIFFERENTIAL I/O" -to BCK_TX[1] -set_instance_assignment -name XCVR_A10_TX_VOD_OUTPUT_SWING_CTRL 30 -to BCK_TX[1] -set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to BCK_TX[1] -set_instance_assignment -name XCVR_A10_TX_COMPENSATION_EN ENABLE -to BCK_TX[1] -set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SWITCHING_CTRL_1ST_POST_TAP 0 -to BCK_TX[1] -set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SIGN_1ST_POST_TAP FIR_POST_1T_POS -to BCK_TX[1] - -set_instance_assignment -name IO_STANDARD "HSSI DIFFERENTIAL I/O" -to BCK_TX[2] -set_instance_assignment -name XCVR_A10_TX_VOD_OUTPUT_SWING_CTRL 30 -to BCK_TX[2] -set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to BCK_TX[2] -set_instance_assignment -name XCVR_A10_TX_COMPENSATION_EN ENABLE -to BCK_TX[2] -set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SWITCHING_CTRL_1ST_POST_TAP 0 -to BCK_TX[2] -set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SIGN_1ST_POST_TAP FIR_POST_1T_POS -to BCK_TX[2] - -set_instance_assignment -name IO_STANDARD "HSSI DIFFERENTIAL I/O" -to BCK_TX[3] -set_instance_assignment -name XCVR_A10_TX_VOD_OUTPUT_SWING_CTRL 30 -to BCK_TX[3] -set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to BCK_TX[3] -set_instance_assignment -name XCVR_A10_TX_COMPENSATION_EN ENABLE -to BCK_TX[3] -set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SWITCHING_CTRL_1ST_POST_TAP 0 -to BCK_TX[3] -set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SIGN_1ST_POST_TAP FIR_POST_1T_POS -to BCK_TX[3] - -set_instance_assignment -name IO_STANDARD "HSSI DIFFERENTIAL I/O" -to BCK_TX[4] -set_instance_assignment -name XCVR_A10_TX_VOD_OUTPUT_SWING_CTRL 30 -to BCK_TX[4] -set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to BCK_TX[4] -set_instance_assignment -name XCVR_A10_TX_COMPENSATION_EN ENABLE -to BCK_TX[4] -set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SWITCHING_CTRL_1ST_POST_TAP 0 -to BCK_TX[4] -set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SIGN_1ST_POST_TAP FIR_POST_1T_POS -to BCK_TX[4] - -set_instance_assignment -name IO_STANDARD "HSSI DIFFERENTIAL I/O" -to BCK_TX[5] -set_instance_assignment -name XCVR_A10_TX_VOD_OUTPUT_SWING_CTRL 30 -to BCK_TX[5] -set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to BCK_TX[5] -set_instance_assignment -name XCVR_A10_TX_COMPENSATION_EN ENABLE -to BCK_TX[5] -set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SWITCHING_CTRL_1ST_POST_TAP 0 -to BCK_TX[5] -set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SIGN_1ST_POST_TAP FIR_POST_1T_POS -to BCK_TX[5] - -set_instance_assignment -name IO_STANDARD "HSSI DIFFERENTIAL I/O" -to BCK_TX[6] -set_instance_assignment -name XCVR_A10_TX_VOD_OUTPUT_SWING_CTRL 30 -to BCK_TX[6] -set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to BCK_TX[6] -set_instance_assignment -name XCVR_A10_TX_COMPENSATION_EN ENABLE -to BCK_TX[6] -set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SWITCHING_CTRL_1ST_POST_TAP 0 -to BCK_TX[6] -set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SIGN_1ST_POST_TAP FIR_POST_1T_POS -to BCK_TX[6] - -set_instance_assignment -name IO_STANDARD "HSSI DIFFERENTIAL I/O" -to BCK_TX[7] -set_instance_assignment -name XCVR_A10_TX_VOD_OUTPUT_SWING_CTRL 30 -to BCK_TX[7] -set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to BCK_TX[7] -set_instance_assignment -name XCVR_A10_TX_COMPENSATION_EN ENABLE -to BCK_TX[7] -set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SWITCHING_CTRL_1ST_POST_TAP 0 -to BCK_TX[7] -set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SIGN_1ST_POST_TAP FIR_POST_1T_POS -to BCK_TX[7] - -set_instance_assignment -name IO_STANDARD "HSSI DIFFERENTIAL I/O" -to BCK_TX[8] -set_instance_assignment -name XCVR_A10_TX_VOD_OUTPUT_SWING_CTRL 30 -to BCK_TX[8] -set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to BCK_TX[8] -set_instance_assignment -name XCVR_A10_TX_COMPENSATION_EN ENABLE -to BCK_TX[8] -set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SWITCHING_CTRL_1ST_POST_TAP 0 -to BCK_TX[8] -set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SIGN_1ST_POST_TAP FIR_POST_1T_POS -to BCK_TX[8] - -set_instance_assignment -name IO_STANDARD "HSSI DIFFERENTIAL I/O" -to BCK_TX[9] -set_instance_assignment -name XCVR_A10_TX_VOD_OUTPUT_SWING_CTRL 30 -to BCK_TX[9] -set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to BCK_TX[9] -set_instance_assignment -name XCVR_A10_TX_COMPENSATION_EN ENABLE -to BCK_TX[9] -set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SWITCHING_CTRL_1ST_POST_TAP 0 -to BCK_TX[9] -set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SIGN_1ST_POST_TAP FIR_POST_1T_POS -to BCK_TX[9] - -set_instance_assignment -name IO_STANDARD "HSSI DIFFERENTIAL I/O" -to BCK_TX[10] -set_instance_assignment -name XCVR_A10_TX_VOD_OUTPUT_SWING_CTRL 30 -to BCK_TX[10] -set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to BCK_TX[10] -set_instance_assignment -name XCVR_A10_TX_COMPENSATION_EN ENABLE -to BCK_TX[10] -set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SWITCHING_CTRL_1ST_POST_TAP 0 -to BCK_TX[10] -set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SIGN_1ST_POST_TAP FIR_POST_1T_POS -to BCK_TX[10] - -set_instance_assignment -name IO_STANDARD "HSSI DIFFERENTIAL I/O" -to BCK_TX[11] -set_instance_assignment -name XCVR_A10_TX_VOD_OUTPUT_SWING_CTRL 30 -to BCK_TX[11] -set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to BCK_TX[11] -set_instance_assignment -name XCVR_A10_TX_COMPENSATION_EN ENABLE -to BCK_TX[11] -set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SWITCHING_CTRL_1ST_POST_TAP 0 -to BCK_TX[11] -set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SIGN_1ST_POST_TAP FIR_POST_1T_POS -to BCK_TX[11] - -set_instance_assignment -name IO_STANDARD "HSSI DIFFERENTIAL I/O" -to BCK_TX[12] -set_instance_assignment -name XCVR_A10_TX_VOD_OUTPUT_SWING_CTRL 30 -to BCK_TX[12] -set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to BCK_TX[12] -set_instance_assignment -name XCVR_A10_TX_COMPENSATION_EN ENABLE -to BCK_TX[12] -set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SWITCHING_CTRL_1ST_POST_TAP 0 -to BCK_TX[12] -set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SIGN_1ST_POST_TAP FIR_POST_1T_POS -to BCK_TX[12] - -set_instance_assignment -name IO_STANDARD "HSSI DIFFERENTIAL I/O" -to BCK_TX[13] -set_instance_assignment -name XCVR_A10_TX_VOD_OUTPUT_SWING_CTRL 30 -to BCK_TX[13] -set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to BCK_TX[13] -set_instance_assignment -name XCVR_A10_TX_COMPENSATION_EN ENABLE -to BCK_TX[13] -set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SWITCHING_CTRL_1ST_POST_TAP 0 -to BCK_TX[13] -set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SIGN_1ST_POST_TAP FIR_POST_1T_POS -to BCK_TX[13] - -set_instance_assignment -name IO_STANDARD "HSSI DIFFERENTIAL I/O" -to BCK_TX[14] -set_instance_assignment -name XCVR_A10_TX_VOD_OUTPUT_SWING_CTRL 30 -to BCK_TX[14] -set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to BCK_TX[14] -set_instance_assignment -name XCVR_A10_TX_COMPENSATION_EN ENABLE -to BCK_TX[14] -set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SWITCHING_CTRL_1ST_POST_TAP 0 -to BCK_TX[14] -set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SIGN_1ST_POST_TAP FIR_POST_1T_POS -to BCK_TX[14] - -set_instance_assignment -name IO_STANDARD "HSSI DIFFERENTIAL I/O" -to BCK_TX[15] -set_instance_assignment -name XCVR_A10_TX_VOD_OUTPUT_SWING_CTRL 30 -to BCK_TX[15] -set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to BCK_TX[15] -set_instance_assignment -name XCVR_A10_TX_COMPENSATION_EN ENABLE -to BCK_TX[15] -set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SWITCHING_CTRL_1ST_POST_TAP 0 -to BCK_TX[15] -set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SIGN_1ST_POST_TAP FIR_POST_1T_POS -to BCK_TX[15] - -set_instance_assignment -name IO_STANDARD "HSSI DIFFERENTIAL I/O" -to BCK_TX[16] -set_instance_assignment -name XCVR_A10_TX_VOD_OUTPUT_SWING_CTRL 30 -to BCK_TX[16] -set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to BCK_TX[16] -set_instance_assignment -name XCVR_A10_TX_COMPENSATION_EN ENABLE -to BCK_TX[16] -set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SWITCHING_CTRL_1ST_POST_TAP 0 -to BCK_TX[16] -set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SIGN_1ST_POST_TAP FIR_POST_1T_POS -to BCK_TX[16] - -set_instance_assignment -name IO_STANDARD "HSSI DIFFERENTIAL I/O" -to BCK_TX[17] -set_instance_assignment -name XCVR_A10_TX_VOD_OUTPUT_SWING_CTRL 30 -to BCK_TX[17] -set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to BCK_TX[17] -set_instance_assignment -name XCVR_A10_TX_COMPENSATION_EN ENABLE -to BCK_TX[17] -set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SWITCHING_CTRL_1ST_POST_TAP 0 -to BCK_TX[17] -set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SIGN_1ST_POST_TAP FIR_POST_1T_POS -to BCK_TX[17] - -set_instance_assignment -name IO_STANDARD "HSSI DIFFERENTIAL I/O" -to BCK_TX[18] -set_instance_assignment -name XCVR_A10_TX_VOD_OUTPUT_SWING_CTRL 30 -to BCK_TX[18] -set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to BCK_TX[18] -set_instance_assignment -name XCVR_A10_TX_COMPENSATION_EN ENABLE -to BCK_TX[18] -set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SWITCHING_CTRL_1ST_POST_TAP 0 -to BCK_TX[18] -set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SIGN_1ST_POST_TAP FIR_POST_1T_POS -to BCK_TX[18] - -set_instance_assignment -name IO_STANDARD "HSSI DIFFERENTIAL I/O" -to BCK_TX[19] -set_instance_assignment -name XCVR_A10_TX_VOD_OUTPUT_SWING_CTRL 30 -to BCK_TX[19] -set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to BCK_TX[19] -set_instance_assignment -name XCVR_A10_TX_COMPENSATION_EN ENABLE -to BCK_TX[19] -set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SWITCHING_CTRL_1ST_POST_TAP 0 -to BCK_TX[19] -set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SIGN_1ST_POST_TAP FIR_POST_1T_POS -to BCK_TX[19] - -set_instance_assignment -name IO_STANDARD "HSSI DIFFERENTIAL I/O" -to BCK_TX[20] -set_instance_assignment -name XCVR_A10_TX_VOD_OUTPUT_SWING_CTRL 30 -to BCK_TX[20] -set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to BCK_TX[20] -set_instance_assignment -name XCVR_A10_TX_COMPENSATION_EN ENABLE -to BCK_TX[20] -set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SWITCHING_CTRL_1ST_POST_TAP 0 -to BCK_TX[20] -set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SIGN_1ST_POST_TAP FIR_POST_1T_POS -to BCK_TX[20] - -set_instance_assignment -name IO_STANDARD "HSSI DIFFERENTIAL I/O" -to BCK_TX[21] -set_instance_assignment -name XCVR_A10_TX_VOD_OUTPUT_SWING_CTRL 30 -to BCK_TX[21] -set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to BCK_TX[21] -set_instance_assignment -name XCVR_A10_TX_COMPENSATION_EN ENABLE -to BCK_TX[21] -set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SWITCHING_CTRL_1ST_POST_TAP 0 -to BCK_TX[21] -set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SIGN_1ST_POST_TAP FIR_POST_1T_POS -to BCK_TX[21] - -set_instance_assignment -name IO_STANDARD "HSSI DIFFERENTIAL I/O" -to BCK_TX[22] -set_instance_assignment -name XCVR_A10_TX_VOD_OUTPUT_SWING_CTRL 30 -to BCK_TX[22] -set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to BCK_TX[22] -set_instance_assignment -name XCVR_A10_TX_COMPENSATION_EN ENABLE -to BCK_TX[22] -set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SWITCHING_CTRL_1ST_POST_TAP 0 -to BCK_TX[22] -set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SIGN_1ST_POST_TAP FIR_POST_1T_POS -to BCK_TX[22] - -set_instance_assignment -name IO_STANDARD "HSSI DIFFERENTIAL I/O" -to BCK_TX[23] -set_instance_assignment -name XCVR_A10_TX_VOD_OUTPUT_SWING_CTRL 30 -to BCK_TX[23] -set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to BCK_TX[23] -set_instance_assignment -name XCVR_A10_TX_COMPENSATION_EN ENABLE -to BCK_TX[23] -set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SWITCHING_CTRL_1ST_POST_TAP 0 -to BCK_TX[23] -set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SIGN_1ST_POST_TAP FIR_POST_1T_POS -to BCK_TX[23] - -# Substitute new signal names from the jesd_simple design -set_instance_assignment -name IO_STANDARD LVDS -to BCK_REF_CLK -set_instance_assignment -name IO_STANDARD LVDS -to "BCK_REF_CLK(n)" -set_instance_assignment -name XCVR_A10_RX_TERM_SEL R_R1 -to BCK_REF_CLK -set_location_assignment PIN_V9 -to BCK_REF_CLK -set_location_assignment PIN_V10 -to "BCK_REF_CLK(n)" - -set_instance_assignment -name IO_STANDARD LVDS -to JESD204B_SYSREF -set_instance_assignment -name IO_STANDARD LVDS -to "JESD204B_SYSREF(n)" -set_instance_assignment -name XCVR_A10_RX_TERM_SEL R_R1 -to JESD204B_SYSREF -set_location_assignment PIN_Y13 -to JESD204B_SYSREF -set_location_assignment PIN_Y12 -to "JESD204B_SYSREF(n)" - -set_location_assignment PIN_AD12 -to JESD204B_SYNC_N[0] -set_location_assignment PIN_AC13 -to JESD204B_SYNC_N[1] -set_location_assignment PIN_AA13 -to JESD204B_SYNC_N[2] -set_location_assignment PIN_AA12 -to JESD204B_SYNC_N[3] -#set_location_assignment PIN_V14 -to JESD204B_SYNC_N[4] -#set_location_assignment PIN_V12 -to JESD204B_SYNC_N[5] -#set_location_assignment PIN_U14 -to JESD204B_SYNC_N[6] -#set_location_assignment PIN_R13 -to JESD204B_SYNC_N[7] diff --git a/applications/lofar2/designs/lofar2_unb2c_sdp_station/quartus/lofar2_unb2c_sdp_station_ring_pins.tcl b/applications/lofar2/designs/lofar2_unb2c_sdp_station/quartus/lofar2_unb2c_sdp_station_ring_pins.tcl index 748bc03e9fe88d28b0ff06e1824c539e1813f286..4501f2eb662068aa7a8d5bb523615787d5b4c6fe 100644 --- a/applications/lofar2/designs/lofar2_unb2c_sdp_station/quartus/lofar2_unb2c_sdp_station_ring_pins.tcl +++ b/applications/lofar2/designs/lofar2_unb2c_sdp_station/quartus/lofar2_unb2c_sdp_station_ring_pins.tcl @@ -89,27 +89,27 @@ set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SWITCHING_CTRL_1ST_POST_TAP 0 set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SIGN_1ST_POST_TAP FIR_POST_1T_POS -to QSFP_0_TX[2] ### QSFP_0_3 For ring -set_instance_assignment -name IO_STANDARD "HSSI DIFFERENTIAL I/O" -to QSFP_0_RX[3] -set_instance_assignment -name XCVR_A10_RX_TERM_SEL R_R1 -to QSFP_0_RX[3] -set_instance_assignment -name XCVR_A10_RX_ADP_DFE_FXTAP5 RADP_DFE_FXTAP5_0 -to QSFP_0_RX[3] -set_instance_assignment -name XCVR_A10_RX_ADP_DFE_FXTAP4 RADP_DFE_FXTAP4_0 -to QSFP_0_RX[3] -set_instance_assignment -name XCVR_A10_RX_ADP_DFE_FXTAP1 RADP_DFE_FXTAP1_0 -to QSFP_0_RX[3] -set_instance_assignment -name XCVR_A10_RX_ADP_DFE_FXTAP7 RADP_DFE_FXTAP7_0 -to QSFP_0_RX[3] -set_instance_assignment -name XCVR_A10_RX_ADP_DFE_FXTAP6 RADP_DFE_FXTAP6_0 -to QSFP_0_RX[3] -set_instance_assignment -name XCVR_A10_RX_ADP_DFE_FXTAP3 RADP_DFE_FXTAP3_0 -to QSFP_0_RX[3] -set_instance_assignment -name XCVR_A10_RX_ADP_DFE_FXTAP2 RADP_DFE_FXTAP2_0 -to QSFP_0_RX[3] -set_instance_assignment -name XCVR_A10_RX_ONE_STAGE_ENABLE NON_S1_MODE -to QSFP_0_RX[3] -set_instance_assignment -name XCVR_A10_RX_ADP_CTLE_ACGAIN_4S RADP_CTLE_ACGAIN_4S_8 -to QSFP_0_RX[3] -set_instance_assignment -name XCVR_A10_RX_EQ_DC_GAIN_TRIM NO_DC_GAIN -to QSFP_0_RX[3] -set_instance_assignment -name XCVR_A10_RX_ADP_VGA_SEL RADP_VGA_SEL_5 -to QSFP_0_RX[3] -set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to QSFP_0_RX[3] - -set_instance_assignment -name IO_STANDARD "HSSI DIFFERENTIAL I/O" -to QSFP_0_TX[3] -set_instance_assignment -name XCVR_A10_TX_VOD_OUTPUT_SWING_CTRL 30 -to QSFP_0_TX[3] -set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to QSFP_0_TX[3] -set_instance_assignment -name XCVR_A10_TX_COMPENSATION_EN ENABLE -to QSFP_0_TX[3] -set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SWITCHING_CTRL_1ST_POST_TAP 0 -to QSFP_0_TX[3] -set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SIGN_1ST_POST_TAP FIR_POST_1T_POS -to QSFP_0_TX[3] +#set_instance_assignment -name IO_STANDARD "HSSI DIFFERENTIAL I/O" -to QSFP_0_RX[3] +#set_instance_assignment -name XCVR_A10_RX_TERM_SEL R_R1 -to QSFP_0_RX[3] +#set_instance_assignment -name XCVR_A10_RX_ADP_DFE_FXTAP5 RADP_DFE_FXTAP5_0 -to QSFP_0_RX[3] +#set_instance_assignment -name XCVR_A10_RX_ADP_DFE_FXTAP4 RADP_DFE_FXTAP4_0 -to QSFP_0_RX[3] +#set_instance_assignment -name XCVR_A10_RX_ADP_DFE_FXTAP1 RADP_DFE_FXTAP1_0 -to QSFP_0_RX[3] +#set_instance_assignment -name XCVR_A10_RX_ADP_DFE_FXTAP7 RADP_DFE_FXTAP7_0 -to QSFP_0_RX[3] +#set_instance_assignment -name XCVR_A10_RX_ADP_DFE_FXTAP6 RADP_DFE_FXTAP6_0 -to QSFP_0_RX[3] +#set_instance_assignment -name XCVR_A10_RX_ADP_DFE_FXTAP3 RADP_DFE_FXTAP3_0 -to QSFP_0_RX[3] +#set_instance_assignment -name XCVR_A10_RX_ADP_DFE_FXTAP2 RADP_DFE_FXTAP2_0 -to QSFP_0_RX[3] +#set_instance_assignment -name XCVR_A10_RX_ONE_STAGE_ENABLE NON_S1_MODE -to QSFP_0_RX[3] +#set_instance_assignment -name XCVR_A10_RX_ADP_CTLE_ACGAIN_4S RADP_CTLE_ACGAIN_4S_8 -to QSFP_0_RX[3] +#set_instance_assignment -name XCVR_A10_RX_EQ_DC_GAIN_TRIM NO_DC_GAIN -to QSFP_0_RX[3] +#set_instance_assignment -name XCVR_A10_RX_ADP_VGA_SEL RADP_VGA_SEL_5 -to QSFP_0_RX[3] +#set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to QSFP_0_RX[3] +# +#set_instance_assignment -name IO_STANDARD "HSSI DIFFERENTIAL I/O" -to QSFP_0_TX[3] +#set_instance_assignment -name XCVR_A10_TX_VOD_OUTPUT_SWING_CTRL 30 -to QSFP_0_TX[3] +#set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to QSFP_0_TX[3] +#set_instance_assignment -name XCVR_A10_TX_COMPENSATION_EN ENABLE -to QSFP_0_TX[3] +#set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SWITCHING_CTRL_1ST_POST_TAP 0 -to QSFP_0_TX[3] +#set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SIGN_1ST_POST_TAP FIR_POST_1T_POS -to QSFP_0_TX[3] #RING_0 RX assignments set_instance_assignment -name IO_STANDARD "HSSI DIFFERENTIAL I/O" -to RING_0_RX[0] @@ -157,20 +157,20 @@ set_instance_assignment -name XCVR_A10_RX_EQ_DC_GAIN_TRIM NO_DC_GAIN -to set_instance_assignment -name XCVR_A10_RX_ADP_VGA_SEL RADP_VGA_SEL_3 -to RING_0_RX[2] set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to RING_0_RX[2] -set_instance_assignment -name IO_STANDARD "HSSI DIFFERENTIAL I/O" -to RING_0_RX[3] -set_instance_assignment -name XCVR_A10_RX_TERM_SEL R_R1 -to RING_0_RX[3] -set_instance_assignment -name XCVR_A10_RX_ADP_DFE_FXTAP5 RADP_DFE_FXTAP5_0 -to RING_0_RX[3] -set_instance_assignment -name XCVR_A10_RX_ADP_DFE_FXTAP4 RADP_DFE_FXTAP4_0 -to RING_0_RX[3] -set_instance_assignment -name XCVR_A10_RX_ADP_DFE_FXTAP1 RADP_DFE_FXTAP1_0 -to RING_0_RX[3] -set_instance_assignment -name XCVR_A10_RX_ADP_DFE_FXTAP7 RADP_DFE_FXTAP7_0 -to RING_0_RX[3] -set_instance_assignment -name XCVR_A10_RX_ADP_DFE_FXTAP6 RADP_DFE_FXTAP6_0 -to RING_0_RX[3] -set_instance_assignment -name XCVR_A10_RX_ADP_DFE_FXTAP3 RADP_DFE_FXTAP3_0 -to RING_0_RX[3] -set_instance_assignment -name XCVR_A10_RX_ADP_DFE_FXTAP2 RADP_DFE_FXTAP2_0 -to RING_0_RX[3] -set_instance_assignment -name XCVR_A10_RX_ONE_STAGE_ENABLE NON_S1_MODE -to RING_0_RX[3] -set_instance_assignment -name XCVR_A10_RX_ADP_CTLE_ACGAIN_4S RADP_CTLE_ACGAIN_4S_12 -to RING_0_RX[3] -set_instance_assignment -name XCVR_A10_RX_EQ_DC_GAIN_TRIM NO_DC_GAIN -to RING_0_RX[3] -set_instance_assignment -name XCVR_A10_RX_ADP_VGA_SEL RADP_VGA_SEL_3 -to RING_0_RX[3] -set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to RING_0_RX[3] +#set_instance_assignment -name IO_STANDARD "HSSI DIFFERENTIAL I/O" -to RING_0_RX[3] +#set_instance_assignment -name XCVR_A10_RX_TERM_SEL R_R1 -to RING_0_RX[3] +#set_instance_assignment -name XCVR_A10_RX_ADP_DFE_FXTAP5 RADP_DFE_FXTAP5_0 -to RING_0_RX[3] +#set_instance_assignment -name XCVR_A10_RX_ADP_DFE_FXTAP4 RADP_DFE_FXTAP4_0 -to RING_0_RX[3] +#set_instance_assignment -name XCVR_A10_RX_ADP_DFE_FXTAP1 RADP_DFE_FXTAP1_0 -to RING_0_RX[3] +#set_instance_assignment -name XCVR_A10_RX_ADP_DFE_FXTAP7 RADP_DFE_FXTAP7_0 -to RING_0_RX[3] +#set_instance_assignment -name XCVR_A10_RX_ADP_DFE_FXTAP6 RADP_DFE_FXTAP6_0 -to RING_0_RX[3] +#set_instance_assignment -name XCVR_A10_RX_ADP_DFE_FXTAP3 RADP_DFE_FXTAP3_0 -to RING_0_RX[3] +#set_instance_assignment -name XCVR_A10_RX_ADP_DFE_FXTAP2 RADP_DFE_FXTAP2_0 -to RING_0_RX[3] +#set_instance_assignment -name XCVR_A10_RX_ONE_STAGE_ENABLE NON_S1_MODE -to RING_0_RX[3] +#set_instance_assignment -name XCVR_A10_RX_ADP_CTLE_ACGAIN_4S RADP_CTLE_ACGAIN_4S_12 -to RING_0_RX[3] +#set_instance_assignment -name XCVR_A10_RX_EQ_DC_GAIN_TRIM NO_DC_GAIN -to RING_0_RX[3] +#set_instance_assignment -name XCVR_A10_RX_ADP_VGA_SEL RADP_VGA_SEL_3 -to RING_0_RX[3] +#set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to RING_0_RX[3] #RING_1 RX assignments @@ -219,20 +219,20 @@ set_instance_assignment -name XCVR_A10_RX_EQ_DC_GAIN_TRIM NO_DC_GAIN -to set_instance_assignment -name XCVR_A10_RX_ADP_VGA_SEL RADP_VGA_SEL_3 -to RING_1_RX[2] set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to RING_1_RX[2] -set_instance_assignment -name IO_STANDARD "HSSI DIFFERENTIAL I/O" -to RING_1_RX[3] -set_instance_assignment -name XCVR_A10_RX_TERM_SEL R_R1 -to RING_1_RX[3] -set_instance_assignment -name XCVR_A10_RX_ADP_DFE_FXTAP5 RADP_DFE_FXTAP5_0 -to RING_1_RX[3] -set_instance_assignment -name XCVR_A10_RX_ADP_DFE_FXTAP4 RADP_DFE_FXTAP4_0 -to RING_1_RX[3] -set_instance_assignment -name XCVR_A10_RX_ADP_DFE_FXTAP1 RADP_DFE_FXTAP1_0 -to RING_1_RX[3] -set_instance_assignment -name XCVR_A10_RX_ADP_DFE_FXTAP7 RADP_DFE_FXTAP7_0 -to RING_1_RX[3] -set_instance_assignment -name XCVR_A10_RX_ADP_DFE_FXTAP6 RADP_DFE_FXTAP6_0 -to RING_1_RX[3] -set_instance_assignment -name XCVR_A10_RX_ADP_DFE_FXTAP3 RADP_DFE_FXTAP3_0 -to RING_1_RX[3] -set_instance_assignment -name XCVR_A10_RX_ADP_DFE_FXTAP2 RADP_DFE_FXTAP2_0 -to RING_1_RX[3] -set_instance_assignment -name XCVR_A10_RX_ONE_STAGE_ENABLE NON_S1_MODE -to RING_1_RX[3] -set_instance_assignment -name XCVR_A10_RX_ADP_CTLE_ACGAIN_4S RADP_CTLE_ACGAIN_4S_12 -to RING_1_RX[3] -set_instance_assignment -name XCVR_A10_RX_EQ_DC_GAIN_TRIM NO_DC_GAIN -to RING_1_RX[3] -set_instance_assignment -name XCVR_A10_RX_ADP_VGA_SEL RADP_VGA_SEL_3 -to RING_1_RX[3] -set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to RING_1_RX[3] +#set_instance_assignment -name IO_STANDARD "HSSI DIFFERENTIAL I/O" -to RING_1_RX[3] +#set_instance_assignment -name XCVR_A10_RX_TERM_SEL R_R1 -to RING_1_RX[3] +#set_instance_assignment -name XCVR_A10_RX_ADP_DFE_FXTAP5 RADP_DFE_FXTAP5_0 -to RING_1_RX[3] +#set_instance_assignment -name XCVR_A10_RX_ADP_DFE_FXTAP4 RADP_DFE_FXTAP4_0 -to RING_1_RX[3] +#set_instance_assignment -name XCVR_A10_RX_ADP_DFE_FXTAP1 RADP_DFE_FXTAP1_0 -to RING_1_RX[3] +#set_instance_assignment -name XCVR_A10_RX_ADP_DFE_FXTAP7 RADP_DFE_FXTAP7_0 -to RING_1_RX[3] +#set_instance_assignment -name XCVR_A10_RX_ADP_DFE_FXTAP6 RADP_DFE_FXTAP6_0 -to RING_1_RX[3] +#set_instance_assignment -name XCVR_A10_RX_ADP_DFE_FXTAP3 RADP_DFE_FXTAP3_0 -to RING_1_RX[3] +#set_instance_assignment -name XCVR_A10_RX_ADP_DFE_FXTAP2 RADP_DFE_FXTAP2_0 -to RING_1_RX[3] +#set_instance_assignment -name XCVR_A10_RX_ONE_STAGE_ENABLE NON_S1_MODE -to RING_1_RX[3] +#set_instance_assignment -name XCVR_A10_RX_ADP_CTLE_ACGAIN_4S RADP_CTLE_ACGAIN_4S_12 -to RING_1_RX[3] +#set_instance_assignment -name XCVR_A10_RX_EQ_DC_GAIN_TRIM NO_DC_GAIN -to RING_1_RX[3] +#set_instance_assignment -name XCVR_A10_RX_ADP_VGA_SEL RADP_VGA_SEL_3 -to RING_1_RX[3] +#set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to RING_1_RX[3] #RING_0 TX assignments @@ -257,12 +257,12 @@ set_instance_assignment -name XCVR_A10_TX_COMPENSATION_EN ENABLE -to set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SWITCHING_CTRL_1ST_POST_TAP 0 -to RING_0_TX[2] set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SIGN_1ST_POST_TAP FIR_POST_1T_POS -to RING_0_TX[2] -set_instance_assignment -name IO_STANDARD "HSSI DIFFERENTIAL I/O" -to RING_0_TX[3] -set_instance_assignment -name XCVR_A10_TX_VOD_OUTPUT_SWING_CTRL 30 -to RING_0_TX[3] -set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to RING_0_TX[3] -set_instance_assignment -name XCVR_A10_TX_COMPENSATION_EN ENABLE -to RING_0_TX[3] -set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SWITCHING_CTRL_1ST_POST_TAP 0 -to RING_0_TX[3] -set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SIGN_1ST_POST_TAP FIR_POST_1T_POS -to RING_0_TX[3] +#set_instance_assignment -name IO_STANDARD "HSSI DIFFERENTIAL I/O" -to RING_0_TX[3] +#set_instance_assignment -name XCVR_A10_TX_VOD_OUTPUT_SWING_CTRL 30 -to RING_0_TX[3] +#set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to RING_0_TX[3] +#set_instance_assignment -name XCVR_A10_TX_COMPENSATION_EN ENABLE -to RING_0_TX[3] +#set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SWITCHING_CTRL_1ST_POST_TAP 0 -to RING_0_TX[3] +#set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SIGN_1ST_POST_TAP FIR_POST_1T_POS -to RING_0_TX[3] #RING_1 TX assignments @@ -287,11 +287,11 @@ set_instance_assignment -name XCVR_A10_TX_COMPENSATION_EN ENABLE -to set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SWITCHING_CTRL_1ST_POST_TAP 0 -to RING_1_TX[2] set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SIGN_1ST_POST_TAP FIR_POST_1T_POS -to RING_1_TX[2] -set_instance_assignment -name IO_STANDARD "HSSI DIFFERENTIAL I/O" -to RING_1_TX[3] -set_instance_assignment -name XCVR_A10_TX_VOD_OUTPUT_SWING_CTRL 30 -to RING_1_TX[3] -set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to RING_1_TX[3] -set_instance_assignment -name XCVR_A10_TX_COMPENSATION_EN ENABLE -to RING_1_TX[3] -set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SWITCHING_CTRL_1ST_POST_TAP 0 -to RING_1_TX[3] -set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SIGN_1ST_POST_TAP FIR_POST_1T_POS -to RING_1_TX[3] +#set_instance_assignment -name IO_STANDARD "HSSI DIFFERENTIAL I/O" -to RING_1_TX[3] +#set_instance_assignment -name XCVR_A10_TX_VOD_OUTPUT_SWING_CTRL 30 -to RING_1_TX[3] +#set_instance_assignment -name XCVR_VCCR_VCCT_VOLTAGE 1_0V -to RING_1_TX[3] +#set_instance_assignment -name XCVR_A10_TX_COMPENSATION_EN ENABLE -to RING_1_TX[3] +#set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SWITCHING_CTRL_1ST_POST_TAP 0 -to RING_1_TX[3] +#set_instance_assignment -name XCVR_A10_TX_PRE_EMP_SIGN_1ST_POST_TAP FIR_POST_1T_POS -to RING_1_TX[3] diff --git a/applications/lofar2/designs/lofar2_unb2c_sdp_station/revisions/lofar2_unb2c_sdp_station_adc/hdllib.cfg b/applications/lofar2/designs/lofar2_unb2c_sdp_station/revisions/lofar2_unb2c_sdp_station_adc/hdllib.cfg index edc7654dd14d55a2e134921300f4c6565563bfd8..7f675d0e7b090fd31557b32f2c5f5973fe3dbf19 100644 --- a/applications/lofar2/designs/lofar2_unb2c_sdp_station/revisions/lofar2_unb2c_sdp_station_adc/hdllib.cfg +++ b/applications/lofar2/designs/lofar2_unb2c_sdp_station/revisions/lofar2_unb2c_sdp_station_adc/hdllib.cfg @@ -32,7 +32,7 @@ quartus_sdc_files = ../../quartus/lofar2_unb2c_sdp_station.sdc quartus_tcl_files = - ../../quartus/lofar2_unb2c_sdp_station_pins.tcl + lofar2_unb2c_sdp_station_pins.tcl quartus_vhdl_files = diff --git a/applications/lofar2/designs/lofar2_unb2c_sdp_station/revisions/lofar2_unb2c_sdp_station_adc/lofar2_unb2c_sdp_station_adc_pins.tcl b/applications/lofar2/designs/lofar2_unb2c_sdp_station/revisions/lofar2_unb2c_sdp_station_adc/lofar2_unb2c_sdp_station_adc_pins.tcl new file mode 100644 index 0000000000000000000000000000000000000000..b689b7d674278bcc88a9dabee9475a57fe4de9a9 --- /dev/null +++ b/applications/lofar2/designs/lofar2_unb2c_sdp_station/revisions/lofar2_unb2c_sdp_station_adc/lofar2_unb2c_sdp_station_adc_pins.tcl @@ -0,0 +1,24 @@ +############################################################################### +# +# Copyright (C) 2022 +# ASTRON (Netherlands Institute for Radio Astronomy) <http://www.astron.nl/> +# P.O.Box 2, 7990 AA Dwingeloo, The Netherlands +# +# This program is free software: you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation, either version 3 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program. If not, see <http://www.gnu.org/licenses/>. +# +############################################################################### +source $::env(RADIOHDL_WORK)/applications/lofar2/designs/lofar2_unb2c_sdp_station/quartus/lofar2_unb2c_sdp_station_pins.tcl +source $::env(RADIOHDL_WORK)/applications/lofar2/designs/lofar2_unb2c_sdp_station/quartus/lofar2_unb2c_sdp_station_jesd_pins.tcl + + diff --git a/applications/lofar2/designs/lofar2_unb2c_sdp_station/revisions/lofar2_unb2c_sdp_station_bf/lofar2_unb2c_sdp_station_bf_pins.tcl b/applications/lofar2/designs/lofar2_unb2c_sdp_station/revisions/lofar2_unb2c_sdp_station_bf/lofar2_unb2c_sdp_station_bf_pins.tcl index db439a63607ed860d49b0c86da202c8614491925..64f05f663474c04abcfb73051fdc09cea1cf843c 100644 --- a/applications/lofar2/designs/lofar2_unb2c_sdp_station/revisions/lofar2_unb2c_sdp_station_bf/lofar2_unb2c_sdp_station_bf_pins.tcl +++ b/applications/lofar2/designs/lofar2_unb2c_sdp_station/revisions/lofar2_unb2c_sdp_station_bf/lofar2_unb2c_sdp_station_bf_pins.tcl @@ -19,6 +19,7 @@ # ############################################################################### source $::env(RADIOHDL_WORK)/applications/lofar2/designs/lofar2_unb2c_sdp_station/quartus/lofar2_unb2c_sdp_station_pins.tcl +source $::env(RADIOHDL_WORK)/applications/lofar2/designs/lofar2_unb2c_sdp_station/quartus/lofar2_unb2c_sdp_station_jesd_pins.tcl source $::env(RADIOHDL_WORK)/applications/lofar2/designs/lofar2_unb2c_sdp_station/quartus/lofar2_unb2c_sdp_station_beamlets_pins.tcl diff --git a/applications/lofar2/designs/lofar2_unb2c_sdp_station/revisions/lofar2_unb2c_sdp_station_bf_ring/lofar2_unb2c_sdp_station_bf_ring_pins.tcl b/applications/lofar2/designs/lofar2_unb2c_sdp_station/revisions/lofar2_unb2c_sdp_station_bf_ring/lofar2_unb2c_sdp_station_bf_ring_pins.tcl index fbaf7c6ca74ab8b72e3a3555b42428fd3fea1573..5a869c76f2093d4a8594508c9dbd601bea0717c4 100644 --- a/applications/lofar2/designs/lofar2_unb2c_sdp_station/revisions/lofar2_unb2c_sdp_station_bf_ring/lofar2_unb2c_sdp_station_bf_ring_pins.tcl +++ b/applications/lofar2/designs/lofar2_unb2c_sdp_station/revisions/lofar2_unb2c_sdp_station_bf_ring/lofar2_unb2c_sdp_station_bf_ring_pins.tcl @@ -19,6 +19,7 @@ # ############################################################################### source $::env(RADIOHDL_WORK)/applications/lofar2/designs/lofar2_unb2c_sdp_station/quartus/lofar2_unb2c_sdp_station_pins.tcl +source $::env(RADIOHDL_WORK)/applications/lofar2/designs/lofar2_unb2c_sdp_station/quartus/lofar2_unb2c_sdp_station_jesd_pins.tcl source $::env(RADIOHDL_WORK)/applications/lofar2/designs/lofar2_unb2c_sdp_station/quartus/lofar2_unb2c_sdp_station_beamlets_pins.tcl source $::env(RADIOHDL_WORK)/applications/lofar2/designs/lofar2_unb2c_sdp_station/quartus/lofar2_unb2c_sdp_station_ring_pins.tcl diff --git a/applications/lofar2/designs/lofar2_unb2c_sdp_station/revisions/lofar2_unb2c_sdp_station_fsub/hdllib.cfg b/applications/lofar2/designs/lofar2_unb2c_sdp_station/revisions/lofar2_unb2c_sdp_station_fsub/hdllib.cfg index 654be74701c3ac9cc1329aafa16bec089a3c644e..c0e3592aeeb6c82d36d6407b4da604c6c47abf73 100644 --- a/applications/lofar2/designs/lofar2_unb2c_sdp_station/revisions/lofar2_unb2c_sdp_station_fsub/hdllib.cfg +++ b/applications/lofar2/designs/lofar2_unb2c_sdp_station/revisions/lofar2_unb2c_sdp_station_fsub/hdllib.cfg @@ -39,7 +39,7 @@ quartus_sdc_files = #$RADIOHDL_WORK/boards/uniboard2c/libraries/unb2c_board/quartus/unb2c_board.sdc quartus_tcl_files = - ../../quartus/lofar2_unb2c_sdp_station_pins.tcl + lofar2_unb2c_sdp_station_pins.tcl quartus_vhdl_files = diff --git a/applications/lofar2/designs/lofar2_unb2c_sdp_station/revisions/lofar2_unb2c_sdp_station_fsub/lofar2_unb2c_sdp_station_fsub_pins.tcl b/applications/lofar2/designs/lofar2_unb2c_sdp_station/revisions/lofar2_unb2c_sdp_station_fsub/lofar2_unb2c_sdp_station_fsub_pins.tcl new file mode 100644 index 0000000000000000000000000000000000000000..b689b7d674278bcc88a9dabee9475a57fe4de9a9 --- /dev/null +++ b/applications/lofar2/designs/lofar2_unb2c_sdp_station/revisions/lofar2_unb2c_sdp_station_fsub/lofar2_unb2c_sdp_station_fsub_pins.tcl @@ -0,0 +1,24 @@ +############################################################################### +# +# Copyright (C) 2022 +# ASTRON (Netherlands Institute for Radio Astronomy) <http://www.astron.nl/> +# P.O.Box 2, 7990 AA Dwingeloo, The Netherlands +# +# This program is free software: you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation, either version 3 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program. If not, see <http://www.gnu.org/licenses/>. +# +############################################################################### +source $::env(RADIOHDL_WORK)/applications/lofar2/designs/lofar2_unb2c_sdp_station/quartus/lofar2_unb2c_sdp_station_pins.tcl +source $::env(RADIOHDL_WORK)/applications/lofar2/designs/lofar2_unb2c_sdp_station/quartus/lofar2_unb2c_sdp_station_jesd_pins.tcl + + diff --git a/applications/lofar2/designs/lofar2_unb2c_sdp_station/revisions/lofar2_unb2c_sdp_station_full/lofar2_unb2c_sdp_station_full.vhd b/applications/lofar2/designs/lofar2_unb2c_sdp_station/revisions/lofar2_unb2c_sdp_station_full/lofar2_unb2c_sdp_station_full.vhd index bbbc8a82eef50ed16480476f7e03f31e83dc0e42..f5650bac12b1297127d39c624d1a4f2fbb3b60f6 100644 --- a/applications/lofar2/designs/lofar2_unb2c_sdp_station/revisions/lofar2_unb2c_sdp_station_full/lofar2_unb2c_sdp_station_full.vhd +++ b/applications/lofar2/designs/lofar2_unb2c_sdp_station/revisions/lofar2_unb2c_sdp_station_full/lofar2_unb2c_sdp_station_full.vhd @@ -23,7 +23,7 @@ -- Wrapper for Lofar2 SDP Station full design -- Description: -- Unb2c version for lab testing --- Contains complete AIT input stage with 12 ADC streams, FSUB, XSUB and BF +-- Contains complete AIT input stage with 12 ADC streams, FSUB, XSUB, BF and RING LIBRARY IEEE, common_lib, unb2c_board_lib, technology_lib, diag_lib, dp_lib, tech_jesd204b_lib, lofar2_unb2c_sdp_station_lib; diff --git a/applications/lofar2/designs/lofar2_unb2c_sdp_station/revisions/lofar2_unb2c_sdp_station_full/lofar2_unb2c_sdp_station_full_pins.tcl b/applications/lofar2/designs/lofar2_unb2c_sdp_station/revisions/lofar2_unb2c_sdp_station_full/lofar2_unb2c_sdp_station_full_pins.tcl index 4ceebdedad386e07a109627cae9cd0a15507fa48..273a627af9469a3f619164eee8ded453c302cb7f 100644 --- a/applications/lofar2/designs/lofar2_unb2c_sdp_station/revisions/lofar2_unb2c_sdp_station_full/lofar2_unb2c_sdp_station_full_pins.tcl +++ b/applications/lofar2/designs/lofar2_unb2c_sdp_station/revisions/lofar2_unb2c_sdp_station_full/lofar2_unb2c_sdp_station_full_pins.tcl @@ -19,6 +19,7 @@ # ############################################################################### source $::env(RADIOHDL_WORK)/applications/lofar2/designs/lofar2_unb2c_sdp_station/quartus/lofar2_unb2c_sdp_station_pins.tcl +source $::env(RADIOHDL_WORK)/applications/lofar2/designs/lofar2_unb2c_sdp_station/quartus/lofar2_unb2c_sdp_station_jesd_pins.tcl source $::env(RADIOHDL_WORK)/applications/lofar2/designs/lofar2_unb2c_sdp_station/quartus/lofar2_unb2c_sdp_station_ring_pins.tcl source $::env(RADIOHDL_WORK)/applications/lofar2/designs/lofar2_unb2c_sdp_station/quartus/lofar2_unb2c_sdp_station_beamlets_pins.tcl diff --git a/applications/lofar2/designs/lofar2_unb2c_sdp_station/revisions/lofar2_unb2c_sdp_station_full_wg/hdllib.cfg b/applications/lofar2/designs/lofar2_unb2c_sdp_station/revisions/lofar2_unb2c_sdp_station_full_wg/hdllib.cfg new file mode 100644 index 0000000000000000000000000000000000000000..a410171732d585af43e09c416c83338a96453761 --- /dev/null +++ b/applications/lofar2/designs/lofar2_unb2c_sdp_station/revisions/lofar2_unb2c_sdp_station_full_wg/hdllib.cfg @@ -0,0 +1,129 @@ +hdl_lib_name = lofar2_unb2c_sdp_station_full_wg +hdl_library_clause_name = lofar2_unb2c_sdp_station_full_wg_lib +hdl_lib_uses_synth = common mm technology unb2c_board lofar2_unb2c_sdp_station +hdl_lib_uses_sim = eth +hdl_lib_technology = ip_arria10_e2sg + + synth_files = + lofar2_unb2c_sdp_station_full_wg.vhd + +test_bench_files = + +regression_test_vhdl = + +[modelsim_project_file] +modelsim_copy_files = + ../../src/data data + $RADIOHDL_WORK/libraries/dsp/filter/src/hex data # FIR filter coefficients + # Overwrite bf weights with sim data + ../../tb/data data + +[quartus_project_file] +synth_top_level_entity = + +quartus_copy_files = + # Note: path $RADIOHDL_WORK is equivalent to relative path ../../../../../../ + ../../quartus . + ../../src/data data + $RADIOHDL_WORK/libraries/dsp/filter/src/hex data # FIR filter coefficients + +quartus_qsf_files = + $RADIOHDL_WORK/boards/uniboard2c/libraries/unb2c_board/quartus/unb2c_board.qsf + +# use lofar2_unb2c_sdp_station.sdc instead because BCK_REF_CLK is 200MHz, not 644.33MHz. +quartus_sdc_files = + ../../quartus/lofar2_unb2c_sdp_station.sdc + #$RADIOHDL_WORK/boards/uniboard2c/libraries/unb2c_board/quartus/unb2c_board.sdc + +quartus_tcl_files = + lofar2_unb2c_sdp_station_full_wg_pins.tcl + +quartus_vhdl_files = + +quartus_qip_files = + $RADIOHDL_BUILD_DIR/unb2c/quartus/lofar2_unb2c_sdp_station_full_wg/qsys_lofar2_unb2c_sdp_station/qsys_lofar2_unb2c_sdp_station.qip + +quartus_ip_files = + $RADIOHDL_BUILD_DIR/unb2c/quartus/lofar2_unb2c_sdp_station/ip/qsys_lofar2_unb2c_sdp_station/qsys_lofar2_unb2c_sdp_station_avs_common_mm_0.ip + $RADIOHDL_BUILD_DIR/unb2c/quartus/lofar2_unb2c_sdp_station/ip/qsys_lofar2_unb2c_sdp_station/qsys_lofar2_unb2c_sdp_station_avs_common_mm_1.ip + $RADIOHDL_BUILD_DIR/unb2c/quartus/lofar2_unb2c_sdp_station/ip/qsys_lofar2_unb2c_sdp_station/qsys_lofar2_unb2c_sdp_station_avs_eth_0.ip + $RADIOHDL_BUILD_DIR/unb2c/quartus/lofar2_unb2c_sdp_station/ip/qsys_lofar2_unb2c_sdp_station/qsys_lofar2_unb2c_sdp_station_clk_0.ip + $RADIOHDL_BUILD_DIR/unb2c/quartus/lofar2_unb2c_sdp_station/ip/qsys_lofar2_unb2c_sdp_station/qsys_lofar2_unb2c_sdp_station_cpu_0.ip + $RADIOHDL_BUILD_DIR/unb2c/quartus/lofar2_unb2c_sdp_station/ip/qsys_lofar2_unb2c_sdp_station/qsys_lofar2_unb2c_sdp_station_jesd204b.ip + $RADIOHDL_BUILD_DIR/unb2c/quartus/lofar2_unb2c_sdp_station/ip/qsys_lofar2_unb2c_sdp_station/qsys_lofar2_unb2c_sdp_station_jtag_uart_0.ip + $RADIOHDL_BUILD_DIR/unb2c/quartus/lofar2_unb2c_sdp_station/ip/qsys_lofar2_unb2c_sdp_station/qsys_lofar2_unb2c_sdp_station_onchip_memory2_0.ip + $RADIOHDL_BUILD_DIR/unb2c/quartus/lofar2_unb2c_sdp_station/ip/qsys_lofar2_unb2c_sdp_station/qsys_lofar2_unb2c_sdp_station_pio_jesd_ctrl.ip + $RADIOHDL_BUILD_DIR/unb2c/quartus/lofar2_unb2c_sdp_station/ip/qsys_lofar2_unb2c_sdp_station/qsys_lofar2_unb2c_sdp_station_pio_pps.ip + $RADIOHDL_BUILD_DIR/unb2c/quartus/lofar2_unb2c_sdp_station/ip/qsys_lofar2_unb2c_sdp_station/qsys_lofar2_unb2c_sdp_station_pio_system_info.ip + $RADIOHDL_BUILD_DIR/unb2c/quartus/lofar2_unb2c_sdp_station/ip/qsys_lofar2_unb2c_sdp_station/qsys_lofar2_unb2c_sdp_station_pio_wdi.ip + $RADIOHDL_BUILD_DIR/unb2c/quartus/lofar2_unb2c_sdp_station/ip/qsys_lofar2_unb2c_sdp_station/qsys_lofar2_unb2c_sdp_station_ram_bf_weights.ip + $RADIOHDL_BUILD_DIR/unb2c/quartus/lofar2_unb2c_sdp_station/ip/qsys_lofar2_unb2c_sdp_station/qsys_lofar2_unb2c_sdp_station_ram_diag_data_buffer_bsn.ip + $RADIOHDL_BUILD_DIR/unb2c/quartus/lofar2_unb2c_sdp_station/ip/qsys_lofar2_unb2c_sdp_station/qsys_lofar2_unb2c_sdp_station_ram_equalizer_gains.ip + $RADIOHDL_BUILD_DIR/unb2c/quartus/lofar2_unb2c_sdp_station/ip/qsys_lofar2_unb2c_sdp_station/qsys_lofar2_unb2c_sdp_station_ram_fil_coefs.ip + $RADIOHDL_BUILD_DIR/unb2c/quartus/lofar2_unb2c_sdp_station/ip/qsys_lofar2_unb2c_sdp_station/qsys_lofar2_unb2c_sdp_station_ram_scrap.ip + $RADIOHDL_BUILD_DIR/unb2c/quartus/lofar2_unb2c_sdp_station/ip/qsys_lofar2_unb2c_sdp_station/qsys_lofar2_unb2c_sdp_station_ram_ss_ss_wide.ip + $RADIOHDL_BUILD_DIR/unb2c/quartus/lofar2_unb2c_sdp_station/ip/qsys_lofar2_unb2c_sdp_station/qsys_lofar2_unb2c_sdp_station_ram_st_bst.ip + $RADIOHDL_BUILD_DIR/unb2c/quartus/lofar2_unb2c_sdp_station/ip/qsys_lofar2_unb2c_sdp_station/qsys_lofar2_unb2c_sdp_station_ram_st_histogram.ip + $RADIOHDL_BUILD_DIR/unb2c/quartus/lofar2_unb2c_sdp_station/ip/qsys_lofar2_unb2c_sdp_station/qsys_lofar2_unb2c_sdp_station_ram_st_sst.ip + $RADIOHDL_BUILD_DIR/unb2c/quartus/lofar2_unb2c_sdp_station/ip/qsys_lofar2_unb2c_sdp_station/qsys_lofar2_unb2c_sdp_station_ram_st_xsq.ip + $RADIOHDL_BUILD_DIR/unb2c/quartus/lofar2_unb2c_sdp_station/ip/qsys_lofar2_unb2c_sdp_station/qsys_lofar2_unb2c_sdp_station_ram_wg.ip + $RADIOHDL_BUILD_DIR/unb2c/quartus/lofar2_unb2c_sdp_station/ip/qsys_lofar2_unb2c_sdp_station/qsys_lofar2_unb2c_sdp_station_reg_aduh_monitor.ip + $RADIOHDL_BUILD_DIR/unb2c/quartus/lofar2_unb2c_sdp_station/ip/qsys_lofar2_unb2c_sdp_station/qsys_lofar2_unb2c_sdp_station_reg_bf_scale.ip + $RADIOHDL_BUILD_DIR/unb2c/quartus/lofar2_unb2c_sdp_station/ip/qsys_lofar2_unb2c_sdp_station/qsys_lofar2_unb2c_sdp_station_reg_bsn_align_v2_bf.ip + $RADIOHDL_BUILD_DIR/unb2c/quartus/lofar2_unb2c_sdp_station/ip/qsys_lofar2_unb2c_sdp_station/qsys_lofar2_unb2c_sdp_station_reg_bsn_align_v2_xsub.ip + $RADIOHDL_BUILD_DIR/unb2c/quartus/lofar2_unb2c_sdp_station/ip/qsys_lofar2_unb2c_sdp_station/qsys_lofar2_unb2c_sdp_station_reg_bsn_monitor_input.ip + $RADIOHDL_BUILD_DIR/unb2c/quartus/lofar2_unb2c_sdp_station/ip/qsys_lofar2_unb2c_sdp_station/qsys_lofar2_unb2c_sdp_station_reg_bsn_monitor_v2_aligned_bf.ip + $RADIOHDL_BUILD_DIR/unb2c/quartus/lofar2_unb2c_sdp_station/ip/qsys_lofar2_unb2c_sdp_station/qsys_lofar2_unb2c_sdp_station_reg_bsn_monitor_v2_aligned_xsub.ip + $RADIOHDL_BUILD_DIR/unb2c/quartus/lofar2_unb2c_sdp_station/ip/qsys_lofar2_unb2c_sdp_station/qsys_lofar2_unb2c_sdp_station_reg_bsn_monitor_v2_beamlet_output.ip + $RADIOHDL_BUILD_DIR/unb2c/quartus/lofar2_unb2c_sdp_station/ip/qsys_lofar2_unb2c_sdp_station/qsys_lofar2_unb2c_sdp_station_reg_bsn_monitor_v2_bst_offload.ip + $RADIOHDL_BUILD_DIR/unb2c/quartus/lofar2_unb2c_sdp_station/ip/qsys_lofar2_unb2c_sdp_station/qsys_lofar2_unb2c_sdp_station_reg_bsn_monitor_v2_ring_rx_bf.ip + $RADIOHDL_BUILD_DIR/unb2c/quartus/lofar2_unb2c_sdp_station/ip/qsys_lofar2_unb2c_sdp_station/qsys_lofar2_unb2c_sdp_station_reg_bsn_monitor_v2_ring_rx_xst.ip + $RADIOHDL_BUILD_DIR/unb2c/quartus/lofar2_unb2c_sdp_station/ip/qsys_lofar2_unb2c_sdp_station/qsys_lofar2_unb2c_sdp_station_reg_bsn_monitor_v2_ring_tx_bf.ip + $RADIOHDL_BUILD_DIR/unb2c/quartus/lofar2_unb2c_sdp_station/ip/qsys_lofar2_unb2c_sdp_station/qsys_lofar2_unb2c_sdp_station_reg_bsn_monitor_v2_ring_tx_xst.ip + $RADIOHDL_BUILD_DIR/unb2c/quartus/lofar2_unb2c_sdp_station/ip/qsys_lofar2_unb2c_sdp_station/qsys_lofar2_unb2c_sdp_station_reg_bsn_monitor_v2_rx_align_bf.ip + $RADIOHDL_BUILD_DIR/unb2c/quartus/lofar2_unb2c_sdp_station/ip/qsys_lofar2_unb2c_sdp_station/qsys_lofar2_unb2c_sdp_station_reg_bsn_monitor_v2_rx_align_xsub.ip + $RADIOHDL_BUILD_DIR/unb2c/quartus/lofar2_unb2c_sdp_station/ip/qsys_lofar2_unb2c_sdp_station/qsys_lofar2_unb2c_sdp_station_reg_bsn_monitor_v2_sst_offload.ip + $RADIOHDL_BUILD_DIR/unb2c/quartus/lofar2_unb2c_sdp_station/ip/qsys_lofar2_unb2c_sdp_station/qsys_lofar2_unb2c_sdp_station_reg_bsn_monitor_v2_xst_offload.ip + $RADIOHDL_BUILD_DIR/unb2c/quartus/lofar2_unb2c_sdp_station/ip/qsys_lofar2_unb2c_sdp_station/qsys_lofar2_unb2c_sdp_station_reg_bsn_scheduler.ip + $RADIOHDL_BUILD_DIR/unb2c/quartus/lofar2_unb2c_sdp_station/ip/qsys_lofar2_unb2c_sdp_station/qsys_lofar2_unb2c_sdp_station_reg_bsn_source_v2.ip + $RADIOHDL_BUILD_DIR/unb2c/quartus/lofar2_unb2c_sdp_station/ip/qsys_lofar2_unb2c_sdp_station/qsys_lofar2_unb2c_sdp_station_reg_bsn_sync_scheduler_xsub.ip + $RADIOHDL_BUILD_DIR/unb2c/quartus/lofar2_unb2c_sdp_station/ip/qsys_lofar2_unb2c_sdp_station/qsys_lofar2_unb2c_sdp_station_reg_crosslets_info.ip + $RADIOHDL_BUILD_DIR/unb2c/quartus/lofar2_unb2c_sdp_station/ip/qsys_lofar2_unb2c_sdp_station/qsys_lofar2_unb2c_sdp_station_reg_diag_data_buffer_bsn.ip + $RADIOHDL_BUILD_DIR/unb2c/quartus/lofar2_unb2c_sdp_station/ip/qsys_lofar2_unb2c_sdp_station/qsys_lofar2_unb2c_sdp_station_reg_dp_block_validate_bsn_at_sync_bf.ip + $RADIOHDL_BUILD_DIR/unb2c/quartus/lofar2_unb2c_sdp_station/ip/qsys_lofar2_unb2c_sdp_station/qsys_lofar2_unb2c_sdp_station_reg_dp_block_validate_bsn_at_sync_xst.ip + $RADIOHDL_BUILD_DIR/unb2c/quartus/lofar2_unb2c_sdp_station/ip/qsys_lofar2_unb2c_sdp_station/qsys_lofar2_unb2c_sdp_station_reg_dp_block_validate_err_bf.ip + $RADIOHDL_BUILD_DIR/unb2c/quartus/lofar2_unb2c_sdp_station/ip/qsys_lofar2_unb2c_sdp_station/qsys_lofar2_unb2c_sdp_station_reg_dp_block_validate_err_xst.ip + $RADIOHDL_BUILD_DIR/unb2c/quartus/lofar2_unb2c_sdp_station/ip/qsys_lofar2_unb2c_sdp_station/qsys_lofar2_unb2c_sdp_station_reg_dpmm_ctrl.ip + $RADIOHDL_BUILD_DIR/unb2c/quartus/lofar2_unb2c_sdp_station/ip/qsys_lofar2_unb2c_sdp_station/qsys_lofar2_unb2c_sdp_station_reg_dpmm_data.ip + $RADIOHDL_BUILD_DIR/unb2c/quartus/lofar2_unb2c_sdp_station/ip/qsys_lofar2_unb2c_sdp_station/qsys_lofar2_unb2c_sdp_station_reg_dp_selector.ip + $RADIOHDL_BUILD_DIR/unb2c/quartus/lofar2_unb2c_sdp_station/ip/qsys_lofar2_unb2c_sdp_station/qsys_lofar2_unb2c_sdp_station_reg_dp_shiftram.ip + $RADIOHDL_BUILD_DIR/unb2c/quartus/lofar2_unb2c_sdp_station/ip/qsys_lofar2_unb2c_sdp_station/qsys_lofar2_unb2c_sdp_station_reg_dp_xonoff.ip + $RADIOHDL_BUILD_DIR/unb2c/quartus/lofar2_unb2c_sdp_station/ip/qsys_lofar2_unb2c_sdp_station/qsys_lofar2_unb2c_sdp_station_reg_epcs.ip + $RADIOHDL_BUILD_DIR/unb2c/quartus/lofar2_unb2c_sdp_station/ip/qsys_lofar2_unb2c_sdp_station/qsys_lofar2_unb2c_sdp_station_reg_fpga_temp_sens.ip + $RADIOHDL_BUILD_DIR/unb2c/quartus/lofar2_unb2c_sdp_station/ip/qsys_lofar2_unb2c_sdp_station/qsys_lofar2_unb2c_sdp_station_reg_fpga_voltage_sens.ip + $RADIOHDL_BUILD_DIR/unb2c/quartus/lofar2_unb2c_sdp_station/ip/qsys_lofar2_unb2c_sdp_station/qsys_lofar2_unb2c_sdp_station_reg_hdr_dat.ip + $RADIOHDL_BUILD_DIR/unb2c/quartus/lofar2_unb2c_sdp_station/ip/qsys_lofar2_unb2c_sdp_station/qsys_lofar2_unb2c_sdp_station_reg_mmdp_ctrl.ip + $RADIOHDL_BUILD_DIR/unb2c/quartus/lofar2_unb2c_sdp_station/ip/qsys_lofar2_unb2c_sdp_station/qsys_lofar2_unb2c_sdp_station_reg_mmdp_data.ip + $RADIOHDL_BUILD_DIR/unb2c/quartus/lofar2_unb2c_sdp_station/ip/qsys_lofar2_unb2c_sdp_station/qsys_lofar2_unb2c_sdp_station_reg_nof_crosslets.ip + $RADIOHDL_BUILD_DIR/unb2c/quartus/lofar2_unb2c_sdp_station/ip/qsys_lofar2_unb2c_sdp_station/qsys_lofar2_unb2c_sdp_station_reg_nw_10gbe_eth10g.ip + $RADIOHDL_BUILD_DIR/unb2c/quartus/lofar2_unb2c_sdp_station/ip/qsys_lofar2_unb2c_sdp_station/qsys_lofar2_unb2c_sdp_station_reg_nw_10gbe_mac.ip + $RADIOHDL_BUILD_DIR/unb2c/quartus/lofar2_unb2c_sdp_station/ip/qsys_lofar2_unb2c_sdp_station/qsys_lofar2_unb2c_sdp_station_reg_remu.ip + $RADIOHDL_BUILD_DIR/unb2c/quartus/lofar2_unb2c_sdp_station/ip/qsys_lofar2_unb2c_sdp_station/qsys_lofar2_unb2c_sdp_station_reg_ring_info.ip + $RADIOHDL_BUILD_DIR/unb2c/quartus/lofar2_unb2c_sdp_station/ip/qsys_lofar2_unb2c_sdp_station/qsys_lofar2_unb2c_sdp_station_reg_ring_lane_info_bf.ip + $RADIOHDL_BUILD_DIR/unb2c/quartus/lofar2_unb2c_sdp_station/ip/qsys_lofar2_unb2c_sdp_station/qsys_lofar2_unb2c_sdp_station_reg_ring_lane_info_xst.ip + $RADIOHDL_BUILD_DIR/unb2c/quartus/lofar2_unb2c_sdp_station/ip/qsys_lofar2_unb2c_sdp_station/qsys_lofar2_unb2c_sdp_station_reg_sdp_info.ip + $RADIOHDL_BUILD_DIR/unb2c/quartus/lofar2_unb2c_sdp_station/ip/qsys_lofar2_unb2c_sdp_station/qsys_lofar2_unb2c_sdp_station_reg_si.ip + $RADIOHDL_BUILD_DIR/unb2c/quartus/lofar2_unb2c_sdp_station/ip/qsys_lofar2_unb2c_sdp_station/qsys_lofar2_unb2c_sdp_station_reg_stat_enable_bst.ip + $RADIOHDL_BUILD_DIR/unb2c/quartus/lofar2_unb2c_sdp_station/ip/qsys_lofar2_unb2c_sdp_station/qsys_lofar2_unb2c_sdp_station_reg_stat_enable_sst.ip + $RADIOHDL_BUILD_DIR/unb2c/quartus/lofar2_unb2c_sdp_station/ip/qsys_lofar2_unb2c_sdp_station/qsys_lofar2_unb2c_sdp_station_reg_stat_enable_xst.ip + $RADIOHDL_BUILD_DIR/unb2c/quartus/lofar2_unb2c_sdp_station/ip/qsys_lofar2_unb2c_sdp_station/qsys_lofar2_unb2c_sdp_station_reg_stat_hdr_dat_bst.ip + $RADIOHDL_BUILD_DIR/unb2c/quartus/lofar2_unb2c_sdp_station/ip/qsys_lofar2_unb2c_sdp_station/qsys_lofar2_unb2c_sdp_station_reg_stat_hdr_dat_sst.ip + $RADIOHDL_BUILD_DIR/unb2c/quartus/lofar2_unb2c_sdp_station/ip/qsys_lofar2_unb2c_sdp_station/qsys_lofar2_unb2c_sdp_station_reg_stat_hdr_dat_xst.ip + $RADIOHDL_BUILD_DIR/unb2c/quartus/lofar2_unb2c_sdp_station/ip/qsys_lofar2_unb2c_sdp_station/qsys_lofar2_unb2c_sdp_station_reg_tr_10gbe_eth10g.ip + $RADIOHDL_BUILD_DIR/unb2c/quartus/lofar2_unb2c_sdp_station/ip/qsys_lofar2_unb2c_sdp_station/qsys_lofar2_unb2c_sdp_station_reg_tr_10gbe_mac.ip + $RADIOHDL_BUILD_DIR/unb2c/quartus/lofar2_unb2c_sdp_station/ip/qsys_lofar2_unb2c_sdp_station/qsys_lofar2_unb2c_sdp_station_reg_wdi.ip + $RADIOHDL_BUILD_DIR/unb2c/quartus/lofar2_unb2c_sdp_station/ip/qsys_lofar2_unb2c_sdp_station/qsys_lofar2_unb2c_sdp_station_reg_wg.ip + $RADIOHDL_BUILD_DIR/unb2c/quartus/lofar2_unb2c_sdp_station/ip/qsys_lofar2_unb2c_sdp_station/qsys_lofar2_unb2c_sdp_station_rom_system_info.ip + $RADIOHDL_BUILD_DIR/unb2c/quartus/lofar2_unb2c_sdp_station/ip/qsys_lofar2_unb2c_sdp_station/qsys_lofar2_unb2c_sdp_station_timer_0.ip + +nios2_app_userflags = -DCOMPILE_FOR_GEN2_UNB2 diff --git a/applications/lofar2/designs/lofar2_unb2c_sdp_station/revisions/lofar2_unb2c_sdp_station_full_wg/lofar2_unb2c_sdp_station_full_wg.vhd b/applications/lofar2/designs/lofar2_unb2c_sdp_station/revisions/lofar2_unb2c_sdp_station_full_wg/lofar2_unb2c_sdp_station_full_wg.vhd new file mode 100644 index 0000000000000000000000000000000000000000..d252309fe3738460523d3f65ebbdbc3467e6ca2b --- /dev/null +++ b/applications/lofar2/designs/lofar2_unb2c_sdp_station/revisions/lofar2_unb2c_sdp_station_full_wg/lofar2_unb2c_sdp_station_full_wg.vhd @@ -0,0 +1,141 @@ +------------------------------------------------------------------------------- +-- +-- Copyright 2022 +-- ASTRON (Netherlands Institute for Radio Astronomy) <http://www.astron.nl/> +-- P.O.Box 2, 7990 AA Dwingeloo, The Netherlands +-- +-- Licensed under the Apache License, Version 2.0 (the "License"); +-- you may not use this file except in compliance with the License. +-- You may obtain a copy of the License at +-- +-- http://www.apache.org/licenses/LICENSE-2.0 +-- +-- Unless required by applicable law or agreed to in writing, software +-- distributed under the License is distributed on an "AS IS" BASIS, +-- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +-- See the License for the specific language governing permissions and +-- limitations under the License. +-- +------------------------------------------------------------------------------- + +-- Author : R. van der Walle +-- Purpose: +-- Wrapper for Lofar2 SDP Station full wg design +-- Description: +-- Unb2c version for lab testing +-- Contains AIT input stage with WG, FSUB, XSUB, BF and RING + + +LIBRARY IEEE, common_lib, unb2c_board_lib, technology_lib, diag_lib, dp_lib, tech_jesd204b_lib, lofar2_unb2c_sdp_station_lib; +USE IEEE.STD_LOGIC_1164.ALL; +USE IEEE.NUMERIC_STD.ALL; +USE common_lib.common_pkg.ALL; +USE common_lib.common_mem_pkg.ALL; +USE technology_lib.technology_pkg.ALL; +USE unb2c_board_lib.unb2c_board_pkg.ALL; +USE diag_lib.diag_pkg.ALL; +USE dp_lib.dp_stream_pkg.ALL; + +ENTITY lofar2_unb2c_sdp_station_full_wg IS + GENERIC ( + g_design_name : STRING := "lofar2_unb2c_sdp_station_full_wg"; + g_design_note : STRING := "Lofar2 SDP station full design WG"; + g_sim : BOOLEAN := FALSE; --Overridden by TB + g_sim_unb_nr : NATURAL := 0; + g_sim_node_nr : NATURAL := 0; + g_stamp_date : NATURAL := 0; -- Date (YYYYMMDD) -- set by QSF + g_stamp_time : NATURAL := 0; -- Time (HHMMSS) -- set by QSF + g_revision_id : STRING := "" -- revision ID -- set by QSF + ); + PORT ( + -- GENERAL + CLK : IN STD_LOGIC; -- System Clock + PPS : IN STD_LOGIC; -- System Sync + WDI : OUT STD_LOGIC; -- Watchdog Clear + INTA : INOUT STD_LOGIC; -- FPGA interconnect line + INTB : INOUT STD_LOGIC; -- FPGA interconnect line + + -- Others + VERSION : IN STD_LOGIC_VECTOR(c_unb2c_board_aux.version_w-1 DOWNTO 0); + ID : IN STD_LOGIC_VECTOR(c_unb2c_board_aux.id_w-1 DOWNTO 0); + TESTIO : INOUT STD_LOGIC_VECTOR(c_unb2c_board_aux.testio_w-1 DOWNTO 0); + + -- 1GbE Control Interface + ETH_CLK : IN STD_LOGIC_VECTOR(c_unb2c_board_nof_eth-1 DOWNTO 0); + ETH_SGIN : IN STD_LOGIC_VECTOR(c_unb2c_board_nof_eth-1 DOWNTO 0); + ETH_SGOUT : OUT STD_LOGIC_VECTOR(c_unb2c_board_nof_eth-1 DOWNTO 0); + + -- Transceiver clocks + SA_CLK : IN STD_LOGIC := '0'; -- Clock 10GbE front (qsfp) and ring lines + + -- front transceivers QSFP0 for Ring. + QSFP_0_RX : IN STD_LOGIC_VECTOR(c_unb2c_board_tr_qsfp.bus_w-1 downto 0) := (OTHERS=>'0'); + QSFP_0_TX : OUT STD_LOGIC_VECTOR(c_unb2c_board_tr_qsfp.bus_w-1 downto 0); + + -- front transceivers QSFP1 for 10GbE output to CEP. + QSFP_1_RX : IN STD_LOGIC_VECTOR(c_unb2c_board_tr_qsfp.bus_w-1 downto 0) := (OTHERS=>'0'); + QSFP_1_TX : OUT STD_LOGIC_VECTOR(c_unb2c_board_tr_qsfp.bus_w-1 downto 0); + -- LEDs + QSFP_LED : OUT STD_LOGIC_VECTOR(c_unb2c_board_tr_qsfp_nof_leds-1 DOWNTO 0); + + -- ring transceivers + RING_0_RX : IN STD_LOGIC_VECTOR(c_unb2c_board_tr_qsfp.bus_w-1 DOWNTO 0) := (OTHERS => '0'); -- Using qsfp bus width also for ring interfaces + RING_0_TX : OUT STD_LOGIC_VECTOR(c_unb2c_board_tr_qsfp.bus_w-1 DOWNTO 0); + RING_1_RX : IN STD_LOGIC_VECTOR(c_unb2c_board_tr_qsfp.bus_w-1 DOWNTO 0) := (OTHERS=>'0'); + RING_1_TX : OUT STD_LOGIC_VECTOR(c_unb2c_board_tr_qsfp.bus_w-1 DOWNTO 0) + ); +END lofar2_unb2c_sdp_station_full_wg; + +ARCHITECTURE str OF lofar2_unb2c_sdp_station_full_wg IS + +BEGIN + + u_revision : ENTITY lofar2_unb2c_sdp_station_lib.lofar2_unb2c_sdp_station + GENERIC MAP ( + g_design_name => g_design_name, + g_design_note => g_design_note, + g_sim => g_sim, + g_sim_unb_nr => g_sim_unb_nr, + g_sim_node_nr => g_sim_node_nr, + g_stamp_date => g_stamp_date, + g_stamp_time => g_stamp_time, + g_revision_id => g_revision_id + ) + PORT MAP ( + -- GENERAL + CLK => CLK, + PPS => PPS, + WDI => WDI, + INTA => INTA, + INTB => INTB, + + -- Others + VERSION => VERSION, + ID => ID, + TESTIO => TESTIO, + + -- 1GbE Control Interface + ETH_clk => ETH_clk, + ETH_SGIN => ETH_SGIN, + ETH_SGOUT => ETH_SGOUT, + + -- Transceiver clocks + SA_CLK => SA_CLK, + + -- front transceivers QSFP0 for Ring. + QSFP_0_RX => QSFP_0_RX, + QSFP_0_TX => QSFP_0_TX, + + -- front transceivers QSFP1 for 10GbE output to CEP. + QSFP_1_RX => QSFP_1_RX, + QSFP_1_TX => QSFP_1_TX, + -- LEDs + QSFP_LED => QSFP_LED, + + -- ring transceivers + RING_0_RX => RING_0_RX, + RING_0_TX => RING_0_TX, + RING_1_RX => RING_1_RX, + RING_1_TX => RING_1_TX + ); +END str; diff --git a/applications/lofar2/designs/lofar2_unb2c_sdp_station/revisions/lofar2_unb2c_sdp_station_full_wg/lofar2_unb2c_sdp_station_full_wg_pins.tcl b/applications/lofar2/designs/lofar2_unb2c_sdp_station/revisions/lofar2_unb2c_sdp_station_full_wg/lofar2_unb2c_sdp_station_full_wg_pins.tcl new file mode 100644 index 0000000000000000000000000000000000000000..4ceebdedad386e07a109627cae9cd0a15507fa48 --- /dev/null +++ b/applications/lofar2/designs/lofar2_unb2c_sdp_station/revisions/lofar2_unb2c_sdp_station_full_wg/lofar2_unb2c_sdp_station_full_wg_pins.tcl @@ -0,0 +1,25 @@ +############################################################################### +# +# Copyright (C) 2022 +# ASTRON (Netherlands Institute for Radio Astronomy) <http://www.astron.nl/> +# P.O.Box 2, 7990 AA Dwingeloo, The Netherlands +# +# This program is free software: you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation, either version 3 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program. If not, see <http://www.gnu.org/licenses/>. +# +############################################################################### +source $::env(RADIOHDL_WORK)/applications/lofar2/designs/lofar2_unb2c_sdp_station/quartus/lofar2_unb2c_sdp_station_pins.tcl +source $::env(RADIOHDL_WORK)/applications/lofar2/designs/lofar2_unb2c_sdp_station/quartus/lofar2_unb2c_sdp_station_ring_pins.tcl +source $::env(RADIOHDL_WORK)/applications/lofar2/designs/lofar2_unb2c_sdp_station/quartus/lofar2_unb2c_sdp_station_beamlets_pins.tcl + + diff --git a/applications/lofar2/designs/lofar2_unb2c_sdp_station/revisions/lofar2_unb2c_sdp_station_xsub_one/hdllib.cfg b/applications/lofar2/designs/lofar2_unb2c_sdp_station/revisions/lofar2_unb2c_sdp_station_xsub_one/hdllib.cfg index 3cf1e6f82948bf1b7201b6e170177c8a345c7763..9c47be0b66c092fec414e3cf5622a553248d0af1 100644 --- a/applications/lofar2/designs/lofar2_unb2c_sdp_station/revisions/lofar2_unb2c_sdp_station_xsub_one/hdllib.cfg +++ b/applications/lofar2/designs/lofar2_unb2c_sdp_station/revisions/lofar2_unb2c_sdp_station_xsub_one/hdllib.cfg @@ -39,7 +39,7 @@ quartus_sdc_files = #$RADIOHDL_WORK/boards/uniboard2c/libraries/unb2c_board/quartus/unb2c_board.sdc quartus_tcl_files = - ../../quartus/lofar2_unb2c_sdp_station_pins.tcl + lofar2_unb2c_sdp_station_pins.tcl quartus_vhdl_files = diff --git a/applications/lofar2/designs/lofar2_unb2c_sdp_station/revisions/lofar2_unb2c_sdp_station_xsub_one/lofar2_unb2c_sdp_station_xsub_one_pins.tcl b/applications/lofar2/designs/lofar2_unb2c_sdp_station/revisions/lofar2_unb2c_sdp_station_xsub_one/lofar2_unb2c_sdp_station_xsub_one_pins.tcl new file mode 100644 index 0000000000000000000000000000000000000000..b689b7d674278bcc88a9dabee9475a57fe4de9a9 --- /dev/null +++ b/applications/lofar2/designs/lofar2_unb2c_sdp_station/revisions/lofar2_unb2c_sdp_station_xsub_one/lofar2_unb2c_sdp_station_xsub_one_pins.tcl @@ -0,0 +1,24 @@ +############################################################################### +# +# Copyright (C) 2022 +# ASTRON (Netherlands Institute for Radio Astronomy) <http://www.astron.nl/> +# P.O.Box 2, 7990 AA Dwingeloo, The Netherlands +# +# This program is free software: you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation, either version 3 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program. If not, see <http://www.gnu.org/licenses/>. +# +############################################################################### +source $::env(RADIOHDL_WORK)/applications/lofar2/designs/lofar2_unb2c_sdp_station/quartus/lofar2_unb2c_sdp_station_pins.tcl +source $::env(RADIOHDL_WORK)/applications/lofar2/designs/lofar2_unb2c_sdp_station/quartus/lofar2_unb2c_sdp_station_jesd_pins.tcl + + diff --git a/applications/lofar2/designs/lofar2_unb2c_sdp_station/revisions/lofar2_unb2c_sdp_station_xsub_ring/lofar2_unb2c_sdp_station_xsub_ring_pins.tcl b/applications/lofar2/designs/lofar2_unb2c_sdp_station/revisions/lofar2_unb2c_sdp_station_xsub_ring/lofar2_unb2c_sdp_station_xsub_ring_pins.tcl index 5f7cf12c2a866d8cd3ca83aa87b546d768fa1765..78cb5f4e829362546751392aef42a210ad13b168 100644 --- a/applications/lofar2/designs/lofar2_unb2c_sdp_station/revisions/lofar2_unb2c_sdp_station_xsub_ring/lofar2_unb2c_sdp_station_xsub_ring_pins.tcl +++ b/applications/lofar2/designs/lofar2_unb2c_sdp_station/revisions/lofar2_unb2c_sdp_station_xsub_ring/lofar2_unb2c_sdp_station_xsub_ring_pins.tcl @@ -19,6 +19,7 @@ # ############################################################################### source $::env(RADIOHDL_WORK)/applications/lofar2/designs/lofar2_unb2c_sdp_station/quartus/lofar2_unb2c_sdp_station_pins.tcl +source $::env(RADIOHDL_WORK)/applications/lofar2/designs/lofar2_unb2c_sdp_station/quartus/lofar2_unb2c_sdp_station_jesd_pins.tcl source $::env(RADIOHDL_WORK)/applications/lofar2/designs/lofar2_unb2c_sdp_station/quartus/lofar2_unb2c_sdp_station_ring_pins.tcl diff --git a/applications/lofar2/designs/lofar2_unb2c_sdp_station/src/vhdl/lofar2_unb2c_sdp_station.vhd b/applications/lofar2/designs/lofar2_unb2c_sdp_station/src/vhdl/lofar2_unb2c_sdp_station.vhd index b98f0809b85cc3d70572af53c66931982e363d8e..b1aa7701e5f171c6446ab5ac22ca7631626e4ca5 100644 --- a/applications/lofar2/designs/lofar2_unb2c_sdp_station/src/vhdl/lofar2_unb2c_sdp_station.vhd +++ b/applications/lofar2/designs/lofar2_unb2c_sdp_station/src/vhdl/lofar2_unb2c_sdp_station.vhd @@ -100,12 +100,12 @@ ENTITY lofar2_unb2c_sdp_station IS QSFP_LED : OUT STD_LOGIC_VECTOR(c_unb2c_board_tr_qsfp_nof_leds-1 DOWNTO 0); -- back transceivers (Note: numbered from 0) - JESD204B_SERIAL_DATA : IN STD_LOGIC_VECTOR(c_sdp_S_pn-1 downto 0); -- c_unb2c_board_nof_tr_jesd204b = c_sdp_S_pn = 12 + JESD204B_SERIAL_DATA : IN STD_LOGIC_VECTOR(c_sdp_S_pn-1 DOWNTO 0) := (OTHERS => '0'); -- c_unb2c_board_nof_tr_jesd204b = c_sdp_S_pn = 12 -- Connect to the BCK_RX pins in the top wrapper - JESD204B_REFCLK : IN STD_LOGIC; -- Connect to BCK_REF_CLK pin in the top level wrapper + JESD204B_REFCLK : IN STD_LOGIC := '0'; -- Connect to BCK_REF_CLK pin in the top level wrapper -- jesd204b syncronization signals - JESD204B_SYSREF : IN STD_LOGIC; + JESD204B_SYSREF : IN STD_LOGIC := '0'; JESD204B_SYNC_N : OUT STD_LOGIC_VECTOR(c_sdp_N_sync_jesd-1 DOWNTO 0) -- c_unb2c_board_nof_sync_jesd204b = c_sdp_N_sync_jesd = 4 ); END lofar2_unb2c_sdp_station; @@ -778,6 +778,7 @@ BEGIN g_wpfb => g_wpfb, g_bsn_nof_clk_per_sync => g_bsn_nof_clk_per_sync, g_scope_selected_subband => g_scope_selected_subband, + g_no_jesd => c_revision_select.no_jesd, g_use_fsub => c_revision_select.use_fsub, g_use_xsub => c_revision_select.use_xsub, g_use_bf => c_revision_select.use_bf, diff --git a/applications/lofar2/designs/lofar2_unb2c_sdp_station/src/vhdl/lofar2_unb2c_sdp_station_pkg.vhd b/applications/lofar2/designs/lofar2_unb2c_sdp_station/src/vhdl/lofar2_unb2c_sdp_station_pkg.vhd index 6b2c624be0d2f18fcfb606db9899c77b122124f4..903b88e1ec98003c2d99c329173ef30ccc424c9f 100644 --- a/applications/lofar2/designs/lofar2_unb2c_sdp_station/src/vhdl/lofar2_unb2c_sdp_station_pkg.vhd +++ b/applications/lofar2/designs/lofar2_unb2c_sdp_station/src/vhdl/lofar2_unb2c_sdp_station_pkg.vhd @@ -46,6 +46,7 @@ PACKAGE lofar2_unb2c_sdp_station_pkg IS CONSTANT c_bf_ring : t_lofar2_unb2c_sdp_station_config := (FALSE, TRUE, TRUE, FALSE, TRUE, 0); CONSTANT c_xsub_one : t_lofar2_unb2c_sdp_station_config := (FALSE, TRUE, FALSE, TRUE, FALSE, 1); CONSTANT c_xsub_ring : t_lofar2_unb2c_sdp_station_config := (FALSE, TRUE, FALSE, TRUE, TRUE, 9); + CONSTANT c_full_wg : t_lofar2_unb2c_sdp_station_config := (TRUE, TRUE, TRUE, TRUE, TRUE, 9); CONSTANT c_full : t_lofar2_unb2c_sdp_station_config := (FALSE, TRUE, TRUE, TRUE, TRUE, 9); -- Function to select the revision configuration. @@ -65,6 +66,7 @@ PACKAGE BODY lofar2_unb2c_sdp_station_pkg IS ELSIF g_design_name = "lofar2_unb2c_sdp_station_bf_ring" THEN RETURN c_bf_ring; ELSIF g_design_name = "lofar2_unb2c_sdp_station_xsub_one" THEN RETURN c_xsub_one; ELSIF g_design_name = "lofar2_unb2c_sdp_station_xsub_ring" THEN RETURN c_xsub_ring; + ELSIF g_design_name = "lofar2_unb2c_sdp_station_full_wg" THEN RETURN c_full_wg; ELSE RETURN c_full; END IF; END; diff --git a/applications/lofar2/libraries/sdp/src/vhdl/node_sdp_adc_input_and_timing.vhd b/applications/lofar2/libraries/sdp/src/vhdl/node_sdp_adc_input_and_timing.vhd index 62f00be5361a92925379ac1631dc4e307b1e3790..4bca947d2bf3d642596b9b977a21ca0e319f3620 100644 --- a/applications/lofar2/libraries/sdp/src/vhdl/node_sdp_adc_input_and_timing.vhd +++ b/applications/lofar2/libraries/sdp/src/vhdl/node_sdp_adc_input_and_timing.vhd @@ -40,6 +40,7 @@ USE work.sdp_pkg.ALL; ENTITY node_sdp_adc_input_and_timing IS GENERIC ( g_technology : NATURAL := c_tech_select_default; + g_no_jesd : BOOLEAN := FALSE; g_buf_nof_data : NATURAL := c_sdp_V_si_db; g_bsn_nof_clk_per_sync : NATURAL := c_sdp_N_clk_per_sync; -- Default 200M, overide for short simulation g_sim : BOOLEAN := FALSE @@ -50,7 +51,7 @@ ENTITY node_sdp_adc_input_and_timing IS mm_rst : IN STD_LOGIC; dp_clk : IN STD_LOGIC; dp_rst : IN STD_LOGIC; - + dp_pps : IN STD_LOGIC := '0'; -- mm control buses -- JESD @@ -98,10 +99,10 @@ ENTITY node_sdp_adc_input_and_timing IS jesd_ctrl_miso : OUT t_mem_miso; -- JESD io signals - jesd204b_serial_data : IN STD_LOGIC_VECTOR(c_sdp_S_pn-1 downto 0); - jesd204b_refclk : IN STD_LOGIC; - jesd204b_sysref : IN STD_LOGIC; - jesd204b_sync_n : OUT STD_LOGIC_VECTOR(c_sdp_N_sync_jesd - 1 DOWNTO 0); + jesd204b_serial_data : IN STD_LOGIC_VECTOR(c_sdp_S_pn-1 downto 0) := (OTHERS => '0'); + jesd204b_refclk : IN STD_LOGIC := '0'; + jesd204b_sysref : IN STD_LOGIC := '0'; + jesd204b_sync_n : OUT STD_LOGIC_VECTOR(c_sdp_N_sync_jesd - 1 DOWNTO 0) := (OTHERS => '0'); -- Streaming data output out_sosi_arr : OUT t_dp_sosi_arr(c_sdp_S_pn-1 DOWNTO 0); @@ -133,14 +134,14 @@ ARCHITECTURE str OF node_sdp_adc_input_and_timing IS SIGNAL rx_bsn_source_restart : STD_LOGIC; -- Sosis and sosi arrays - SIGNAL rx_sosi_arr : t_dp_sosi_arr(c_sdp_S_pn-1 DOWNTO 0); - SIGNAL dp_shiftram_snk_in_arr : t_dp_sosi_arr(c_sdp_S_pn-1 DOWNTO 0); - SIGNAL ant_sosi_arr : t_dp_sosi_arr(c_sdp_S_pn-1 DOWNTO 0); - SIGNAL bs_sosi : t_dp_sosi; - SIGNAL wg_sosi_arr : t_dp_sosi_arr(c_sdp_S_pn-1 DOWNTO 0); - SIGNAL mux_sosi_arr : t_dp_sosi_arr(c_sdp_S_pn-1 DOWNTO 0); - SIGNAL nxt_mux_sosi_arr : t_dp_sosi_arr(c_sdp_S_pn-1 DOWNTO 0); - SIGNAL st_sosi_arr : t_dp_sosi_arr(c_sdp_S_pn-1 DOWNTO 0); + SIGNAL rx_sosi_arr : t_dp_sosi_arr(c_sdp_S_pn-1 DOWNTO 0) := (OTHERS => c_dp_sosi_rst); + SIGNAL dp_shiftram_snk_in_arr : t_dp_sosi_arr(c_sdp_S_pn-1 DOWNTO 0) := (OTHERS => c_dp_sosi_rst); + SIGNAL ant_sosi_arr : t_dp_sosi_arr(c_sdp_S_pn-1 DOWNTO 0) := (OTHERS => c_dp_sosi_rst); + SIGNAL bs_sosi : t_dp_sosi := c_dp_sosi_rst; + SIGNAL wg_sosi_arr : t_dp_sosi_arr(c_sdp_S_pn-1 DOWNTO 0) := (OTHERS => c_dp_sosi_rst); + SIGNAL mux_sosi_arr : t_dp_sosi_arr(c_sdp_S_pn-1 DOWNTO 0) := (OTHERS => c_dp_sosi_rst); + SIGNAL nxt_mux_sosi_arr : t_dp_sosi_arr(c_sdp_S_pn-1 DOWNTO 0) := (OTHERS => c_dp_sosi_rst); + SIGNAL st_sosi_arr : t_dp_sosi_arr(c_sdp_S_pn-1 DOWNTO 0) := (OTHERS => c_dp_sosi_rst); SIGNAL mm_rst_internal : STD_LOGIC; SIGNAL mm_jesd_ctrl_reg : STD_LOGIC_VECTOR(c_word_w-1 DOWNTO 0); @@ -148,6 +149,12 @@ ARCHITECTURE str OF node_sdp_adc_input_and_timing IS BEGIN + gen_no_jesd : IF g_no_jesd = TRUE GENERATE + rx_clk <= dp_clk; + rx_rst <= dp_rst; + rx_sysref <= dp_pps; + END GENERATE; + -- The node AIT is reset at power up by mm_rst and under software control by jesd204b_disable_arr. -- The mm_rst internal will cause a reset on the rx_rst by the reset sequencer in the u_jesd204b. -- The MM jesd204b_disable_arr is intended for node AIT resynchronisation tests of the u_jesd204b. @@ -161,84 +168,86 @@ BEGIN jesd204b_disable_arr(i) <= mm_jesd_ctrl_reg(i); END GENERATE; - ----------------------------------------------------------------------------- - -- JESD204B IP (ADC Handler) - ----------------------------------------------------------------------------- + gen_jesd : IF g_no_jesd = FALSE GENERATE + ----------------------------------------------------------------------------- + -- JESD204B IP (ADC Handler) + ----------------------------------------------------------------------------- + + u_jesd204b: ENTITY tech_jesd204b_lib.tech_jesd204b + GENERIC MAP( + g_sim => g_sim, + g_nof_streams => c_sdp_S_pn, + g_nof_sync_n => c_sdp_N_sync_jesd, + g_jesd_freq => c_sdp_jesd204b_freq + ) + PORT MAP( + jesd204b_refclk => JESD204B_REFCLK, + jesd204b_sysref => JESD204B_SYSREF, + jesd204b_sync_n_arr => jesd204b_sync_n, + + rx_sosi_arr => rx_sosi_arr, + rx_clk => rx_clk, + rx_rst => rx_rst, + rx_sysref => rx_sysref, - u_jesd204b: ENTITY tech_jesd204b_lib.tech_jesd204b - GENERIC MAP( - g_sim => g_sim, - g_nof_streams => c_sdp_S_pn, - g_nof_sync_n => c_sdp_N_sync_jesd, - g_jesd_freq => c_sdp_jesd204b_freq - ) - PORT MAP( - jesd204b_refclk => JESD204B_REFCLK, - jesd204b_sysref => JESD204B_SYSREF, - jesd204b_sync_n_arr => jesd204b_sync_n, + jesd204b_disable_arr => jesd204b_disable_arr, + + -- MM + mm_clk => mm_clk, + mm_rst => mm_rst_internal, + + jesd204b_mosi => jesd204b_mosi, + jesd204b_miso => jesd204b_miso, + + -- Serial + serial_tx_arr => open, + serial_rx_arr => JESD204B_SERIAL_DATA(c_sdp_S_pn-1 downto 0) + ); - rx_sosi_arr => rx_sosi_arr, - rx_clk => rx_clk, - rx_rst => rx_rst, - rx_sysref => rx_sysref, - - jesd204b_disable_arr => jesd204b_disable_arr, - -- MM - mm_clk => mm_clk, - mm_rst => mm_rst_internal, + ----------------------------------------------------------------------------- + -- Time delay: dp_shiftram + -- . copied from unb1_bn_capture_input (apertif) + -- Array range reversal is not done because everything is DOWNTO + -- . the input valid is always '1', even when there is no data + ----------------------------------------------------------------------------- + + p_dp_shiftram_snk_in_arr : PROCESS(rx_sosi_arr) + BEGIN + dp_shiftram_snk_in_arr <= rx_sosi_arr; + FOR I IN 0 TO c_sdp_S_pn-1 LOOP + -- ADC data is stored in the upper 14 bits of the jesd rx_sosi. + dp_shiftram_snk_in_arr(I).data <= RESIZE_DP_SDATA(rx_sosi_arr(I).data(c_sdp_W_adc_jesd-1 DOWNTO (c_sdp_W_adc_jesd - c_sdp_W_adc) )); + -- Force valid. + dp_shiftram_snk_in_arr(I).valid <= '1'; + END LOOP; + END PROCESS; - jesd204b_mosi => jesd204b_mosi, - jesd204b_miso => jesd204b_miso, - -- Serial - serial_tx_arr => open, - serial_rx_arr => JESD204B_SERIAL_DATA(c_sdp_S_pn-1 downto 0) - ); - - - ----------------------------------------------------------------------------- - -- Time delay: dp_shiftram - -- . copied from unb1_bn_capture_input (apertif) - -- Array range reversal is not done because everything is DOWNTO - -- . the input valid is always '1', even when there is no data - ----------------------------------------------------------------------------- + u_dp_shiftram : ENTITY dp_lib.dp_shiftram + GENERIC MAP ( + g_nof_streams => c_sdp_S_pn, + g_nof_words => c_sdp_V_sample_delay, + g_data_w => c_sdp_W_adc, + g_use_sync_in => TRUE + ) + PORT MAP ( + dp_rst => rx_rst, + dp_clk => rx_clk, - p_dp_shiftram_snk_in_arr : PROCESS(rx_sosi_arr) - BEGIN - dp_shiftram_snk_in_arr <= rx_sosi_arr; - FOR I IN 0 TO c_sdp_S_pn-1 LOOP - -- ADC data is stored in the upper 14 bits of the jesd rx_sosi. - dp_shiftram_snk_in_arr(I).data <= RESIZE_DP_SDATA(rx_sosi_arr(I).data(c_sdp_W_adc_jesd-1 DOWNTO (c_sdp_W_adc_jesd - c_sdp_W_adc) )); - -- Force valid. - dp_shiftram_snk_in_arr(I).valid <= '1'; - END LOOP; - END PROCESS; - - - u_dp_shiftram : ENTITY dp_lib.dp_shiftram - GENERIC MAP ( - g_nof_streams => c_sdp_S_pn, - g_nof_words => c_sdp_V_sample_delay, - g_data_w => c_sdp_W_adc, - g_use_sync_in => TRUE - ) - PORT MAP ( - dp_rst => rx_rst, - dp_clk => rx_clk, - - mm_rst => mm_rst_internal, - mm_clk => mm_clk, - - sync_in => bs_sosi.sync, - - reg_mosi => reg_dp_shiftram_mosi, - reg_miso => reg_dp_shiftram_miso, - - snk_in_arr => dp_shiftram_snk_in_arr, - - src_out_arr => ant_sosi_arr - ); + mm_rst => mm_rst_internal, + mm_clk => mm_clk, + + sync_in => bs_sosi.sync, + + reg_mosi => reg_dp_shiftram_mosi, + reg_miso => reg_dp_shiftram_miso, + + snk_in_arr => dp_shiftram_snk_in_arr, + + src_out_arr => ant_sosi_arr + ); + END GENERATE; ----------------------------------------------------------------------------- -- Timestamp diff --git a/applications/lofar2/libraries/sdp/src/vhdl/sdp_station.vhd b/applications/lofar2/libraries/sdp/src/vhdl/sdp_station.vhd index f8bcfb7bae2ff567addead29e994ee10bfdb4296..3c2752619b4bd714de592fc2be94539d9c2c003e 100644 --- a/applications/lofar2/libraries/sdp/src/vhdl/sdp_station.vhd +++ b/applications/lofar2/libraries/sdp/src/vhdl/sdp_station.vhd @@ -50,6 +50,7 @@ ENTITY sdp_station IS g_wpfb : t_wpfb := c_sdp_wpfb_subbands; g_bsn_nof_clk_per_sync : NATURAL := c_sdp_N_clk_per_sync; -- Default 200M, overide for short simulation g_scope_selected_subband : NATURAL := 0; + g_no_jesd : BOOLEAN := FALSE; g_use_fsub : BOOLEAN := TRUE; g_use_xsub : BOOLEAN := TRUE; g_use_bf : BOOLEAN := TRUE; @@ -606,6 +607,7 @@ BEGIN GENERIC MAP( g_technology => g_technology, g_sim => g_sim, + g_no_jesd => g_no_jesd, g_bsn_nof_clk_per_sync => g_bsn_nof_clk_per_sync ) PORT MAP( @@ -613,7 +615,8 @@ BEGIN mm_clk => mm_clk, mm_rst => mm_rst, dp_clk => dp_clk, - dp_rst => dp_rst, + dp_rst => dp_rst, + dp_pps => dp_pps, -- mm control buses jesd_ctrl_mosi => jesd_ctrl_copi,