diff --git a/applications/lofar2/doc/prestudy/station2_sdp_transient_buffer.txt b/applications/lofar2/doc/prestudy/station2_sdp_transient_buffer.txt
index a04243e671ad514f506f57ccd9d657bb83b87d06..a4cb531ccaee9ee75301ad238439c7552c93ad65 100644
--- a/applications/lofar2/doc/prestudy/station2_sdp_transient_buffer.txt
+++ b/applications/lofar2/doc/prestudy/station2_sdp_transient_buffer.txt
@@ -281,6 +281,9 @@ The CP FPGA_beamlet_output_nof_beamlets_RW is not supported in SDPTR and SDPFW y
. FPGA_tbuf_signal_input_rsn_R = RSN at sync
FPGA_tbuf_signal_input_nof_blocks_R : expected value nof_block_per_sync = 100k or 80k
FPGA_tbuf_signal_input_nof_samples_R : expected value nof_clk_per_sync = 200M or 160M
+ If FPGA_tbuf_signal_input_rsn_R == -1 then either FPGA_processing_enable_R == False
+ or there is or was something wrong with the data path processing clock (dp_clk
+ = 200MHz or 160MHz).
* Record:
. FPGA_tbuf_record_all_RW[pn]
@@ -289,7 +292,7 @@ The CP FPGA_beamlet_output_nof_beamlets_RW is not supported in SDPTR and SDPFW y
. FPGA_tbuf_record_enable_RW[pn]
FPGA_tbuf_record_enable_R[pn]
True = start/continue recording, all ai or half of ai (dependent on FPGA_tbuf_record_all_RW)
- False = stop/freeze recording immediately
+ False = RW: stop/freeze recording immediately, R: recording has stopped
* Recording:
. FPGA_tbuf_recorded_last_timestamp_R[pn] = reg_recorded_last_rsn_R * T_adc
@@ -328,7 +331,7 @@ The CP FPGA_beamlet_output_nof_beamlets_RW is not supported in SDPTR and SDPFW y
- when busy then FPGA_tbuf_memory_read_nof_packets_R increments until it reaches value of
FPGA_tbuf_dump_nof_packets_R
- when finished then FPGA_tbuf_memory_remaining_nof_packets_R = 0
- False = stop dumping packets immediately
+ False = RW: stop dumping packets immediately, R: dumping has stopped
SDPFW:
- loops over one or multiple ai
SC / dump tool:
@@ -366,12 +369,12 @@ The CP FPGA_beamlet_output_nof_beamlets_RW is not supported in SDPTR and SDPFW y
Enable output on the pn at end of ring that has interface to CEP.
* 10GbE output monitor:
- . FPGA_tbuf_output_nof_packets_R[pn]
- Number of dump packets that have been output while FPGA_tbuf_output_enable_RW = True,
- reset to 0 when FPGA_tbuf_output_clear_counts_RW = True event
. FPGA_tbuf_output_clear_counts_RW[pn]
Use dp_strobe_total_count with MM clear register rather than in_clr = revt(reg_output_enable_RW) and
rather then dp_bsn_monitor with sync = revt(reg_output_enable_RW).
+ . FPGA_tbuf_output_nof_packets_R[pn]
+ Number of dump packets that have been output while FPGA_tbuf_output_enable_RW = True,
+ reset to 0 when FPGA_tbuf_output_clear_counts_RW = True event
* Memory DDR4:
With streaming use of io_ddr then the dvr_wr_flush_en = '0' (so ctlr_wr_flush_en = 0 in MP), because
@@ -416,9 +419,12 @@ The CP FPGA_beamlet_output_nof_beamlets_RW is not supported in SDPTR and SDPFW y
True = pn is recording, all ai or half of ai (dependent on reg_record_all_RW)
False = pn is frozen
- . c_tbuf_nof_samples_per_page = c_tbuf_nof_samples_per_packet = 2000
- . reg_nof_ddr_words_per_page_R = 657 or 329, depends on reg_record_enable_RW
- SDPTR: ddr_nof_pages = floor(ddr_gigabytes * 1024**3 / (reg_nof_ddr_words_per_page_R * ctrl_nof_bytes_per_ddr_word)
+ Constants, signals:
+ . c_tbuf_nof_samples_per_page = c_tbuf_nof_samples_per_packet = 2000
+ . nof_ddr_words_per_page = 657 or 329, depends on reg_record_enable_RW
+ SDPTR: ddr_nof_pages = floor(ddr_gigabytes * 1024**3 / (nof_ddr_words_per_page * ctrl_nof_bytes_per_ddr_word)
+ . Moet SDPTR dit weten, heeft SDPTR dit nodig? --> Nee want SPDTR hoeft alleen pages/blocks/packets
+ te kennen, omdat SDPFW conversie van page/address doet.
. reg_recorded_first_page_R
freezes when recording stops by reg_record_enable_RW = False,
@@ -478,14 +484,14 @@ The CP FPGA_beamlet_output_nof_beamlets_RW is not supported in SDPTR and SDPFW y
amount of packets that have been read correctly and were passed on to ring
= reg_memory_read_nof_packets_R - reg_memory_read_nof_errors_R
- FPGA_tbuf_memory_read_nof_packets_R[pn][ai] = reg_memory_read_nof_packets_R
- FPGA_tbuf_memory_dropped_nof_packets_R[pn][ai] = reg_memory_read_nof_errors_R
- FPGA_tbuf_memory_remaining_nof_packets_R[pn][ai] = reg_memory_remaining_nof_packets_R
- FPGA_tbuf_memory_dumped_nof_packets_R[pn][ai] = reg_memory_dumped_nof_packets_R
- FPGA_tbuf_memory_clear_counts[pn]
+ FPGA_tbuf_memory_clear_counts_RW[pn]
Use dp_strobe_total_count with MM clear register, rather than in_clr = revt(reg_dump_enable_RW)
to clear all reg_memory_* counters.
+ . FPGA_tbuf_memory_read_nof_packets_R[pn][ai] = reg_memory_read_nof_packets_R
+ . FPGA_tbuf_memory_dropped_nof_packets_R[pn][ai] = reg_memory_read_nof_errors_R
+ . FPGA_tbuf_memory_remaining_nof_packets_R[pn][ai] = reg_memory_remaining_nof_packets_R
+ . FPGA_tbuf_memory_dumped_nof_packets_R[pn][ai] = reg_memory_dumped_nof_packets_R
. reg_dump_enable_RW[ai]
True = start / keep dumping packets for the requested ai,
@@ -514,6 +520,9 @@ The CP FPGA_beamlet_output_nof_beamlets_RW is not supported in SDPTR and SDPFW y
* Enable output:
. write FPGA_tbuf_output_enable_RW = True for pn that has the 10GbE interface to CEP
+* Prepare dumping:
+ . write FPGA_tbuf_dump_inter_packet_time_RW
+
* Prepare recording:
. write FPGA_tbuf_reg_record_all_RW
@@ -538,7 +547,7 @@ The CP FPGA_beamlet_output_nof_beamlets_RW is not supported in SDPTR and SDPFW y
* Clear counts:
. write FPGA_tbuf_output_clear_counts_RW = True to clear FPGA_tbuf_output_nof_packets_R
- . write FPGA_tbuf_memory_clear_counts = True to clear FPGA_tbuf_memory_*_R counts
+ . write FPGA_tbuf_memory_clear_counts_RW = True to clear FPGA_tbuf_memory_*_R counts
* Prepare dump:
. write FPGA_tbuf_dump_start_timestamp_RW to request start time of dump interval
@@ -564,7 +573,7 @@ The CP FPGA_beamlet_output_nof_beamlets_RW is not supported in SDPTR and SDPFW y
. write FPGA_tbuf_dump_enable_RW = False to force stop dumping from pn
* Monitor dump results:
- . read packet counts:
+ . read packet counts (or use for ai loop instead of sum):
N_remaining = sum(FPGA_tbuf_memory_remaining_nof_packets_R[pn][ai])
N_read = sum(FPGA_tbuf_memory_read_nof_packets_R[pn][ai])
N_dropped = sum(FPGA_tbuf_memory_dropped_nof_packets_R[pn][ai])