diff --git a/applications/lofar2/libraries/sdp/src/vhdl/sdp_pkg.vhd b/applications/lofar2/libraries/sdp/src/vhdl/sdp_pkg.vhd
index 1d74e41df649882c8d1005850aba38c3eaa961c9..96cf13756fc18253d0b2dc390733ba77d380ff72 100644
--- a/applications/lofar2/libraries/sdp/src/vhdl/sdp_pkg.vhd
+++ b/applications/lofar2/libraries/sdp/src/vhdl/sdp_pkg.vhd
@@ -118,7 +118,8 @@ PACKAGE sdp_pkg is
   CONSTANT c_sdp_FS_adc                  : NATURAL := 2**(c_sdp_W_adc - 1); -- full scale FS corresponds to amplitude 1.0, will just cause clipping of +FS to +FS-1
   CONSTANT c_sdp_wg_ampl_lsb             : REAL := c_diag_wg_ampl_unit / REAL(c_sdp_FS_adc);  -- WG amplitude in number of LSbit resolution steps
   CONSTANT c_sdp_wg_subband_freq_unit    : REAL := c_diag_wg_freq_unit/REAL(c_sdp_N_fft);  -- subband freq = Fs/1024 = 200 MSps/1024 = 195312.5 Hz sinus
-  CONSTANT c_sdp_N_clk_per_sync          : NATURAL := c_sdp_f_adc_MHz*10**6;  -- Default 200M clock cycles per second
+  CONSTANT c_sdp_N_clk_per_second        : NATURAL := c_sdp_f_adc_MHz*10**6;  -- Default 200M clock cycles per second
+  CONSTANT c_sdp_N_clk_per_sync          : NATURAL := c_sdp_f_adc_MHz*10**6;  -- Default 200M clock cycles per sync interval of 1 second
   CONSTANT c_sdp_N_clk_sync_timeout      : NATURAL := c_sdp_f_adc_MHz*10**6 + c_sdp_f_adc_MHz*10**5;  -- 10% margin.
   CONSTANT c_sdp_N_clk_sync_timeout_xsub : NATURAL := 2147483647;  -- = 2**31 - 1 = largest value for NATURAL for 10.7 seconds. Do not use 2*31 to avoid Modelsim NATURAL overflow warning.
   CONSTANT c_sdp_N_sync_jesd             : NATURAL := c_sdp_S_pn * c_sdp_N_sync_rcu / c_sdp_S_rcu; -- = 4, nof JESD IP sync outputs per PN