From d16a020a16d61955519f0ad5ae200f42849fc3c7 Mon Sep 17 00:00:00 2001 From: Reinier van der Walle <walle@astron.nl> Date: Wed, 31 Mar 2021 10:38:27 +0200 Subject: [PATCH] instantiated bsn_source_v2 --- .../sdp/src/vhdl/node_sdp_adc_input_and_timing.vhd | 8 ++++---- applications/lofar2/libraries/sdp/src/vhdl/sdp_pkg.vhd | 2 +- 2 files changed, 5 insertions(+), 5 deletions(-) diff --git a/applications/lofar2/libraries/sdp/src/vhdl/node_sdp_adc_input_and_timing.vhd b/applications/lofar2/libraries/sdp/src/vhdl/node_sdp_adc_input_and_timing.vhd index 9fca689fbd..b59c6b2bbc 100644 --- a/applications/lofar2/libraries/sdp/src/vhdl/node_sdp_adc_input_and_timing.vhd +++ b/applications/lofar2/libraries/sdp/src/vhdl/node_sdp_adc_input_and_timing.vhd @@ -40,7 +40,7 @@ ENTITY node_sdp_adc_input_and_timing IS GENERIC ( g_technology : NATURAL := c_tech_arria10_e1sg; g_buf_nof_data : NATURAL := c_sdp_V_si_db; - g_bsn_sync_timeout : NATURAL := c_sdp_f_adc_MHz*10**6; -- Default 200M, overide for short simulation + g_bsn_nof_clk_per_sync : NATURAL := c_sdp_f_adc_MHz*10**6; -- Default 200M, overide for short simulation g_sim : BOOLEAN := FALSE ); PORT ( @@ -237,11 +237,11 @@ BEGIN ----------------------------------------------------------------------------- -- Timestamp ----------------------------------------------------------------------------- - u_bsn_source : ENTITY dp_lib.mms_dp_bsn_source + u_bsn_source : ENTITY dp_lib.mms_dp_bsn_source_v2 GENERIC MAP ( g_cross_clock_domain => TRUE, g_block_size => c_bs_block_size, - g_nof_block_per_sync => c_bs_nof_block_per_sync, + g_nof_clk_per_sync => g_bsn_nof_clk_per_sync, g_bsn_w => c_bs_bsn_w ) PORT MAP ( @@ -367,7 +367,7 @@ BEGIN u_bsn_monitor : ENTITY dp_lib.mms_dp_bsn_monitor GENERIC MAP ( g_nof_streams => 1, -- They're all the same - g_sync_timeout => g_bsn_sync_timeout, + g_sync_timeout => g_bsn_nof_clk_per_sync, g_bsn_w => c_bs_bsn_w, g_log_first_bsn => FALSE ) diff --git a/applications/lofar2/libraries/sdp/src/vhdl/sdp_pkg.vhd b/applications/lofar2/libraries/sdp/src/vhdl/sdp_pkg.vhd index b2d3b0e515..540b0ab700 100644 --- a/applications/lofar2/libraries/sdp/src/vhdl/sdp_pkg.vhd +++ b/applications/lofar2/libraries/sdp/src/vhdl/sdp_pkg.vhd @@ -150,7 +150,7 @@ PACKAGE sdp_pkg is CONSTANT c_sdp_reg_wg_addr_w : NATURAL := 2 + ceil_log2(c_sdp_S_pn); CONSTANT c_sdp_ram_wg_addr_w : NATURAL := 10 + ceil_log2(c_sdp_S_pn); CONSTANT c_sdp_reg_dp_shiftram_addr_w : NATURAL := 1 + ceil_log2(c_sdp_S_pn); - CONSTANT c_sdp_reg_bsn_source_addr_w : NATURAL := 2; + CONSTANT c_sdp_reg_bsn_source_addr_w : NATURAL := 2; -- TODO +1 due to bsn_source_v2 CONSTANT c_sdp_reg_bsn_scheduler_addr_w : NATURAL := 1; CONSTANT c_sdp_ram_diag_data_buf_jesd_addr_w : NATURAL := ceil_log2(c_sdp_S_pn*c_sdp_V_si_db); CONSTANT c_sdp_reg_diag_data_buf_jesd_addr_w : NATURAL := 1 + ceil_log2(2); -- GitLab