From cf3147a06b9f53324b2774e8aab64e15b108aa0a Mon Sep 17 00:00:00 2001
From: Eric Kooistra <kooistra@astron.nl>
Date: Wed, 2 Nov 2022 14:35:16 +0100
Subject: [PATCH] No functional changes. Still use quantized subband with
W_subband = 16 bits and no fraction as input.
---
.../vhdl/node_sdp_oversampled_filterbank.vhd | 114 +++++++++++-------
1 file changed, 73 insertions(+), 41 deletions(-)
diff --git a/applications/lofar2/libraries/sdp/src/vhdl/node_sdp_oversampled_filterbank.vhd b/applications/lofar2/libraries/sdp/src/vhdl/node_sdp_oversampled_filterbank.vhd
index 83cdf658c9..04b0078ba2 100644
--- a/applications/lofar2/libraries/sdp/src/vhdl/node_sdp_oversampled_filterbank.vhd
+++ b/applications/lofar2/libraries/sdp/src/vhdl/node_sdp_oversampled_filterbank.vhd
@@ -25,6 +25,7 @@
-- . Implements the functionality of the complex subband filterbank (Fsub complex) in the
-- DISTURB SDPFW design.
-- Description:
+-- . See https://support.astron.nl/confluence/display/DISTURB/DISTURB-2+Station+Digital+Processor+Design+Document
-- . The subband filterbank seperates the incoming timestamped ADC samples into
-- 512 frequency bands called subbands.
-- . It implements a critically sampled poly-phase filterbank (PFB). The PFB consists of a
@@ -63,7 +64,6 @@ ENTITY node_sdp_oversampled_filterbank IS
dp_bsn_source_new_interval : IN STD_LOGIC;
in_sosi_arr : IN t_dp_sosi_arr(c_sdp_S_pn-1 DOWNTO 0);
- pfb_sosi_arr : OUT t_dp_sosi_arr(c_sdp_R_os * c_sdp_P_pfb-1 DOWNTO 0);
fsub_sosi_arr : OUT t_dp_sosi_arr(c_sdp_R_os * c_sdp_P_pfb-1 DOWNTO 0);
sst_udp_sosi : OUT t_dp_sosi;
sst_udp_siso : IN t_dp_siso := c_dp_siso_rst;
@@ -110,6 +110,9 @@ ARCHITECTURE str OF node_sdp_oversampled_filterbank IS
CONSTANT c_complex_mult_pipeline : NATURAL := 3;
CONSTANT c_complex_pfb_pipeline : NATURAL := 2;
+ -- Use WG as local oscillator, buf contains 16b sin and 16b cos
+ -- . c_sdp_W_local_oscillator = c_halfword_w = 16b
+ -- . c_sdp_W_local_oscillator_fraction = 16b - 1 sign bit = 15b
CONSTANT c_buf : t_c_mem := (latency => 1,
adr_w => ceil_log2(2 * c_sdp_N_fft),
dat_w => c_nof_complex * c_halfword_w,
@@ -118,7 +121,11 @@ ARCHITECTURE str OF node_sdp_oversampled_filterbank IS
CONSTANT c_buf_file : STRING := "data/freq_shift_half_subband_2048x16_im_re.hex";
- CONSTANT c_wg_ctrl : t_diag_wg := (TO_UVEC(c_diag_wg_mode_repeat, c_diag_wg_mode_w), TO_UVEC(c_buf.nof_dat, c_diag_wg_nofsamples_w), (OTHERS => '0'), (OTHERS => '0'), (OTHERS => '0'));
+ CONSTANT c_wg_ctrl : t_diag_wg := (TO_UVEC(c_diag_wg_mode_repeat, c_diag_wg_mode_w),
+ TO_UVEC(c_buf.nof_dat, c_diag_wg_nofsamples_w),
+ (OTHERS => '0'),
+ (OTHERS => '0'),
+ (OTHERS => '0'));
CONSTANT c_wg_phase_offset : NATURAL := 6; -- Compensate for WG start latency. In nof samples.
CONSTANT c_fil_coefs_mem_addr_w : NATURAL := ceil_log2(c_sdp_N_fft * c_sdp_N_taps);
@@ -138,6 +145,7 @@ ARCHITECTURE str OF node_sdp_oversampled_filterbank IS
SIGNAL master_mosi_arr : t_mem_mosi_arr(0 TO c_nof_masters-1) := (OTHERS=>c_mem_mosi_rst);
SIGNAL master_miso_arr : t_mem_miso_arr(0 TO c_nof_masters-1) := (OTHERS=>c_mem_miso_rst);
+ -- WG as local oscillator (LO)
SIGNAL wg_rddata : STD_LOGIC_VECTOR(c_buf.dat_w -1 DOWNTO 0);
SIGNAL wg_rdval : STD_LOGIC;
SIGNAL wg_address : STD_LOGIC_VECTOR(c_buf.adr_w -1 DOWNTO 0);
@@ -145,36 +153,47 @@ ARCHITECTURE str OF node_sdp_oversampled_filterbank IS
SIGNAL wg_rd : STD_LOGIC;
SIGNAL wg_out_dat : STD_LOGIC_VECTOR(c_buf.dat_w -1 DOWNTO 0);
+ -- Spectral Inversion (SI)
SIGNAL si_sosi_arr : t_dp_sosi_arr(c_sdp_S_pn-1 DOWNTO 0) := (OTHERS => c_dp_sosi_rst);
SIGNAL si_sosi_0_piped : t_dp_sosi := c_dp_sosi_rst;
+
+ -- Real input FFT
+ SIGNAL wpfb_unit_in_sosi_arr : t_dp_sosi_arr(c_sdp_P_pfb-1 DOWNTO 0) := (OTHERS => c_dp_sosi_rst);
+ SIGNAL wpfb_unit_fil_sosi_arr : t_dp_sosi_arr(c_sdp_P_pfb-1 DOWNTO 0) := (OTHERS => c_dp_sosi_rst);
SIGNAL wpfb_unit_out_sosi_arr : t_dp_sosi_arr(c_sdp_P_pfb-1 DOWNTO 0) := (OTHERS => c_dp_sosi_rst);
SIGNAL wpfb_unit_out_sosi_arr_piped : t_dp_sosi_arr(c_sdp_P_pfb-1 DOWNTO 0) := (OTHERS => c_dp_sosi_rst);
- SIGNAL wpfb_unit_fil_sosi_arr : t_dp_sosi_arr(c_sdp_P_pfb-1 DOWNTO 0) := (OTHERS => c_dp_sosi_rst);
- SIGNAL wpfb_unit_in_sosi_arr : t_dp_sosi_arr(c_sdp_P_pfb-1 DOWNTO 0) := (OTHERS => c_dp_sosi_rst);
+ -- Mixer to shift f_sub/2
SIGNAL complex_mult_src_out_arr : t_dp_sosi_arr(c_sdp_S_pn-1 DOWNTO 0) := (OTHERS => c_dp_sosi_rst);
SIGNAL requantize_src_out_arr : t_dp_sosi_arr(c_sdp_S_pn-1 DOWNTO 0) := (OTHERS => c_dp_sosi_rst);
+
SIGNAL wpfb_unit_complex_in_sosi_arr : t_dp_sosi_arr(c_sdp_S_pn-1 DOWNTO 0) := (OTHERS => c_dp_sosi_rst);
SIGNAL wpfb_unit_complex_fil_sosi_arr : t_dp_sosi_arr(c_sdp_S_pn-1 DOWNTO 0) := (OTHERS => c_dp_sosi_rst);
SIGNAL wpfb_unit_complex_out_sosi_arr : t_dp_sosi_arr(c_sdp_S_pn-1 DOWNTO 0) := (OTHERS => c_dp_sosi_rst);
SIGNAL wpfb_unit_out_resized_sosi_arr : t_dp_sosi_arr(c_sdp_S_pn-1 DOWNTO 0) := (OTHERS => c_dp_sosi_rst);
+
SIGNAL wpfb_fifo_sosi_arr : t_dp_sosi_arr(c_sdp_S_pn-1 DOWNTO 0) := (OTHERS => c_dp_sosi_rst);
SIGNAL wpfb_fifo_siso_arr : t_dp_siso_arr(c_sdp_S_pn-1 DOWNTO 0) := (OTHERS => c_dp_siso_rst);
SIGNAL wpfb_resized_sosi_2arr : t_dp_sosi_2arr_2(c_sdp_P_pfb-1 DOWNTO 0) := (OTHERS => (OTHERS => c_dp_sosi_rst));
SIGNAL wpfb_resized_siso_2arr : t_dp_siso_2arr_2(c_sdp_P_pfb-1 DOWNTO 0) := (OTHERS => (OTHERS => c_dp_siso_rst));
+
SIGNAL subband_equalizer_in_sosi_arr : t_dp_sosi_arr(c_sdp_R_os * c_sdp_P_pfb-1 DOWNTO 0) := (OTHERS => c_dp_sosi_rst);
SIGNAL subband_equalizer_out_sosi_arr : t_dp_sosi_arr(c_sdp_R_os * c_sdp_P_pfb-1 DOWNTO 0) := (OTHERS => c_dp_sosi_rst);
SIGNAL dp_selector_out_sosi_arr : t_dp_sosi_arr(c_sdp_R_os * c_sdp_P_pfb-1 DOWNTO 0) := (OTHERS => c_dp_sosi_rst);
- SIGNAL scope_sosi_arr : t_dp_sosi_integer_arr(c_sdp_R_os * c_sdp_S_pn-1 DOWNTO 0);
+ SIGNAL scope_equalizer_in_sosi_arr : t_dp_sosi_integer_arr(c_sdp_R_os * c_sdp_S_pn-1 DOWNTO 0);
+ SIGNAL scope_equalizer_out_sosi_arr : t_dp_sosi_integer_arr(c_sdp_R_os * c_sdp_S_pn-1 DOWNTO 0);
SIGNAL selector_en : STD_LOGIC;
SIGNAL weighted_subbands_flag : STD_LOGIC;
+
SIGNAL dp_bsn_source_restart_pipe : STD_LOGIC;
SIGNAL dp_bsn_source_restart_delayed : STD_LOGIC;
SIGNAL dp_bsn_source_restart_wg : STD_LOGIC;
SIGNAL dp_bsn_source_restart_pipe_complex : STD_LOGIC;
+
BEGIN
+
---------------------------------------------------------------
-- SPECTRAL INVERSION
---------------------------------------------------------------
@@ -308,17 +327,15 @@ BEGIN
ctrl => c_wg_ctrl,
--- out_ovr => out_ovr,
- out_dat => wg_out_dat --,
--- out_val => wg_out_val,
--- out_sync => out_sync
+ out_dat => wg_out_dat,
+ out_val => OPEN
);
-- Complex mult
gen_complex_mult: FOR I IN 0 TO c_sdp_S_pn-1 GENERATE
u_common_complex_mult : ENTITY common_mult_lib.common_complex_mult
GENERIC MAP (
- g_in_a_w => c_halfword_w,
+ g_in_a_w => c_halfword_w, -- = c_sdp_W_local_oscillator = 16
g_in_b_w => c_sdp_W_adc,
g_out_p_w => c_halfword_w + c_sdp_W_adc,
g_conjugate_b => FALSE
@@ -342,26 +359,27 @@ BEGIN
GENERIC MAP (
g_complex => TRUE,
g_representation => "SIGNED",
- g_lsb_w => c_sdp_W_fsub_wg_fraction,
+ g_lsb_w => c_sdp_W_local_oscillator_fraction,
g_lsb_round => TRUE,
g_lsb_round_clip => FALSE,
g_msb_clip => TRUE,
g_msb_clip_symmetric => FALSE,
- g_in_dat_w => c_halfword_w + c_sdp_W_adc,
+ g_pipeline_remove_lsb => 0,
+ g_pipeline_remove_msb => 0,
+ g_in_dat_w => c_halfword_w + c_sdp_W_adc,
g_out_dat_w => c_sdp_W_adc
)
PORT MAP (
rst => dp_rst,
clk => dp_clk,
-- ST sink
- snk_in => complex_mult_src_out_arr(I),
+ snk_in => complex_mult_src_out_arr(I),
-- ST source
- src_out => requantize_src_out_arr(I)
+ src_out => requantize_src_out_arr(I)
);
-
END GENERATE;
- -- Pipeline to compensate for complex mult.
+ -- Pipeline to compensate for complex mult and dp_requantize.
u_dp_pipeline : ENTITY dp_lib.dp_pipeline
GENERIC MAP (
g_pipeline => c_complex_mult_pipeline
@@ -375,7 +393,7 @@ BEGIN
src_out => si_sosi_0_piped
);
- -- pipeline bsn restart signal to keep dp_bsn_source_restart aligned with si_sosi_arr
+ -- pipeline bsn restart signal to keep dp_bsn_source_restart aligned with si_sosi_arr
u_common_pipeline_sl_cplx : ENTITY common_lib.common_pipeline_sl
GENERIC MAP (
g_pipeline => c_complex_mult_pipeline
@@ -499,9 +517,6 @@ BEGIN
src_out_arr => subband_equalizer_in_sosi_arr(c_sdp_P_pfb-1 DOWNTO 0)
);
- -- Output PFB streams
- pfb_sosi_arr <= subband_equalizer_in_sosi_arr;
-
---------------------------------------------------------------
-- COMBINE MEMORY MAPPED INTERFACES OF RAM_FIL_COEFS
---------------------------------------------------------------
@@ -529,8 +544,8 @@ BEGIN
dp_clk => dp_clk,
dp_rst => dp_rst,
- in_sosi_arr => subband_equalizer_in_sosi_arr,
- out_sosi_arr => subband_equalizer_out_sosi_arr,
+ in_raw_sosi_arr => subband_equalizer_in_sosi_arr,
+ out_raw_sosi_arr => subband_equalizer_out_sosi_arr,
mm_rst => mm_rst,
mm_clk => mm_clk,
@@ -566,6 +581,41 @@ BEGIN
selector_en => selector_en
);
+ ---------------------------------------------------------------
+ -- SIGNAL SCOPE
+ ---------------------------------------------------------------
+ -- synthesis translate_off
+ u_sdp_scope_equalizer_in : ENTITY work.sdp_scope
+ GENERIC MAP (
+ g_sim => g_sim,
+ g_selection => g_scope_selected_subband,
+ g_nof_input => c_sdp_R_os * c_sdp_P_pfb,
+ g_n_deinterleave => c_sdp_Q_fft,
+ g_dat_w => c_sdp_W_subband
+ )
+ PORT MAP (
+ clk => dp_clk,
+ rst => dp_rst,
+ sp_sosi_arr => subband_equalizer_in_sosi_arr,
+ scope_sosi_arr => scope_equalizer_in_sosi_arr
+ );
+
+ u_sdp_scope_equalizer_out : ENTITY work.sdp_scope
+ GENERIC MAP (
+ g_sim => g_sim,
+ g_selection => g_scope_selected_subband,
+ g_nof_input => c_sdp_R_os * c_sdp_P_pfb,
+ g_n_deinterleave => c_sdp_Q_fft,
+ g_dat_w => c_sdp_W_subband
+ )
+ PORT MAP (
+ clk => dp_clk,
+ rst => dp_rst,
+ sp_sosi_arr => subband_equalizer_out_sosi_arr,
+ scope_sosi_arr => scope_equalizer_out_sosi_arr
+ );
+ -- synthesis translate_on
+
---------------------------------------------------------------
-- SUBBAND STATISTICS
---------------------------------------------------------------
@@ -626,28 +676,10 @@ BEGIN
mux_miso => master_mem_mux_miso
);
- ---------------------------------------------------------------
- -- SIGNAL SCOPE
- ---------------------------------------------------------------
- u_sdp_scope : ENTITY work.sdp_scope
- GENERIC MAP (
- g_sim => g_sim,
- g_selection => g_scope_selected_subband,
- g_nof_input => c_sdp_R_os * c_sdp_P_pfb,
- g_n_deinterleave => c_sdp_Q_fft,
- g_dat_w => c_sdp_W_subband
- )
- PORT MAP (
- clk => dp_clk,
- rst => dp_rst,
- sp_sosi_arr => subband_equalizer_out_sosi_arr,
- scope_sosi_arr => scope_sosi_arr
- );
-
---------------------------------------------------------------
-- STATISTICS OFFLOAD
---------------------------------------------------------------
- weighted_subbands_flag <= NOT selector_en;
+ weighted_subbands_flag <= NOT selector_en WHEN rising_edge(dp_clk);
u_sdp_sst_udp_offload: ENTITY work.sdp_statistics_offload
GENERIC MAP (
--
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