diff --git a/applications/ta2/libraries/ta2_unb2b_bsp/hardware/unb2b/ctrl_unb2_board.tcl b/applications/ta2/libraries/ta2_unb2b_bsp/hardware/unb2b/ctrl_unb2_board.tcl
index cb93ec566654c0be63c67b8ca9951f4ded8c6806..98fa9c715a993d3a5545198684871c81d1f713ac 100755
--- a/applications/ta2/libraries/ta2_unb2b_bsp/hardware/unb2b/ctrl_unb2_board.tcl
+++ b/applications/ta2/libraries/ta2_unb2b_bsp/hardware/unb2b/ctrl_unb2_board.tcl
@@ -1,60 +1,49 @@
-
post_message "Running ctrl_unb2_board script"
-
-# Make sure RadioHDL installation exists
-post_message "Checking for RadioHDL installation, environment should have RADIOHDL defined"
-if {[catch {set radiohdl $::env(RADIOHDL)} result]} {
- post_message -type error "RadioHDL installation not found. Make sure RADIOHDL is correctly set"
- post_message -type error "Terminating ctrl_unb2_board script"
- exit 2
-} else {
- post_message "RADIOHDL=$::env(RADIOHDL)"
-}
-
+set radiohdl_build $::env(RADIOHDL_BUILD_DIR)
#============================================================
# Files and basic settings
#============================================================
# All used HDL library *_lib.qip files in order with top level last
-set_global_assignment -name QIP_FILE "$radiohdl/build/unb2b/quartus/technology/technology_lib.qip"
-set_global_assignment -name QIP_FILE "$radiohdl/build/unb2b/quartus/ip_arria10_e1sg_ram/ip_arria10_e1sg_ram_lib.qip"
-set_global_assignment -name QIP_FILE "$radiohdl/build/unb2b/quartus/tech_memory/tech_memory_lib.qip"
-set_global_assignment -name QIP_FILE "$radiohdl/build/unb2b/quartus/ip_arria10_e1sg_fifo/ip_arria10_e1sg_fifo_lib.qip"
-set_global_assignment -name QIP_FILE "$radiohdl/build/unb2b/quartus/tech_fifo/tech_fifo_lib.qip"
-set_global_assignment -name QIP_FILE "$radiohdl/build/unb2b/quartus/ip_arria10_e1sg_ddio/ip_arria10_e1sg_ddio_lib.qip"
-set_global_assignment -name QIP_FILE "$radiohdl/build/unb2b/quartus/tech_iobuf/tech_iobuf_lib.qip"
-set_global_assignment -name QIP_FILE "$radiohdl/build/unb2b/quartus/tst/tst_lib.qip"
-set_global_assignment -name QIP_FILE "$radiohdl/build/unb2b/quartus/common/common_lib.qip"
-set_global_assignment -name QIP_FILE "$radiohdl/build/unb2b/quartus/mm/mm_lib.qip"
-set_global_assignment -name QIP_FILE "$radiohdl/build/unb2b/quartus/ip_arria10_mult/ip_arria10_mult_lib.qip"
-set_global_assignment -name QIP_FILE "$radiohdl/build/unb2b/quartus/ip_arria10_complex_mult_rtl/ip_arria10_complex_mult_rtl_lib.qip"
-set_global_assignment -name QIP_FILE "$radiohdl/build/unb2b/quartus/ip_arria10_complex_mult_rtl_canonical/ip_arria10_complex_mult_rtl_canonical_lib.qip"
-set_global_assignment -name QIP_FILE "$radiohdl/build/unb2b/quartus/ip_arria10_e1sg_complex_mult/ip_arria10_e1sg_complex_mult_lib.qip"
-set_global_assignment -name QIP_FILE "$radiohdl/build/unb2b/quartus/ip_arria10_e1sg_mult_add4/ip_arria10_e1sg_mult_add4_lib.qip"
-set_global_assignment -name QIP_FILE "$radiohdl/build/unb2b/quartus/ip_arria10_e1sg_mult_add2/ip_arria10_e1sg_mult_add2_lib.qip"
-set_global_assignment -name QIP_FILE "$radiohdl/build/unb2b/quartus/tech_mult/tech_mult_lib.qip"
-set_global_assignment -name QIP_FILE "$radiohdl/build/unb2b/quartus/common_mult/common_mult_lib.qip"
-set_global_assignment -name QIP_FILE "$radiohdl/build/unb2b/quartus/easics/easics_lib.qip"
-set_global_assignment -name QIP_FILE "$radiohdl/build/unb2b/quartus/dp/dp_lib.qip"
-set_global_assignment -name QIP_FILE "$radiohdl/build/unb2b/quartus/ppsh/ppsh_lib.qip"
-set_global_assignment -name QIP_FILE "$radiohdl/build/unb2b/quartus/i2c/i2c_lib.qip"
-set_global_assignment -name QIP_FILE "$radiohdl/build/unb2b/quartus/ip_arria10_e1sg_tse_sgmii_lvds/ip_arria10_e1sg_tse_sgmii_lvds_lib.qip"
-set_global_assignment -name QIP_FILE "$radiohdl/build/unb2b/quartus/tech_tse/tech_tse_lib.qip"
-set_global_assignment -name QIP_FILE "$radiohdl/build/unb2b/quartus/eth/eth_lib.qip"
-set_global_assignment -name QIP_FILE "$radiohdl/build/unb2b/quartus/ip_arria10_e1sg_asmi_parallel/ip_arria10_e1sg_asmi_parallel_lib.qip"
-set_global_assignment -name QIP_FILE "$radiohdl/build/unb2b/quartus/ip_arria10_e1sg_remote_update/ip_arria10_e1sg_remote_update_lib.qip"
-set_global_assignment -name QIP_FILE "$radiohdl/build/unb2b/quartus/tech_flash/tech_flash_lib.qip"
-set_global_assignment -name QIP_FILE "$radiohdl/build/unb2b/quartus/remu/remu_lib.qip"
-set_global_assignment -name QIP_FILE "$radiohdl/build/unb2b/quartus/ip_arria10_e1sg_clkbuf_global/ip_arria10_e1sg_clkbuf_global_lib.qip"
-set_global_assignment -name QIP_FILE "$radiohdl/build/unb2b/quartus/tech_clkbuf/tech_clkbuf_lib.qip"
-set_global_assignment -name QIP_FILE "$radiohdl/build/unb2b/quartus/tech_pll/tech_pll_lib.qip"
-set_global_assignment -name QIP_FILE "$radiohdl/build/unb2b/quartus/ip_arria10_e1sg_fractional_pll_clk200/ip_arria10_e1sg_fractional_pll_clk200_lib.qip"
-set_global_assignment -name QIP_FILE "$radiohdl/build/unb2b/quartus/ip_arria10_e1sg_fractional_pll_clk125/ip_arria10_e1sg_fractional_pll_clk125_lib.qip"
-set_global_assignment -name QIP_FILE "$radiohdl/build/unb2b/quartus/tech_fractional_pll/tech_fractional_pll_lib.qip"
-set_global_assignment -name QIP_FILE "$radiohdl/build/unb2b/quartus/epcs/epcs_lib.qip"
-set_global_assignment -name QIP_FILE "$radiohdl/build/unb2b/quartus/ip_arria10_e1sg_temp_sense/ip_arria10_e1sg_temp_sense_lib.qip"
-set_global_assignment -name QIP_FILE "$radiohdl/build/unb2b/quartus/tech_fpga_temp_sens/tech_fpga_temp_sens_lib.qip"
-set_global_assignment -name QIP_FILE "$radiohdl/build/unb2b/quartus/ip_arria10_e1sg_voltage_sense/ip_arria10_e1sg_voltage_sense_lib.qip"
-set_global_assignment -name QIP_FILE "$radiohdl/build/unb2b/quartus/tech_fpga_voltage_sens/tech_fpga_voltage_sens_lib.qip"
-set_global_assignment -name QIP_FILE "$radiohdl/build/unb2b/quartus/fpga_sense/fpga_sense_lib.qip"
-set_global_assignment -name QIP_FILE "$radiohdl/build/unb2b/quartus/unb2b_board/unb2b_board_lib.qip"
+set_global_assignment -name QIP_FILE "$radiohdl_build/unb2b/quartus/technology/technology_lib.qip"
+set_global_assignment -name QIP_FILE "$radiohdl_build/unb2b/quartus/ip_arria10_e1sg_ram/ip_arria10_e1sg_ram_lib.qip"
+set_global_assignment -name QIP_FILE "$radiohdl_build/unb2b/quartus/tech_memory/tech_memory_lib.qip"
+set_global_assignment -name QIP_FILE "$radiohdl_build/unb2b/quartus/ip_arria10_e1sg_fifo/ip_arria10_e1sg_fifo_lib.qip"
+set_global_assignment -name QIP_FILE "$radiohdl_build/unb2b/quartus/tech_fifo/tech_fifo_lib.qip"
+set_global_assignment -name QIP_FILE "$radiohdl_build/unb2b/quartus/ip_arria10_e1sg_ddio/ip_arria10_e1sg_ddio_lib.qip"
+set_global_assignment -name QIP_FILE "$radiohdl_build/unb2b/quartus/tech_iobuf/tech_iobuf_lib.qip"
+set_global_assignment -name QIP_FILE "$radiohdl_build/unb2b/quartus/tst/tst_lib.qip"
+set_global_assignment -name QIP_FILE "$radiohdl_build/unb2b/quartus/common/common_lib.qip"
+set_global_assignment -name QIP_FILE "$radiohdl_build/unb2b/quartus/mm/mm_lib.qip"
+set_global_assignment -name QIP_FILE "$radiohdl_build/unb2b/quartus/ip_arria10_mult/ip_arria10_mult_lib.qip"
+set_global_assignment -name QIP_FILE "$radiohdl_build/unb2b/quartus/ip_arria10_complex_mult_rtl/ip_arria10_complex_mult_rtl_lib.qip"
+set_global_assignment -name QIP_FILE "$radiohdl_build/unb2b/quartus/ip_arria10_complex_mult_rtl_canonical/ip_arria10_complex_mult_rtl_canonical_lib.qip"
+set_global_assignment -name QIP_FILE "$radiohdl_build/unb2b/quartus/ip_arria10_e1sg_complex_mult/ip_arria10_e1sg_complex_mult_lib.qip"
+set_global_assignment -name QIP_FILE "$radiohdl_build/unb2b/quartus/ip_arria10_e1sg_mult_add4/ip_arria10_e1sg_mult_add4_lib.qip"
+set_global_assignment -name QIP_FILE "$radiohdl_build/unb2b/quartus/ip_arria10_e1sg_mult_add2/ip_arria10_e1sg_mult_add2_lib.qip"
+set_global_assignment -name QIP_FILE "$radiohdl_build/unb2b/quartus/tech_mult/tech_mult_lib.qip"
+set_global_assignment -name QIP_FILE "$radiohdl_build/unb2b/quartus/common_mult/common_mult_lib.qip"
+set_global_assignment -name QIP_FILE "$radiohdl_build/unb2b/quartus/easics/easics_lib.qip"
+set_global_assignment -name QIP_FILE "$radiohdl_build/unb2b/quartus/dp/dp_lib.qip"
+set_global_assignment -name QIP_FILE "$radiohdl_build/unb2b/quartus/ppsh/ppsh_lib.qip"
+set_global_assignment -name QIP_FILE "$radiohdl_build/unb2b/quartus/i2c/i2c_lib.qip"
+set_global_assignment -name QIP_FILE "$radiohdl_build/unb2b/quartus/ip_arria10_e1sg_tse_sgmii_lvds/ip_arria10_e1sg_tse_sgmii_lvds_lib.qip"
+set_global_assignment -name QIP_FILE "$radiohdl_build/unb2b/quartus/tech_tse/tech_tse_lib.qip"
+set_global_assignment -name QIP_FILE "$radiohdl_build/unb2b/quartus/eth/eth_lib.qip"
+set_global_assignment -name QIP_FILE "$radiohdl_build/unb2b/quartus/ip_arria10_e1sg_asmi_parallel/ip_arria10_e1sg_asmi_parallel_lib.qip"
+set_global_assignment -name QIP_FILE "$radiohdl_build/unb2b/quartus/ip_arria10_e1sg_remote_update/ip_arria10_e1sg_remote_update_lib.qip"
+set_global_assignment -name QIP_FILE "$radiohdl_build/unb2b/quartus/tech_flash/tech_flash_lib.qip"
+set_global_assignment -name QIP_FILE "$radiohdl_build/unb2b/quartus/remu/remu_lib.qip"
+set_global_assignment -name QIP_FILE "$radiohdl_build/unb2b/quartus/ip_arria10_e1sg_clkbuf_global/ip_arria10_e1sg_clkbuf_global_lib.qip"
+set_global_assignment -name QIP_FILE "$radiohdl_build/unb2b/quartus/tech_clkbuf/tech_clkbuf_lib.qip"
+set_global_assignment -name QIP_FILE "$radiohdl_build/unb2b/quartus/tech_pll/tech_pll_lib.qip"
+set_global_assignment -name QIP_FILE "$radiohdl_build/unb2b/quartus/ip_arria10_e1sg_fractional_pll_clk200/ip_arria10_e1sg_fractional_pll_clk200_lib.qip"
+set_global_assignment -name QIP_FILE "$radiohdl_build/unb2b/quartus/ip_arria10_e1sg_fractional_pll_clk125/ip_arria10_e1sg_fractional_pll_clk125_lib.qip"
+set_global_assignment -name QIP_FILE "$radiohdl_build/unb2b/quartus/tech_fractional_pll/tech_fractional_pll_lib.qip"
+set_global_assignment -name QIP_FILE "$radiohdl_build/unb2b/quartus/epcs/epcs_lib.qip"
+set_global_assignment -name QIP_FILE "$radiohdl_build/unb2b/quartus/ip_arria10_e1sg_temp_sense/ip_arria10_e1sg_temp_sense_lib.qip"
+set_global_assignment -name QIP_FILE "$radiohdl_build/unb2b/quartus/tech_fpga_temp_sens/tech_fpga_temp_sens_lib.qip"
+set_global_assignment -name QIP_FILE "$radiohdl_build/unb2b/quartus/ip_arria10_e1sg_voltage_sense/ip_arria10_e1sg_voltage_sense_lib.qip"
+set_global_assignment -name QIP_FILE "$radiohdl_build/unb2b/quartus/tech_fpga_voltage_sens/tech_fpga_voltage_sens_lib.qip"
+set_global_assignment -name QIP_FILE "$radiohdl_build/unb2b/quartus/fpga_sense/fpga_sense_lib.qip"
+set_global_assignment -name QIP_FILE "$radiohdl_build/unb2b/quartus/unb2b_board/unb2b_board_lib.qip"
diff --git a/applications/ta2/libraries/ta2_unb2b_bsp/hardware/unb2b/ip/ta2_unb2b_10GbE/ta2_unb2b_10GbE.tcl b/applications/ta2/libraries/ta2_unb2b_bsp/hardware/unb2b/ip/ta2_unb2b_10GbE/ta2_unb2b_10GbE.tcl
index 7899755f63faad961df501b6b956fa0e05fe6a47..dc445ef7c50de4c5c103da743dba49e403c0846b 100755
--- a/applications/ta2/libraries/ta2_unb2b_bsp/hardware/unb2b/ip/ta2_unb2b_10GbE/ta2_unb2b_10GbE.tcl
+++ b/applications/ta2/libraries/ta2_unb2b_bsp/hardware/unb2b/ip/ta2_unb2b_10GbE/ta2_unb2b_10GbE.tcl
@@ -1,15 +1,5 @@
post_message "Running ta2_unb2b_10GbE script"
-
-# Make sure RadioHDL installation exists
-post_message "Checking for RadioHDL installation, environment should have RADIOHDL defined"
-if {[catch {set radiohdl $::env(RADIOHDL)} result]} {
- post_message -type error "RadioHDL installation not found. Make sure RADIOHDL is correctly set"
- post_message -type error "Terminating ta2_unb2b_10GbE script"
- exit 2
-} else {
- post_message "RADIOHDL=$::env(RADIOHDL)"
-}
-
+set radiohdl_build $::env(RADIOHDL_BUILD_DIR)
#============================================================
# Files and basic settings
#============================================================
@@ -18,37 +8,37 @@ if {[catch {set radiohdl $::env(RADIOHDL)} result]} {
set_global_assignment -name VHDL_FILE ip/ta2_unb2b_10GbE/ta2_unb2b_10GbE.vhd
# All used HDL library *_lib.qip files in order, copied from ta2_unb2b_40GbE.qsf in RadioHDL build directory.
-set_global_assignment -name QIP_FILE "$radiohdl/build/unb2b/quartus/technology/technology_lib.qip"
-set_global_assignment -name QIP_FILE "$radiohdl/build/unb2b/quartus/ip_arria10_e1sg_ram/ip_arria10_e1sg_ram_lib.qip"
-set_global_assignment -name QIP_FILE "$radiohdl/build/unb2b/quartus/tech_memory/tech_memory_lib.qip"
-set_global_assignment -name QIP_FILE "$radiohdl/build/unb2b/quartus/ip_arria10_e1sg_fifo/ip_arria10_e1sg_fifo_lib.qip"
-set_global_assignment -name QIP_FILE "$radiohdl/build/unb2b/quartus/tech_fifo/tech_fifo_lib.qip"
-set_global_assignment -name QIP_FILE "$radiohdl/build/unb2b/quartus/ip_arria10_e1sg_ddio/ip_arria10_e1sg_ddio_lib.qip"
-set_global_assignment -name QIP_FILE "$radiohdl/build/unb2b/quartus/tech_iobuf/tech_iobuf_lib.qip"
-set_global_assignment -name QIP_FILE "$radiohdl/build/unb2b/quartus/tst/tst_lib.qip"
-set_global_assignment -name QIP_FILE "$radiohdl/build/unb2b/quartus/common/common_lib.qip"
-set_global_assignment -name QIP_FILE "$radiohdl/build/unb2b/quartus/mm/mm_lib.qip"
-set_global_assignment -name QIP_FILE "$radiohdl/build/unb2b/quartus/ip_arria10_mult/ip_arria10_mult_lib.qip"
-set_global_assignment -name QIP_FILE "$radiohdl/build/unb2b/quartus/ip_arria10_complex_mult_rtl/ip_arria10_complex_mult_rtl_lib.qip"
-set_global_assignment -name QIP_FILE "$radiohdl/build/unb2b/quartus/ip_arria10_complex_mult_rtl_canonical/ip_arria10_complex_mult_rtl_canonical_lib.qip"
-set_global_assignment -name QIP_FILE "$radiohdl/build/unb2b/quartus/ip_arria10_e1sg_complex_mult/ip_arria10_e1sg_complex_mult_lib.qip"
-set_global_assignment -name QIP_FILE "$radiohdl/build/unb2b/quartus/ip_arria10_e1sg_mult_add4/ip_arria10_e1sg_mult_add4_lib.qip"
-set_global_assignment -name QIP_FILE "$radiohdl/build/unb2b/quartus/ip_arria10_e1sg_mult_add2/ip_arria10_e1sg_mult_add2_lib.qip"
-set_global_assignment -name QIP_FILE "$radiohdl/build/unb2b/quartus/tech_mult/tech_mult_lib.qip"
-set_global_assignment -name QIP_FILE "$radiohdl/build/unb2b/quartus/common_mult/common_mult_lib.qip"
-set_global_assignment -name QIP_FILE "$radiohdl/build/unb2b/quartus/easics/easics_lib.qip"
-set_global_assignment -name QIP_FILE "$radiohdl/build/unb2b/quartus/dp/dp_lib.qip"
-set_global_assignment -name QIP_FILE "$radiohdl/build/unb2b/quartus/ip_arria10_e1sg_pll_xgmii_mac_clocks/ip_arria10_e1sg_pll_xgmii_mac_clocks_lib.qip"
-set_global_assignment -name QIP_FILE "$radiohdl/build/unb2b/quartus/tech_pll/tech_pll_lib.qip"
-set_global_assignment -name QIP_FILE "$radiohdl/build/unb2b/quartus/ip_arria10_e1sg_mac_10g/ip_arria10_e1sg_mac_10g_lib.qip"
-set_global_assignment -name QIP_FILE "$radiohdl/build/unb2b/quartus/tech_mac_10g/tech_mac_10g_lib.qip"
-set_global_assignment -name QIP_FILE "$radiohdl/build/unb2b/quartus/tech_transceiver/tech_transceiver_lib.qip"
-set_global_assignment -name QIP_FILE "$radiohdl/build/unb2b/quartus/ip_arria10_e1sg_phy_10gbase_r/ip_arria10_e1sg_phy_10gbase_r_lib.qip"
-set_global_assignment -name QIP_FILE "$radiohdl/build/unb2b/quartus/ip_arria10_e1sg_transceiver_pll_10g/ip_arria10_e1sg_transceiver_pll_10g_lib.qip"
-set_global_assignment -name QIP_FILE "$radiohdl/build/unb2b/quartus/ip_arria10_e1sg_transceiver_reset_controller_1/ip_arria10_e1sg_transceiver_reset_controller_1_lib.qip"
-set_global_assignment -name QIP_FILE "$radiohdl/build/unb2b/quartus/tech_10gbase_r/tech_10gbase_r_lib.qip"
-set_global_assignment -name QIP_FILE "$radiohdl/build/unb2b/quartus/ip_arria10_e1sg_eth_10g/ip_arria10_e1sg_eth_10g_lib.qip"
-set_global_assignment -name QIP_FILE "$radiohdl/build/unb2b/quartus/tech_eth_10g/tech_eth_10g_lib.qip"
+set_global_assignment -name QIP_FILE "$radiohdl_build/unb2b/quartus/technology/technology_lib.qip"
+set_global_assignment -name QIP_FILE "$radiohdl_build/unb2b/quartus/ip_arria10_e1sg_ram/ip_arria10_e1sg_ram_lib.qip"
+set_global_assignment -name QIP_FILE "$radiohdl_build/unb2b/quartus/tech_memory/tech_memory_lib.qip"
+set_global_assignment -name QIP_FILE "$radiohdl_build/unb2b/quartus/ip_arria10_e1sg_fifo/ip_arria10_e1sg_fifo_lib.qip"
+set_global_assignment -name QIP_FILE "$radiohdl_build/unb2b/quartus/tech_fifo/tech_fifo_lib.qip"
+set_global_assignment -name QIP_FILE "$radiohdl_build/unb2b/quartus/ip_arria10_e1sg_ddio/ip_arria10_e1sg_ddio_lib.qip"
+set_global_assignment -name QIP_FILE "$radiohdl_build/unb2b/quartus/tech_iobuf/tech_iobuf_lib.qip"
+set_global_assignment -name QIP_FILE "$radiohdl_build/unb2b/quartus/tst/tst_lib.qip"
+set_global_assignment -name QIP_FILE "$radiohdl_build/unb2b/quartus/common/common_lib.qip"
+set_global_assignment -name QIP_FILE "$radiohdl_build/unb2b/quartus/mm/mm_lib.qip"
+set_global_assignment -name QIP_FILE "$radiohdl_build/unb2b/quartus/ip_arria10_mult/ip_arria10_mult_lib.qip"
+set_global_assignment -name QIP_FILE "$radiohdl_build/unb2b/quartus/ip_arria10_complex_mult_rtl/ip_arria10_complex_mult_rtl_lib.qip"
+set_global_assignment -name QIP_FILE "$radiohdl_build/unb2b/quartus/ip_arria10_complex_mult_rtl_canonical/ip_arria10_complex_mult_rtl_canonical_lib.qip"
+set_global_assignment -name QIP_FILE "$radiohdl_build/unb2b/quartus/ip_arria10_e1sg_complex_mult/ip_arria10_e1sg_complex_mult_lib.qip"
+set_global_assignment -name QIP_FILE "$radiohdl_build/unb2b/quartus/ip_arria10_e1sg_mult_add4/ip_arria10_e1sg_mult_add4_lib.qip"
+set_global_assignment -name QIP_FILE "$radiohdl_build/unb2b/quartus/ip_arria10_e1sg_mult_add2/ip_arria10_e1sg_mult_add2_lib.qip"
+set_global_assignment -name QIP_FILE "$radiohdl_build/unb2b/quartus/tech_mult/tech_mult_lib.qip"
+set_global_assignment -name QIP_FILE "$radiohdl_build/unb2b/quartus/common_mult/common_mult_lib.qip"
+set_global_assignment -name QIP_FILE "$radiohdl_build/unb2b/quartus/easics/easics_lib.qip"
+set_global_assignment -name QIP_FILE "$radiohdl_build/unb2b/quartus/dp/dp_lib.qip"
+set_global_assignment -name QIP_FILE "$radiohdl_build/unb2b/quartus/ip_arria10_e1sg_pll_xgmii_mac_clocks/ip_arria10_e1sg_pll_xgmii_mac_clocks_lib.qip"
+set_global_assignment -name QIP_FILE "$radiohdl_build/unb2b/quartus/tech_pll/tech_pll_lib.qip"
+set_global_assignment -name QIP_FILE "$radiohdl_build/unb2b/quartus/ip_arria10_e1sg_mac_10g/ip_arria10_e1sg_mac_10g_lib.qip"
+set_global_assignment -name QIP_FILE "$radiohdl_build/unb2b/quartus/tech_mac_10g/tech_mac_10g_lib.qip"
+set_global_assignment -name QIP_FILE "$radiohdl_build/unb2b/quartus/tech_transceiver/tech_transceiver_lib.qip"
+set_global_assignment -name QIP_FILE "$radiohdl_build/unb2b/quartus/ip_arria10_e1sg_phy_10gbase_r/ip_arria10_e1sg_phy_10gbase_r_lib.qip"
+set_global_assignment -name QIP_FILE "$radiohdl_build/unb2b/quartus/ip_arria10_e1sg_transceiver_pll_10g/ip_arria10_e1sg_transceiver_pll_10g_lib.qip"
+set_global_assignment -name QIP_FILE "$radiohdl_build/unb2b/quartus/ip_arria10_e1sg_transceiver_reset_controller_1/ip_arria10_e1sg_transceiver_reset_controller_1_lib.qip"
+set_global_assignment -name QIP_FILE "$radiohdl_build/unb2b/quartus/tech_10gbase_r/tech_10gbase_r_lib.qip"
+set_global_assignment -name QIP_FILE "$radiohdl_build/unb2b/quartus/ip_arria10_e1sg_eth_10g/ip_arria10_e1sg_eth_10g_lib.qip"
+set_global_assignment -name QIP_FILE "$radiohdl_build/unb2b/quartus/tech_eth_10g/tech_eth_10g_lib.qip"
diff --git a/applications/ta2/libraries/ta2_unb2b_bsp/hardware/unb2b/ip/ta2_unb2b_1GbE_mc/ta2_unb2b_1GbE_mc.tcl b/applications/ta2/libraries/ta2_unb2b_bsp/hardware/unb2b/ip/ta2_unb2b_1GbE_mc/ta2_unb2b_1GbE_mc.tcl
index 3f42470c4159ab0582d8e45bc734045684b178e1..a0b708e6678092449dd17dfc0988ba4ec88b26b0 100755
--- a/applications/ta2/libraries/ta2_unb2b_bsp/hardware/unb2b/ip/ta2_unb2b_1GbE_mc/ta2_unb2b_1GbE_mc.tcl
+++ b/applications/ta2/libraries/ta2_unb2b_bsp/hardware/unb2b/ip/ta2_unb2b_1GbE_mc/ta2_unb2b_1GbE_mc.tcl
@@ -1,15 +1,5 @@
post_message "Running ta2_unb2b_1GbE_mc script"
-
-# Make sure RadioHDL installation exists
-post_message "Checking for RadioHDL installation, environment should have RADIOHDL defined"
-if {[catch {set radiohdl $::env(RADIOHDL)} result]} {
- post_message -type error "RadioHDL installation not found. Make sure RADIOHDL is correctly set"
- post_message -type error "Terminating ta2_unb2b_1GbE_mc script"
- exit 2
-} else {
- post_message "RADIOHDL=$::env(RADIOHDL)"
-}
-
+set radiohdl_build $::env(RADIOHDL_BUILD_DIR)
#============================================================
# Files and basic settings
#============================================================
@@ -18,24 +8,24 @@ if {[catch {set radiohdl $::env(RADIOHDL)} result]} {
set_global_assignment -name VHDL_FILE ip/ta2_unb2b_1GbE_mc/ta2_unb2b_1GbE_mc.vhd
# All used HDL library *_lib.qip files in order, copied from ta2_unb2b_1GbE_mc.qsf in RadioHDL build directory.
-set_global_assignment -name QIP_FILE "$radiohdl/build/unb2b/quartus/technology/technology_lib.qip"
-set_global_assignment -name QIP_FILE "$radiohdl/build/unb2b/quartus/ip_arria10_e1sg_ram/ip_arria10_e1sg_ram_lib.qip"
-set_global_assignment -name QIP_FILE "$radiohdl/build/unb2b/quartus/tech_memory/tech_memory_lib.qip"
-set_global_assignment -name QIP_FILE "$radiohdl/build/unb2b/quartus/ip_arria10_e1sg_fifo/ip_arria10_e1sg_fifo_lib.qip"
-set_global_assignment -name QIP_FILE "$radiohdl/build/unb2b/quartus/tech_fifo/tech_fifo_lib.qip"
-set_global_assignment -name QIP_FILE "$radiohdl/build/unb2b/quartus/ip_arria10_e1sg_ddio/ip_arria10_e1sg_ddio_lib.qip"
-set_global_assignment -name QIP_FILE "$radiohdl/build/unb2b/quartus/tech_iobuf/tech_iobuf_lib.qip"
-set_global_assignment -name QIP_FILE "$radiohdl/build/unb2b/quartus/tst/tst_lib.qip"
-set_global_assignment -name QIP_FILE "$radiohdl/build/unb2b/quartus/common/common_lib.qip"
-set_global_assignment -name QIP_FILE "$radiohdl/build/unb2b/quartus/mm/mm_lib.qip"
-set_global_assignment -name QIP_FILE "$radiohdl/build/unb2b/quartus/ip_arria10_mult/ip_arria10_mult_lib.qip"
-set_global_assignment -name QIP_FILE "$radiohdl/build/unb2b/quartus/ip_arria10_complex_mult_rtl/ip_arria10_complex_mult_rtl_lib.qip"
-set_global_assignment -name QIP_FILE "$radiohdl/build/unb2b/quartus/ip_arria10_complex_mult_rtl_canonical/ip_arria10_complex_mult_rtl_canonical_lib.qip"
-set_global_assignment -name QIP_FILE "$radiohdl/build/unb2b/quartus/ip_arria10_e1sg_complex_mult/ip_arria10_e1sg_complex_mult_lib.qip"
-set_global_assignment -name QIP_FILE "$radiohdl/build/unb2b/quartus/ip_arria10_e1sg_mult_add4/ip_arria10_e1sg_mult_add4_lib.qip"
-set_global_assignment -name QIP_FILE "$radiohdl/build/unb2b/quartus/ip_arria10_e1sg_mult_add2/ip_arria10_e1sg_mult_add2_lib.qip"
-set_global_assignment -name QIP_FILE "$radiohdl/build/unb2b/quartus/tech_mult/tech_mult_lib.qip"
-set_global_assignment -name QIP_FILE "$radiohdl/build/unb2b/quartus/common_mult/common_mult_lib.qip"
-set_global_assignment -name QIP_FILE "$radiohdl/build/unb2b/quartus/easics/easics_lib.qip"
-set_global_assignment -name QIP_FILE "$radiohdl/build/unb2b/quartus/dp/dp_lib.qip"
+set_global_assignment -name QIP_FILE "$radiohdl_build/unb2b/quartus/technology/technology_lib.qip"
+set_global_assignment -name QIP_FILE "$radiohdl_build/unb2b/quartus/ip_arria10_e1sg_ram/ip_arria10_e1sg_ram_lib.qip"
+set_global_assignment -name QIP_FILE "$radiohdl_build/unb2b/quartus/tech_memory/tech_memory_lib.qip"
+set_global_assignment -name QIP_FILE "$radiohdl_build/unb2b/quartus/ip_arria10_e1sg_fifo/ip_arria10_e1sg_fifo_lib.qip"
+set_global_assignment -name QIP_FILE "$radiohdl_build/unb2b/quartus/tech_fifo/tech_fifo_lib.qip"
+set_global_assignment -name QIP_FILE "$radiohdl_build/unb2b/quartus/ip_arria10_e1sg_ddio/ip_arria10_e1sg_ddio_lib.qip"
+set_global_assignment -name QIP_FILE "$radiohdl_build/unb2b/quartus/tech_iobuf/tech_iobuf_lib.qip"
+set_global_assignment -name QIP_FILE "$radiohdl_build/unb2b/quartus/tst/tst_lib.qip"
+set_global_assignment -name QIP_FILE "$radiohdl_build/unb2b/quartus/common/common_lib.qip"
+set_global_assignment -name QIP_FILE "$radiohdl_build/unb2b/quartus/mm/mm_lib.qip"
+set_global_assignment -name QIP_FILE "$radiohdl_build/unb2b/quartus/ip_arria10_mult/ip_arria10_mult_lib.qip"
+set_global_assignment -name QIP_FILE "$radiohdl_build/unb2b/quartus/ip_arria10_complex_mult_rtl/ip_arria10_complex_mult_rtl_lib.qip"
+set_global_assignment -name QIP_FILE "$radiohdl_build/unb2b/quartus/ip_arria10_complex_mult_rtl_canonical/ip_arria10_complex_mult_rtl_canonical_lib.qip"
+set_global_assignment -name QIP_FILE "$radiohdl_build/unb2b/quartus/ip_arria10_e1sg_complex_mult/ip_arria10_e1sg_complex_mult_lib.qip"
+set_global_assignment -name QIP_FILE "$radiohdl_build/unb2b/quartus/ip_arria10_e1sg_mult_add4/ip_arria10_e1sg_mult_add4_lib.qip"
+set_global_assignment -name QIP_FILE "$radiohdl_build/unb2b/quartus/ip_arria10_e1sg_mult_add2/ip_arria10_e1sg_mult_add2_lib.qip"
+set_global_assignment -name QIP_FILE "$radiohdl_build/unb2b/quartus/tech_mult/tech_mult_lib.qip"
+set_global_assignment -name QIP_FILE "$radiohdl_build/unb2b/quartus/common_mult/common_mult_lib.qip"
+set_global_assignment -name QIP_FILE "$radiohdl_build/unb2b/quartus/easics/easics_lib.qip"
+set_global_assignment -name QIP_FILE "$radiohdl_build/unb2b/quartus/dp/dp_lib.qip"
diff --git a/applications/ta2/libraries/ta2_unb2b_bsp/hardware/unb2b/ip/ta2_unb2b_40GbE/ta2_unb2b_40GbE.tcl b/applications/ta2/libraries/ta2_unb2b_bsp/hardware/unb2b/ip/ta2_unb2b_40GbE/ta2_unb2b_40GbE.tcl
index 79d71a40bf9265d719c99260102d568f6056f71e..9745011213d9e1a0b9541f59cb895324454f3864 100755
--- a/applications/ta2/libraries/ta2_unb2b_bsp/hardware/unb2b/ip/ta2_unb2b_40GbE/ta2_unb2b_40GbE.tcl
+++ b/applications/ta2/libraries/ta2_unb2b_bsp/hardware/unb2b/ip/ta2_unb2b_40GbE/ta2_unb2b_40GbE.tcl
@@ -1,15 +1,5 @@
post_message "Running ta2_unb2b_40GbE script"
-
-# Make sure RadioHDL installation exists
-post_message "Checking for RadioHDL installation, environment should have RADIOHDL defined"
-if {[catch {set radiohdl $::env(RADIOHDL)} result]} {
- post_message -type error "RadioHDL installation not found. Make sure RADIOHDL is correctly set"
- post_message -type error "Terminating ta2_unb2b_40GbE script"
- exit 2
-} else {
- post_message "RADIOHDL=$::env(RADIOHDL)"
-}
-
+set radiohdl_build $::env(RADIOHDL_BUILD_DIR)
#============================================================
# Files and basic settings
#============================================================
@@ -22,23 +12,23 @@ set_global_assignment -name IP_FILE ip/ta2_unb2b_40GbE/arria10_40g_mac.ip
set_global_assignment -name IP_FILE ip/ta2_unb2b_40GbE/arria10_40g_atx_pll.ip
# All used HDL library *_lib.qip files in order, copied from ta2_unb2b_40GbE.qsf in RadioHDL build directory.
-set_global_assignment -name QIP_FILE "$radiohdl/build/unb2b/quartus/technology/technology_lib.qip"
-set_global_assignment -name QIP_FILE "$radiohdl/build/unb2b/quartus/ip_arria10_e1sg_ram/ip_arria10_e1sg_ram_lib.qip"
-set_global_assignment -name QIP_FILE "$radiohdl/build/unb2b/quartus/tech_memory/tech_memory_lib.qip"
-set_global_assignment -name QIP_FILE "$radiohdl/build/unb2b/quartus/ip_arria10_e1sg_fifo/ip_arria10_e1sg_fifo_lib.qip"
-set_global_assignment -name QIP_FILE "$radiohdl/build/unb2b/quartus/tech_fifo/tech_fifo_lib.qip"
-set_global_assignment -name QIP_FILE "$radiohdl/build/unb2b/quartus/ip_arria10_e1sg_ddio/ip_arria10_e1sg_ddio_lib.qip"
-set_global_assignment -name QIP_FILE "$radiohdl/build/unb2b/quartus/tech_iobuf/tech_iobuf_lib.qip"
-set_global_assignment -name QIP_FILE "$radiohdl/build/unb2b/quartus/tst/tst_lib.qip"
-set_global_assignment -name QIP_FILE "$radiohdl/build/unb2b/quartus/common/common_lib.qip"
-set_global_assignment -name QIP_FILE "$radiohdl/build/unb2b/quartus/mm/mm_lib.qip"
-set_global_assignment -name QIP_FILE "$radiohdl/build/unb2b/quartus/ip_arria10_mult/ip_arria10_mult_lib.qip"
-set_global_assignment -name QIP_FILE "$radiohdl/build/unb2b/quartus/ip_arria10_complex_mult_rtl/ip_arria10_complex_mult_rtl_lib.qip"
-set_global_assignment -name QIP_FILE "$radiohdl/build/unb2b/quartus/ip_arria10_complex_mult_rtl_canonical/ip_arria10_complex_mult_rtl_canonical_lib.qip"
-set_global_assignment -name QIP_FILE "$radiohdl/build/unb2b/quartus/ip_arria10_e1sg_complex_mult/ip_arria10_e1sg_complex_mult_lib.qip"
-set_global_assignment -name QIP_FILE "$radiohdl/build/unb2b/quartus/ip_arria10_e1sg_mult_add4/ip_arria10_e1sg_mult_add4_lib.qip"
-set_global_assignment -name QIP_FILE "$radiohdl/build/unb2b/quartus/ip_arria10_e1sg_mult_add2/ip_arria10_e1sg_mult_add2_lib.qip"
-set_global_assignment -name QIP_FILE "$radiohdl/build/unb2b/quartus/tech_mult/tech_mult_lib.qip"
-set_global_assignment -name QIP_FILE "$radiohdl/build/unb2b/quartus/common_mult/common_mult_lib.qip"
-set_global_assignment -name QIP_FILE "$radiohdl/build/unb2b/quartus/easics/easics_lib.qip"
-set_global_assignment -name QIP_FILE "$radiohdl/build/unb2b/quartus/dp/dp_lib.qip"
+set_global_assignment -name QIP_FILE "$radiohdl_build/unb2b/quartus/technology/technology_lib.qip"
+set_global_assignment -name QIP_FILE "$radiohdl_build/unb2b/quartus/ip_arria10_e1sg_ram/ip_arria10_e1sg_ram_lib.qip"
+set_global_assignment -name QIP_FILE "$radiohdl_build/unb2b/quartus/tech_memory/tech_memory_lib.qip"
+set_global_assignment -name QIP_FILE "$radiohdl_build/unb2b/quartus/ip_arria10_e1sg_fifo/ip_arria10_e1sg_fifo_lib.qip"
+set_global_assignment -name QIP_FILE "$radiohdl_build/unb2b/quartus/tech_fifo/tech_fifo_lib.qip"
+set_global_assignment -name QIP_FILE "$radiohdl_build/unb2b/quartus/ip_arria10_e1sg_ddio/ip_arria10_e1sg_ddio_lib.qip"
+set_global_assignment -name QIP_FILE "$radiohdl_build/unb2b/quartus/tech_iobuf/tech_iobuf_lib.qip"
+set_global_assignment -name QIP_FILE "$radiohdl_build/unb2b/quartus/tst/tst_lib.qip"
+set_global_assignment -name QIP_FILE "$radiohdl_build/unb2b/quartus/common/common_lib.qip"
+set_global_assignment -name QIP_FILE "$radiohdl_build/unb2b/quartus/mm/mm_lib.qip"
+set_global_assignment -name QIP_FILE "$radiohdl_build/unb2b/quartus/ip_arria10_mult/ip_arria10_mult_lib.qip"
+set_global_assignment -name QIP_FILE "$radiohdl_build/unb2b/quartus/ip_arria10_complex_mult_rtl/ip_arria10_complex_mult_rtl_lib.qip"
+set_global_assignment -name QIP_FILE "$radiohdl_build/unb2b/quartus/ip_arria10_complex_mult_rtl_canonical/ip_arria10_complex_mult_rtl_canonical_lib.qip"
+set_global_assignment -name QIP_FILE "$radiohdl_build/unb2b/quartus/ip_arria10_e1sg_complex_mult/ip_arria10_e1sg_complex_mult_lib.qip"
+set_global_assignment -name QIP_FILE "$radiohdl_build/unb2b/quartus/ip_arria10_e1sg_mult_add4/ip_arria10_e1sg_mult_add4_lib.qip"
+set_global_assignment -name QIP_FILE "$radiohdl_build/unb2b/quartus/ip_arria10_e1sg_mult_add2/ip_arria10_e1sg_mult_add2_lib.qip"
+set_global_assignment -name QIP_FILE "$radiohdl_build/unb2b/quartus/tech_mult/tech_mult_lib.qip"
+set_global_assignment -name QIP_FILE "$radiohdl_build/unb2b/quartus/common_mult/common_mult_lib.qip"
+set_global_assignment -name QIP_FILE "$radiohdl_build/unb2b/quartus/easics/easics_lib.qip"
+set_global_assignment -name QIP_FILE "$radiohdl_build/unb2b/quartus/dp/dp_lib.qip"
diff --git a/applications/ta2/libraries/ta2_unb2b_bsp/hardware/unb2b/scripts/pre_flow_pr.tcl b/applications/ta2/libraries/ta2_unb2b_bsp/hardware/unb2b/scripts/pre_flow_pr.tcl
index 85fbe261c2b172aa51b97643c9c6aaa0c4b07ee4..cb75339916f99a61c527fa966b6fa51883e3d090 100755
--- a/applications/ta2/libraries/ta2_unb2b_bsp/hardware/unb2b/scripts/pre_flow_pr.tcl
+++ b/applications/ta2/libraries/ta2_unb2b_bsp/hardware/unb2b/scripts/pre_flow_pr.tcl
@@ -27,6 +27,17 @@ if {[catch {set sdk_root $::env(INTELFPGAOCLSDKROOT)} result]} {
post_message "INTELFPGAOCLSDKROOT=$::env(INTELFPGAOCLSDKROOT)"
}
+
+# Make sure RadioHDL installation exists
+post_message "Checking for RadioHDL installation, environment should have RADIOHDL_BUILD_DIR defined"
+if {[catch {set radiohdl_build $::env(RADIOHDL_BUILD_DIR)} result]} {
+ post_message -type error "RadioHDL installation not found. Make sure RADIOHDL_BUILD_DIR are correctly set"
+ post_message -type error "Terminating pre-flow script"
+ exit 2
+} else {
+ post_message "RADIOHDL_BUILD_DIR=$::env(RADIOHDL_BUILD_DIR)"
+}
+
# Load OpenCL BSP utility functions
source "$sdk_root/ip/board/bsp/opencl_bsp_util.tcl"
diff --git a/applications/ta2/libraries/ta2_unb2b_bsp/hardware/unb2b/top.vhd b/applications/ta2/libraries/ta2_unb2b_bsp/hardware/unb2b/top.vhd
index cac5cb9c018ee8cfe4a7ef8e49d1cd0c9b928bd2..c09e96c53d6746fdcc9facb756afc96d81b632a2 100644
--- a/applications/ta2/libraries/ta2_unb2b_bsp/hardware/unb2b/top.vhd
+++ b/applications/ta2/libraries/ta2_unb2b_bsp/hardware/unb2b/top.vhd
@@ -26,8 +26,8 @@ USE IEEE.NUMERIC_STD.ALL;
USE common_lib.common_pkg.ALL;
USE common_lib.common_mem_pkg.ALL;
USE technology_lib.technology_pkg.ALL;
-USE unb2b_board_lib.unb2_board_pkg.ALL;
-USE unb2b_board_lib.unb2_board_peripherals_pkg.ALL;
+USE unb2b_board_lib.unb2b_board_pkg.ALL;
+USE unb2b_board_lib.unb2b_board_peripherals_pkg.ALL;
USE dp_lib.dp_stream_pkg.ALL;
ENTITY top IS
@@ -53,9 +53,9 @@ ENTITY top IS
INTB : INOUT STD_LOGIC; -- FPGA interconnect line
-- Others
- VERSION : IN STD_LOGIC_VECTOR(c_unb2_board_aux.version_w-1 DOWNTO 0);
- ID : IN STD_LOGIC_VECTOR(c_unb2_board_aux.id_w-1 DOWNTO 0);
- TESTIO : INOUT STD_LOGIC_VECTOR(c_unb2_board_aux.testio_w-1 DOWNTO 0);
+ VERSION : IN STD_LOGIC_VECTOR(c_unb2b_board_aux.version_w-1 DOWNTO 0);
+ ID : IN STD_LOGIC_VECTOR(c_unb2b_board_aux.id_w-1 DOWNTO 0);
+ TESTIO : INOUT STD_LOGIC_VECTOR(c_unb2b_board_aux.testio_w-1 DOWNTO 0);
-- I2C Interface to Sensors
SENS_SC : INOUT STD_LOGIC;
@@ -67,20 +67,20 @@ ENTITY top IS
-- 1GbE Control Interface
ETH_CLK : IN STD_LOGIC;
- ETH_SGIN : IN STD_LOGIC_VECTOR(c_unb2_board_nof_eth-1 DOWNTO 0);
- ETH_SGOUT : OUT STD_LOGIC_VECTOR(c_unb2_board_nof_eth-1 DOWNTO 0);
+ ETH_SGIN : IN STD_LOGIC_VECTOR(c_unb2b_board_nof_eth-1 DOWNTO 0);
+ ETH_SGOUT : OUT STD_LOGIC_VECTOR(c_unb2b_board_nof_eth-1 DOWNTO 0);
-- Transceiver clocks
SA_CLK : IN STD_LOGIC := '0'; -- Clock 10GbE front (qsfp) and ring lines
-- front transceivers
- QSFP_0_RX : IN STD_LOGIC_VECTOR(c_unb2_board_tr_qsfp.bus_w-1 downto 0) := (OTHERS=>'0');
- QSFP_0_TX : OUT STD_LOGIC_VECTOR(c_unb2_board_tr_qsfp.bus_w-1 downto 0);
- QSFP_1_RX : IN STD_LOGIC_VECTOR(c_unb2_board_tr_qsfp.bus_w-1 downto 0) := (OTHERS=>'0');
- QSFP_1_TX : OUT STD_LOGIC_VECTOR(c_unb2_board_tr_qsfp.bus_w-1 downto 0);
+ QSFP_0_RX : IN STD_LOGIC_VECTOR(c_unb2b_board_tr_qsfp.bus_w-1 downto 0) := (OTHERS=>'0');
+ QSFP_0_TX : OUT STD_LOGIC_VECTOR(c_unb2b_board_tr_qsfp.bus_w-1 downto 0);
+ QSFP_1_RX : IN STD_LOGIC_VECTOR(c_unb2b_board_tr_qsfp.bus_w-1 downto 0) := (OTHERS=>'0');
+ QSFP_1_TX : OUT STD_LOGIC_VECTOR(c_unb2b_board_tr_qsfp.bus_w-1 downto 0);
-- LEDs
- QSFP_LED : OUT STD_LOGIC_VECTOR(c_unb2_board_tr_qsfp_nof_leds-1 DOWNTO 0)
+ QSFP_LED : OUT STD_LOGIC_VECTOR(c_unb2b_board_tr_qsfp_nof_leds-1 DOWNTO 0)
);
END top;
@@ -88,8 +88,8 @@ END top;
ARCHITECTURE str OF top IS
-- Firmware version x.y
- CONSTANT c_fw_version : t_unb2_board_fw_version := (1, 1);
- CONSTANT c_mm_clk_freq : NATURAL := c_unb2_board_mm_clk_freq_100M;
+ CONSTANT c_fw_version : t_unb2b_board_fw_version := (1, 1);
+ CONSTANT c_mm_clk_freq : NATURAL := c_unb2b_board_mm_clk_freq_100M;
-- 1 GbE
CONSTANT c_use_1GbE_udp_offload : BOOLEAN := TRUE;
@@ -178,16 +178,16 @@ ARCHITECTURE str OF top IS
SIGNAL reg_remu_miso : t_mem_miso;
-- 10GbE
- SIGNAL i_QSFP_TX : t_unb2_board_qsfp_bus_2arr(c_nof_qsfp_bus-1 DOWNTO 0);
- SIGNAL i_QSFP_RX : t_unb2_board_qsfp_bus_2arr(c_nof_qsfp_bus-1 DOWNTO 0);
+ SIGNAL i_QSFP_TX : t_unb2b_board_qsfp_bus_2arr(c_nof_qsfp_bus-1 DOWNTO 0);
+ SIGNAL i_QSFP_RX : t_unb2b_board_qsfp_bus_2arr(c_nof_qsfp_bus-1 DOWNTO 0);
- SIGNAL unb2_board_front_io_serial_tx_arr : STD_LOGIC_VECTOR(c_nof_streams_qsfp-1 DOWNTO 0) := (OTHERS=>'0');
- SIGNAL unb2_board_front_io_serial_rx_arr : STD_LOGIC_VECTOR(c_nof_streams_qsfp-1 DOWNTO 0);
+ SIGNAL unb2b_board_front_io_serial_tx_arr : STD_LOGIC_VECTOR(c_nof_streams_qsfp-1 DOWNTO 0) := (OTHERS=>'0');
+ SIGNAL unb2b_board_front_io_serial_rx_arr : STD_LOGIC_VECTOR(c_nof_streams_qsfp-1 DOWNTO 0);
-- QSFP leds
SIGNAL qsfp_green_led_arr : STD_LOGIC_VECTOR(c_nof_qsfp_bus-1 DOWNTO 0);
SIGNAL qsfp_red_led_arr : STD_LOGIC_VECTOR(c_nof_qsfp_bus-1 DOWNTO 0);
- SIGNAL unb2_board_qsfp_leds_tx_src_in_arr : t_dp_siso_arr(c_nof_qsfp_bus*c_quad-1 DOWNTO 0) := (OTHERS => c_dp_siso_rst);
+ SIGNAL unb2b_board_qsfp_leds_tx_src_in_arr : t_dp_siso_arr(c_nof_qsfp_bus*c_quad-1 DOWNTO 0) := (OTHERS => c_dp_siso_rst);
SIGNAL i_reset_n : STD_LOGIC;
@@ -493,7 +493,7 @@ BEGIN
-----------------------------------------------------------------------------
-- General control function
-----------------------------------------------------------------------------
- u_ctrl_unb2_board : ENTITY unb2b_board_lib.ctrl_unb2_board
+ u_ctrl_unb2b_board : ENTITY unb2b_board_lib.ctrl_unb2b_board
GENERIC MAP (
g_sim => g_sim,
g_technology => g_technology,
@@ -504,10 +504,10 @@ BEGIN
g_stamp_svn => g_stamp_svn,
g_fw_version => c_fw_version,
g_mm_clk_freq => c_mm_clk_freq,
- g_eth_clk_freq => c_unb2_board_eth_clk_freq_125M,
+ g_eth_clk_freq => c_unb2b_board_eth_clk_freq_125M,
g_udp_offload => c_use_1GbE_udp_offload,
g_udp_offload_nof_streams => c_nof_streams_1GbE,
- g_aux => c_unb2_board_aux,
+ g_aux => c_unb2b_board_aux,
g_factory_image => g_factory_image,
g_protect_addr_range => g_protect_addr_range
)
@@ -631,13 +631,13 @@ BEGIN
QSFP_0_TX <= i_QSFP_TX(0);
QSFP_1_TX <= i_QSFP_TX(1);
- u_unb2_board_front_io : ENTITY unb2b_board_lib.unb2_board_front_io
+ u_unb2b_board_front_io : ENTITY unb2b_board_lib.unb2b_board_front_io
GENERIC MAP (
g_nof_qsfp_bus => c_nof_qsfp_bus
)
PORT MAP (
- serial_tx_arr => unb2_board_front_io_serial_tx_arr,
- serial_rx_arr => unb2_board_front_io_serial_rx_arr,
+ serial_tx_arr => unb2b_board_front_io_serial_tx_arr,
+ serial_rx_arr => unb2b_board_front_io_serial_rx_arr,
green_led_arr => qsfp_green_led_arr(c_nof_qsfp_bus-1 DOWNTO 0),
red_led_arr => qsfp_red_led_arr(c_nof_qsfp_bus-1 DOWNTO 0),
@@ -651,9 +651,9 @@ BEGIN
------------------------
-- qsfp LEDs controller
------------------------
- unb2_board_qsfp_leds_tx_src_in_arr(4).xon <= ta2_unb2b_40gbe_rx_status_rx_status;
- unb2_board_qsfp_leds_tx_src_in_arr(0).xon <= ta2_unb2b_10gbe_rx_status_rx_status;
- u_unb2_board_qsfp_leds : ENTITY unb2b_board_lib.unb2_board_qsfp_leds
+ unb2b_board_qsfp_leds_tx_src_in_arr(4).xon <= ta2_unb2b_40gbe_rx_status_rx_status;
+ unb2b_board_qsfp_leds_tx_src_in_arr(0).xon <= ta2_unb2b_10gbe_rx_status_rx_status;
+ u_unb2b_board_qsfp_leds : ENTITY unb2b_board_lib.unb2b_board_qsfp_leds
GENERIC MAP (
g_sim => g_sim,
g_factory_image => g_factory_image,
@@ -664,7 +664,7 @@ BEGIN
rst => mm_rst,
clk => mm_clk,
- tx_siso_arr => unb2_board_qsfp_leds_tx_src_in_arr,
+ tx_siso_arr => unb2b_board_qsfp_leds_tx_src_in_arr,
green_led_arr => qsfp_green_led_arr(c_nof_qsfp_bus-1 DOWNTO 0),
red_led_arr => qsfp_red_led_arr(c_nof_qsfp_bus-1 DOWNTO 0)
@@ -686,65 +686,65 @@ BEGIN
kernel_interface_sw_reset_in_reset => mm_rst,
- -- the_pio_wdi: toggled by NIOS II application unb_osy. Connects to WDI via ctrl_unb2_board.
+ -- the_pio_wdi: toggled by NIOS II application unb_osy. Connects to WDI via ctrl_unb2b_board.
pio_wdi_external_connection_export => pout_wdi,
avs_eth_0_reset_export => eth1g_mm_rst,
- avs_eth_0_tse_address_export => eth1g_tse_mosi.address(c_unb2_board_peripherals_mm_reg_default.reg_tse_adr_w-1 DOWNTO 0),
+ avs_eth_0_tse_address_export => eth1g_tse_mosi.address(c_unb2b_board_peripherals_mm_reg_default.reg_tse_adr_w-1 DOWNTO 0),
avs_eth_0_tse_write_export => eth1g_tse_mosi.wr,
avs_eth_0_tse_read_export => eth1g_tse_mosi.rd,
avs_eth_0_tse_writedata_export => eth1g_tse_mosi.wrdata(c_word_w-1 DOWNTO 0),
avs_eth_0_tse_readdata_export => eth1g_tse_miso.rddata(c_word_w-1 DOWNTO 0),
avs_eth_0_tse_waitrequest_export => eth1g_tse_miso.waitrequest,
- avs_eth_0_reg_address_export => eth1g_reg_mosi.address(c_unb2_board_peripherals_mm_reg_default.reg_eth_adr_w-1 DOWNTO 0),
+ avs_eth_0_reg_address_export => eth1g_reg_mosi.address(c_unb2b_board_peripherals_mm_reg_default.reg_eth_adr_w-1 DOWNTO 0),
avs_eth_0_reg_write_export => eth1g_reg_mosi.wr,
avs_eth_0_reg_read_export => eth1g_reg_mosi.rd,
avs_eth_0_reg_writedata_export => eth1g_reg_mosi.wrdata(c_word_w-1 DOWNTO 0),
avs_eth_0_reg_readdata_export => eth1g_reg_miso.rddata(c_word_w-1 DOWNTO 0),
- avs_eth_0_ram_address_export => eth1g_ram_mosi.address(c_unb2_board_peripherals_mm_reg_default.ram_eth_adr_w-1 DOWNTO 0),
+ avs_eth_0_ram_address_export => eth1g_ram_mosi.address(c_unb2b_board_peripherals_mm_reg_default.ram_eth_adr_w-1 DOWNTO 0),
avs_eth_0_ram_write_export => eth1g_ram_mosi.wr,
avs_eth_0_ram_read_export => eth1g_ram_mosi.rd,
avs_eth_0_ram_writedata_export => eth1g_ram_mosi.wrdata(c_word_w-1 DOWNTO 0),
avs_eth_0_ram_readdata_export => eth1g_ram_miso.rddata(c_word_w-1 DOWNTO 0),
avs_eth_0_irq_export => eth1g_reg_interrupt,
- reg_unb_sens_address_export => reg_unb_sens_mosi.address(c_unb2_board_peripherals_mm_reg_default.reg_unb_sens_adr_w-1 DOWNTO 0),
+ reg_unb_sens_address_export => reg_unb_sens_mosi.address(c_unb2b_board_peripherals_mm_reg_default.reg_unb_sens_adr_w-1 DOWNTO 0),
reg_unb_sens_write_export => reg_unb_sens_mosi.wr,
reg_unb_sens_writedata_export => reg_unb_sens_mosi.wrdata(c_word_w-1 DOWNTO 0),
reg_unb_sens_read_export => reg_unb_sens_mosi.rd,
reg_unb_sens_readdata_export => reg_unb_sens_miso.rddata(c_word_w-1 DOWNTO 0),
- reg_unb_pmbus_address_export => reg_unb_pmbus_mosi.address(c_unb2_board_peripherals_mm_reg_default.reg_unb_pmbus_adr_w-1 DOWNTO 0),
+ reg_unb_pmbus_address_export => reg_unb_pmbus_mosi.address(c_unb2b_board_peripherals_mm_reg_default.reg_unb_pmbus_adr_w-1 DOWNTO 0),
reg_unb_pmbus_write_export => reg_unb_pmbus_mosi.wr,
reg_unb_pmbus_writedata_export => reg_unb_pmbus_mosi.wrdata(c_word_w-1 DOWNTO 0),
reg_unb_pmbus_read_export => reg_unb_pmbus_mosi.rd,
reg_unb_pmbus_readdata_export => reg_unb_pmbus_miso.rddata(c_word_w-1 DOWNTO 0),
- reg_fpga_temp_sens_address_export => reg_fpga_temp_sens_mosi.address(c_unb2_board_peripherals_mm_reg_default.reg_fpga_temp_sens_adr_w-1 DOWNTO 0),
+ reg_fpga_temp_sens_address_export => reg_fpga_temp_sens_mosi.address(c_unb2b_board_peripherals_mm_reg_default.reg_fpga_temp_sens_adr_w-1 DOWNTO 0),
reg_fpga_temp_sens_write_export => reg_fpga_temp_sens_mosi.wr,
reg_fpga_temp_sens_writedata_export => reg_fpga_temp_sens_mosi.wrdata(c_word_w-1 DOWNTO 0),
reg_fpga_temp_sens_read_export => reg_fpga_temp_sens_mosi.rd,
reg_fpga_temp_sens_readdata_export => reg_fpga_temp_sens_miso.rddata(c_word_w-1 DOWNTO 0),
- reg_fpga_voltage_sens_address_export => reg_fpga_voltage_sens_mosi.address(c_unb2_board_peripherals_mm_reg_default.reg_fpga_voltage_sens_adr_w-1 DOWNTO 0),
+ reg_fpga_voltage_sens_address_export => reg_fpga_voltage_sens_mosi.address(c_unb2b_board_peripherals_mm_reg_default.reg_fpga_voltage_sens_adr_w-1 DOWNTO 0),
reg_fpga_voltage_sens_write_export => reg_fpga_voltage_sens_mosi.wr,
reg_fpga_voltage_sens_writedata_export => reg_fpga_voltage_sens_mosi.wrdata(c_word_w-1 DOWNTO 0),
reg_fpga_voltage_sens_read_export => reg_fpga_voltage_sens_mosi.rd,
reg_fpga_voltage_sens_readdata_export => reg_fpga_voltage_sens_miso.rddata(c_word_w-1 DOWNTO 0),
- rom_system_info_address_export => rom_unb_system_info_mosi.address(c_unb2_board_peripherals_mm_reg_default.rom_unb_system_info_adr_w-1 DOWNTO 0),
+ rom_system_info_address_export => rom_unb_system_info_mosi.address(c_unb2b_board_peripherals_mm_reg_default.rom_unb_system_info_adr_w-1 DOWNTO 0),
rom_system_info_write_export => rom_unb_system_info_mosi.wr,
rom_system_info_writedata_export => rom_unb_system_info_mosi.wrdata(c_word_w-1 DOWNTO 0),
rom_system_info_read_export => rom_unb_system_info_mosi.rd,
rom_system_info_readdata_export => rom_unb_system_info_miso.rddata(c_word_w-1 DOWNTO 0),
- pio_system_info_address_export => reg_unb_system_info_mosi.address(c_unb2_board_peripherals_mm_reg_default.reg_unb_system_info_adr_w-1 DOWNTO 0),
+ pio_system_info_address_export => reg_unb_system_info_mosi.address(c_unb2b_board_peripherals_mm_reg_default.reg_unb_system_info_adr_w-1 DOWNTO 0),
pio_system_info_write_export => reg_unb_system_info_mosi.wr,
pio_system_info_writedata_export => reg_unb_system_info_mosi.wrdata(c_word_w-1 DOWNTO 0),
pio_system_info_read_export => reg_unb_system_info_mosi.rd,
pio_system_info_readdata_export => reg_unb_system_info_miso.rddata(c_word_w-1 DOWNTO 0),
- pio_pps_address_export => reg_ppsh_mosi.address(c_unb2_board_peripherals_mm_reg_default.reg_ppsh_adr_w-1 DOWNTO 0),
+ pio_pps_address_export => reg_ppsh_mosi.address(c_unb2b_board_peripherals_mm_reg_default.reg_ppsh_adr_w-1 DOWNTO 0),
pio_pps_write_export => reg_ppsh_mosi.wr,
pio_pps_writedata_export => reg_ppsh_mosi.wrdata(c_word_w-1 DOWNTO 0),
pio_pps_read_export => reg_ppsh_mosi.rd,
@@ -756,13 +756,13 @@ BEGIN
reg_wdi_read_export => reg_wdi_mosi.rd,
reg_wdi_readdata_export => reg_wdi_miso.rddata(c_word_w-1 DOWNTO 0),
- reg_remu_address_export => reg_remu_mosi.address(c_unb2_board_peripherals_mm_reg_default.reg_remu_adr_w-1 DOWNTO 0),
+ reg_remu_address_export => reg_remu_mosi.address(c_unb2b_board_peripherals_mm_reg_default.reg_remu_adr_w-1 DOWNTO 0),
reg_remu_write_export => reg_remu_mosi.wr,
reg_remu_writedata_export => reg_remu_mosi.wrdata(c_word_w-1 DOWNTO 0),
reg_remu_read_export => reg_remu_mosi.rd,
reg_remu_readdata_export => reg_remu_miso.rddata(c_word_w-1 DOWNTO 0),
- reg_epcs_address_export => reg_epcs_mosi.address(c_unb2_board_peripherals_mm_reg_default.reg_epcs_adr_w-1 DOWNTO 0),
+ reg_epcs_address_export => reg_epcs_mosi.address(c_unb2b_board_peripherals_mm_reg_default.reg_epcs_adr_w-1 DOWNTO 0),
reg_epcs_write_export => reg_epcs_mosi.wr,
reg_epcs_writedata_export => reg_epcs_mosi.wrdata(c_word_w-1 DOWNTO 0),
reg_epcs_read_export => reg_epcs_mosi.rd,
@@ -820,9 +820,9 @@ BEGIN
ta2_unb2b_10gbe_kernel_src_ready => board_kernel_stream_src_10GbE_ready,
ta2_unb2b_10gbe_kernel_src_valid => board_kernel_stream_src_10GbE_valid,
ta2_unb2b_10gbe_refclk_clk => SA_CLK,
- ta2_unb2b_10gbe_rx_serial_data_conduit => unb2_board_front_io_serial_rx_arr(0),
+ ta2_unb2b_10gbe_rx_serial_data_conduit => unb2b_board_front_io_serial_rx_arr(0),
ta2_unb2b_10gbe_rx_status_rx_status => ta2_unb2b_10gbe_rx_status_rx_status,
- ta2_unb2b_10gbe_tx_serial_data_conduit => unb2_board_front_io_serial_tx_arr(0),
+ ta2_unb2b_10gbe_tx_serial_data_conduit => unb2b_board_front_io_serial_tx_arr(0),
ta2_unb2b_40gbe_kernel_snk_data => board_kernel_stream_snk_40GbE_data,
ta2_unb2b_40gbe_kernel_snk_ready => board_kernel_stream_snk_40GbE_ready,
@@ -831,9 +831,9 @@ BEGIN
ta2_unb2b_40gbe_kernel_src_ready => board_kernel_stream_src_40GbE_ready,
ta2_unb2b_40gbe_kernel_src_valid => board_kernel_stream_src_40GbE_valid,
ta2_unb2b_40gbe_refclk_clk => SA_CLK,
- ta2_unb2b_40gbe_rx_serial_data_conduit => unb2_board_front_io_serial_rx_arr(7 DOWNTO 4),
+ ta2_unb2b_40gbe_rx_serial_data_conduit => unb2b_board_front_io_serial_rx_arr(7 DOWNTO 4),
ta2_unb2b_40gbe_rx_status_rx_status => ta2_unb2b_40gbe_rx_status_rx_status,
- ta2_unb2b_40gbe_tx_serial_data_conduit => unb2_board_front_io_serial_tx_arr(7 DOWNTO 4),
+ ta2_unb2b_40gbe_tx_serial_data_conduit => unb2b_board_front_io_serial_tx_arr(7 DOWNTO 4),
ta2_unb2b_1gbe_mc_kernel_snk_data => board_kernel_stream_snk_1GbE_data,
ta2_unb2b_1gbe_mc_kernel_snk_ready => board_kernel_stream_snk_1GbE_ready,