From ce13191824e44796d31f17b1acc21cb212b39511 Mon Sep 17 00:00:00 2001 From: Erik Kooistra <kooistra@astron.nl> Date: Fri, 31 Oct 2014 10:54:49 +0000 Subject: [PATCH] Moved the ip_stratixiv single file IP from library ip_stratixiv to separate sub libraries, similar as for ip_arria10. Corrected using the decicated library ip_stratixiv<ip_name>_lib instead of all from ip_stratixiv_lib. --- libraries/technology/fifo/tech_fifo_dc.vhd | 2 +- libraries/technology/fifo/tech_fifo_dc_mixed_widths.vhd | 2 +- libraries/technology/fifo/tech_fifo_sc.vhd | 2 +- libraries/technology/flash/tech_flash_asmi_parallel.vhd | 2 +- libraries/technology/flash/tech_flash_remote_update.vhd | 2 +- libraries/technology/iobuf/tech_iobuf_ddio_in.vhd | 2 +- libraries/technology/iobuf/tech_iobuf_ddio_out.vhd | 2 +- libraries/technology/memory/tech_memory_ram_cr_cw.vhd | 2 +- libraries/technology/memory/tech_memory_ram_crw_crw.vhd | 2 +- libraries/technology/memory/tech_memory_ram_crwk_crw.vhd | 2 +- libraries/technology/memory/tech_memory_ram_r_w.vhd | 2 +- libraries/technology/memory/tech_memory_rom_r.vhd | 2 +- .../technology/transceiver/tech_transceiver_gx_stratixiv.vhd | 2 +- 13 files changed, 13 insertions(+), 13 deletions(-) diff --git a/libraries/technology/fifo/tech_fifo_dc.vhd b/libraries/technology/fifo/tech_fifo_dc.vhd index f0cb496d1f..bbee822068 100644 --- a/libraries/technology/fifo/tech_fifo_dc.vhd +++ b/libraries/technology/fifo/tech_fifo_dc.vhd @@ -26,7 +26,7 @@ USE technology_lib.technology_pkg.ALL; USE technology_lib.technology_select_pkg.ALL; -- Declare IP libraries to ensure default binding in simulation. The IP library clause is ignored by synthesis. -LIBRARY ip_stratixiv_lib; +LIBRARY ip_stratixiv_fifo_lib; LIBRARY ip_arria10_fifo_lib; ENTITY tech_fifo_dc IS diff --git a/libraries/technology/fifo/tech_fifo_dc_mixed_widths.vhd b/libraries/technology/fifo/tech_fifo_dc_mixed_widths.vhd index a5f0be0f91..9912a6a20a 100644 --- a/libraries/technology/fifo/tech_fifo_dc_mixed_widths.vhd +++ b/libraries/technology/fifo/tech_fifo_dc_mixed_widths.vhd @@ -26,7 +26,7 @@ USE technology_lib.technology_pkg.ALL; USE technology_lib.technology_select_pkg.ALL; -- Declare IP libraries to ensure default binding in simulation. The IP library clause is ignored by synthesis. -LIBRARY ip_stratixiv_lib; +LIBRARY ip_stratixiv_fifo_lib; LIBRARY ip_arria10_fifo_lib; ENTITY tech_fifo_dc_mixed_widths IS diff --git a/libraries/technology/fifo/tech_fifo_sc.vhd b/libraries/technology/fifo/tech_fifo_sc.vhd index 726e959439..7481ddeed2 100644 --- a/libraries/technology/fifo/tech_fifo_sc.vhd +++ b/libraries/technology/fifo/tech_fifo_sc.vhd @@ -26,7 +26,7 @@ USE technology_lib.technology_pkg.ALL; USE technology_lib.technology_select_pkg.ALL; -- Declare IP libraries to ensure default binding in simulation. The IP library clause is ignored by synthesis. -LIBRARY ip_stratixiv_lib; +LIBRARY ip_stratixiv_fifo_lib; LIBRARY ip_arria10_fifo_lib; ENTITY tech_fifo_sc IS diff --git a/libraries/technology/flash/tech_flash_asmi_parallel.vhd b/libraries/technology/flash/tech_flash_asmi_parallel.vhd index e33f872424..2ad7f8121b 100644 --- a/libraries/technology/flash/tech_flash_asmi_parallel.vhd +++ b/libraries/technology/flash/tech_flash_asmi_parallel.vhd @@ -28,7 +28,7 @@ USE technology_lib.technology_pkg.ALL; USE technology_lib.technology_select_pkg.ALL; -- Declare IP libraries to ensure default binding in simulation. The IP library clause is ignored by synthesis. -LIBRARY ip_stratixiv_lib; +LIBRARY ip_stratixiv_flash_lib; ENTITY tech_flash_asmi_parallel IS GENERIC ( diff --git a/libraries/technology/flash/tech_flash_remote_update.vhd b/libraries/technology/flash/tech_flash_remote_update.vhd index d05e8a0b50..52b2701ce8 100644 --- a/libraries/technology/flash/tech_flash_remote_update.vhd +++ b/libraries/technology/flash/tech_flash_remote_update.vhd @@ -28,7 +28,7 @@ USE technology_lib.technology_pkg.ALL; USE technology_lib.technology_select_pkg.ALL; -- Declare IP libraries to ensure default binding in simulation. The IP library clause is ignored by synthesis. -LIBRARY ip_stratixiv_lib; +LIBRARY ip_stratixiv_flash_lib; ENTITY tech_flash_remote_update IS GENERIC ( diff --git a/libraries/technology/iobuf/tech_iobuf_ddio_in.vhd b/libraries/technology/iobuf/tech_iobuf_ddio_in.vhd index 114cb7f597..252f592c2e 100644 --- a/libraries/technology/iobuf/tech_iobuf_ddio_in.vhd +++ b/libraries/technology/iobuf/tech_iobuf_ddio_in.vhd @@ -26,7 +26,7 @@ USE technology_lib.technology_pkg.ALL; USE technology_lib.technology_select_pkg.ALL; -- Declare IP libraries to ensure default binding in simulation. The IP library clause is ignored by synthesis. -LIBRARY ip_stratixiv_lib; +LIBRARY ip_stratixiv_ddio_lib; LIBRARY ip_arria10_ddio_lib; ENTITY tech_iobuf_ddio_in IS diff --git a/libraries/technology/iobuf/tech_iobuf_ddio_out.vhd b/libraries/technology/iobuf/tech_iobuf_ddio_out.vhd index 36a747ba58..efbf517b73 100644 --- a/libraries/technology/iobuf/tech_iobuf_ddio_out.vhd +++ b/libraries/technology/iobuf/tech_iobuf_ddio_out.vhd @@ -26,7 +26,7 @@ USE technology_lib.technology_pkg.ALL; USE technology_lib.technology_select_pkg.ALL; -- Declare IP libraries to ensure default binding in simulation. The IP library clause is ignored by synthesis. -LIBRARY ip_stratixiv_lib; +LIBRARY ip_stratixiv_ddio_lib; LIBRARY ip_arria10_ddio_lib; ENTITY tech_iobuf_ddio_out IS diff --git a/libraries/technology/memory/tech_memory_ram_cr_cw.vhd b/libraries/technology/memory/tech_memory_ram_cr_cw.vhd index 840b84c331..a827d21b35 100644 --- a/libraries/technology/memory/tech_memory_ram_cr_cw.vhd +++ b/libraries/technology/memory/tech_memory_ram_cr_cw.vhd @@ -26,7 +26,7 @@ USE technology_lib.technology_pkg.ALL; USE technology_lib.technology_select_pkg.ALL; -- Declare IP libraries to ensure default binding in simulation. The IP library clause is ignored by synthesis. -LIBRARY ip_stratixiv_lib; +LIBRARY ip_stratixiv_ram_lib; LIBRARY ip_arria10_ram_lib; ENTITY tech_memory_ram_cr_cw IS diff --git a/libraries/technology/memory/tech_memory_ram_crw_crw.vhd b/libraries/technology/memory/tech_memory_ram_crw_crw.vhd index 146109bf51..713ec891a2 100644 --- a/libraries/technology/memory/tech_memory_ram_crw_crw.vhd +++ b/libraries/technology/memory/tech_memory_ram_crw_crw.vhd @@ -26,7 +26,7 @@ USE technology_lib.technology_pkg.ALL; USE technology_lib.technology_select_pkg.ALL; -- Declare IP libraries to ensure default binding in simulation. The IP library clause is ignored by synthesis. -LIBRARY ip_stratixiv_lib; +LIBRARY ip_stratixiv_ram_lib; LIBRARY ip_arria10_ram_lib; ENTITY tech_memory_ram_crw_crw IS diff --git a/libraries/technology/memory/tech_memory_ram_crwk_crw.vhd b/libraries/technology/memory/tech_memory_ram_crwk_crw.vhd index f109e871eb..90d31e9714 100644 --- a/libraries/technology/memory/tech_memory_ram_crwk_crw.vhd +++ b/libraries/technology/memory/tech_memory_ram_crwk_crw.vhd @@ -26,7 +26,7 @@ USE technology_lib.technology_pkg.ALL; USE technology_lib.technology_select_pkg.ALL; -- Declare IP libraries to ensure default binding in simulation. The IP library clause is ignored by synthesis. -LIBRARY ip_stratixiv_lib; +LIBRARY ip_stratixiv_ram_lib; LIBRARY ip_arria10_ram_lib; ENTITY tech_memory_ram_crwk_crw IS -- support different port data widths and corresponding address ranges diff --git a/libraries/technology/memory/tech_memory_ram_r_w.vhd b/libraries/technology/memory/tech_memory_ram_r_w.vhd index 3505b8f7ff..babfc362fc 100644 --- a/libraries/technology/memory/tech_memory_ram_r_w.vhd +++ b/libraries/technology/memory/tech_memory_ram_r_w.vhd @@ -26,7 +26,7 @@ USE technology_lib.technology_pkg.ALL; USE technology_lib.technology_select_pkg.ALL; -- Declare IP libraries to ensure default binding in simulation. The IP library clause is ignored by synthesis. -LIBRARY ip_stratixiv_lib; +LIBRARY ip_stratixiv_ram_lib; LIBRARY ip_arria10_ram_lib; ENTITY tech_memory_ram_r_w IS diff --git a/libraries/technology/memory/tech_memory_rom_r.vhd b/libraries/technology/memory/tech_memory_rom_r.vhd index 69aa54a2cd..d959b63916 100644 --- a/libraries/technology/memory/tech_memory_rom_r.vhd +++ b/libraries/technology/memory/tech_memory_rom_r.vhd @@ -26,7 +26,7 @@ USE technology_lib.technology_pkg.ALL; USE technology_lib.technology_select_pkg.ALL; -- Declare IP libraries to ensure default binding in simulation. The IP library clause is ignored by synthesis. -LIBRARY ip_stratixiv_lib; +LIBRARY ip_stratixiv_ram_lib; LIBRARY ip_arria10_ram_lib; ENTITY tech_memory_rom_r IS diff --git a/libraries/technology/transceiver/tech_transceiver_gx_stratixiv.vhd b/libraries/technology/transceiver/tech_transceiver_gx_stratixiv.vhd index 5e4c146c2a..e6425c1414 100644 --- a/libraries/technology/transceiver/tech_transceiver_gx_stratixiv.vhd +++ b/libraries/technology/transceiver/tech_transceiver_gx_stratixiv.vhd @@ -21,7 +21,7 @@ -------------------------------------------------------------------------------- -- Declare IP libraries to ensure default binding in simulation. The IP library clause is ignored by synthesis. -LIBRARY ip_stratixiv_lib; +LIBRARY ip_stratixiv_transceiver_lib; LIBRARY IEEE, common_lib, dp_lib; USE IEEE.STD_LOGIC_1164.ALL; -- GitLab