From cce30a2019bcaac7564cef9fe6534b01a5a8f792 Mon Sep 17 00:00:00 2001
From: Erik Kooistra <kooistra@astron.nl>
Date: Mon, 23 Nov 2015 10:58:04 +0000
Subject: [PATCH] Only support RTL archictecture. No need to port Megawizard
 arch dsp_mult_add2,4.vhd from
 /home/kooistra/svnroot/UniBoard_FP7/UniBoard/trunk.

---
 libraries/base/common_mult/src/vhdl/common_mult_add2.vhd | 2 --
 libraries/base/common_mult/src/vhdl/common_mult_add4.vhd | 2 --
 2 files changed, 4 deletions(-)

diff --git a/libraries/base/common_mult/src/vhdl/common_mult_add2.vhd b/libraries/base/common_mult/src/vhdl/common_mult_add2.vhd
index 7169df71b3..9a32e5b6c5 100644
--- a/libraries/base/common_mult/src/vhdl/common_mult_add2.vhd
+++ b/libraries/base/common_mult/src/vhdl/common_mult_add2.vhd
@@ -37,9 +37,7 @@ USE technology_lib.technology_select_pkg.ALL;
 --
 -- Architectures:
 -- . rtl      : uses RTL to have all registers in one clocked process
--- . stratix4 : uses MegaWizard component dsp_mult_add2.vhd
 --
--- Preferred architecture: 'stratix4', see synth\quartus\common_top.vhd
 
 ENTITY common_mult_add2 IS
   GENERIC (
diff --git a/libraries/base/common_mult/src/vhdl/common_mult_add4.vhd b/libraries/base/common_mult/src/vhdl/common_mult_add4.vhd
index aa3a0952e3..5bb8605056 100644
--- a/libraries/base/common_mult/src/vhdl/common_mult_add4.vhd
+++ b/libraries/base/common_mult/src/vhdl/common_mult_add4.vhd
@@ -40,9 +40,7 @@ USE technology_lib.technology_select_pkg.ALL;
 --
 -- Architectures:
 -- . rtl      : uses RTL to have all registers in one clocked process
--- . stratix4 : uses MegaWizard component dsp_mult_add4.vhd
 --
--- Preferred architecture: 'rtl', see synth\quartus\common_top.vhd
 
 ENTITY common_mult_add4 IS
   GENERIC (
-- 
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