diff --git a/libraries/base/axi4/src/vhdl/axi4_lite_mm_bridge.vhd b/libraries/base/axi4/src/vhdl/axi4_lite_mm_bridge.vhd
index 73799be8cb2a80c009c3ece03b64bb4eac2632c2..8522aa997fe49c57ddf233c89489a28db29be2b8 100644
--- a/libraries/base/axi4/src/vhdl/axi4_lite_mm_bridge.vhd
+++ b/libraries/base/axi4/src/vhdl/axi4_lite_mm_bridge.vhd
@@ -31,6 +31,8 @@
 --   . The read latency is not adapted. Ensure that the Controller and Peripheral use the same 
 --     read-latency.
 --   . Both AXI4-lite and MM use ready latency = 0 for waitrequest/ready.
+--   . AXI4-lite is assumed to use byte addressed registers while MM uses word addressed 
+--     registers.
 
 LIBRARY IEEE, common_lib;
 USE IEEE.STD_LOGIC_1164.ALL;
diff --git a/libraries/base/axi4/src/vhdl/axi4_lite_pkg.vhd b/libraries/base/axi4/src/vhdl/axi4_lite_pkg.vhd
index 7214af9bff71ee6de5b12ce5df43dea3ac98f1b4..35c121f370427ab13abd94befef596bd5eb4b514 100644
--- a/libraries/base/axi4/src/vhdl/axi4_lite_pkg.vhd
+++ b/libraries/base/axi4/src/vhdl/axi4_lite_pkg.vhd
@@ -109,9 +109,9 @@ PACKAGE BODY axi4_lite_pkg IS
     VARIABLE v_mm_copi : t_mem_copi := c_mem_copi_rst;
   BEGIN
     IF axi4_copi.awvalid = '1' THEN
-      v_mm_copi.address := axi4_copi.awaddr;
+      v_mm_copi.address := "00" & axi4_copi.awaddr(c_axi4_lite_address_w-1 DOWNTO 2); -- convert byte addressed to word addressed.
     ELSE
-      v_mm_copi.address := axi4_copi.araddr;
+      v_mm_copi.address := "00" & axi4_copi.araddr(c_axi4_lite_address_w-1 DOWNTO 2); -- convert byte addressed to word addressed.
     END IF;
     v_mm_copi.wrdata(c_axi4_lite_data_w-1 DOWNTO 0) := axi4_copi.wdata;
     v_mm_copi.wr                                    := axi4_copi.awvalid;
@@ -131,14 +131,14 @@ PACKAGE BODY axi4_lite_pkg IS
   FUNCTION func_axi4_lite_from_mm_copi(mm_copi : t_mem_copi) RETURN t_axi4_lite_copi IS
     VARIABLE v_axi4_copi : t_axi4_lite_copi := c_axi4_lite_copi_rst;
   BEGIN
-    v_axi4_copi.awaddr  := mm_copi.address;  
+    v_axi4_copi.awaddr  := mm_copi.address(c_axi4_lite_address_w-3 DOWNTO 0) & "00"; -- convert word addressed to byte addressed.
     v_axi4_copi.awprot  := (OTHERS => '0');  
     v_axi4_copi.awvalid := mm_copi.wr;  
     v_axi4_copi.wdata   := mm_copi.wrdata(c_axi4_lite_data_w-1 DOWNTO 0);  
     v_axi4_copi.wstrb   := (OTHERS => '1'); -- Either ignored or all bytes selected.  
     v_axi4_copi.wvalid  := mm_copi.wr;  
     v_axi4_copi.bready  := '1'; -- Unsupported by MM, assuming always ready.  
-    v_axi4_copi.araddr  := mm_copi.address;  
+    v_axi4_copi.araddr  := mm_copi.address(c_axi4_lite_address_w-3 DOWNTO 0) & "00"; -- convert word addressed to byte addressed.  
     v_axi4_copi.arprot  := (OTHERS => '0');  
     v_axi4_copi.arvalid := mm_copi.rd;  
     v_axi4_copi.rready  := '1'; -- Unsupported by MM, assuming always ready.